- 03 2月, 2015 1 次提交
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由 Tomeu Vizoso 提交于
Adds a way for clock consumers to set maximum and minimum rates. This can be used for thermal drivers to set minimum rates, or by misc. drivers to set maximum rates to assure a minimum performance level. Changes the signature of the determine_rate callback by adding the parameters min_rate and max_rate. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> [sboyd@codeaurora.org: set req_rate in __clk_init] Signed-off-by: NMichael Turquette <mturquette@linaro.org> [mturquette@linaro.org: min/max rate for sun6i_ahb1_clk_determine_rate migrated clk-private.h changes to clk.c]
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- 31 1月, 2015 1 次提交
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由 Tero Kristo 提交于
Introduces omap3 legacy clock data under clock driver. The clock data is also in new format, which makes it possible to get rid of the clk-private.h header. This patch also introduces SoC specific init functions that shall be called from the low level init. The data format used in this file has two possible evolution paths; it can either be removed completely once no longer needed, or it will be possible to retain the format and modify the TI clock driver to be a loadable module at some point. The actual path to be followed will be decided later. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 28 1月, 2015 1 次提交
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由 Stephen Boyd 提交于
These modules don't need to include clk-private.h. Replace the include with clk.h because these modules are clock consumers and also include clk-provider.h in clk/ti.h because struct clk_hw_omap has a struct clk_hw embedded in it. Cc: Tero Kristo <t-kristo@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 16 12月, 2014 1 次提交
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由 Tero Kristo 提交于
While the change for determine_rate clock operation was merged, the OMAP counterpart using these calls was overlooked for some reason, and caused boot failures on at least OMAP4 platforms. Fixed by updating the DPLL API calls to use the new parameters. Signed-off-by: NTero Kristo <t-kristo@ti.com> Fixes: 646cafc6 ("clk: Change clk_ops->determine_rate") Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Tested-by: NKevin Hilman <khilman@linaro.org> Reported-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NMichael Turquette <mturquette@linaro.org>
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- 14 11月, 2014 3 次提交
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由 Tero Kristo 提交于
Expand the support of omap4 per-dpll to provide set_rate_and_parent. This is required for proper behavior of clk_change_rate with determine_rate support. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Similarly to OMAP3 noncore DPLL, the implementation of this DPLL clock type is wrong. This patch adds basic functionality for determine_rate for this clock type which will be taken into use in the patches following later. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Tero Kristo 提交于
Currently, DPLL code hides the re-parenting within its internals, which is wrong. This needs to be exposed to the common clock code via determine_rate and set_rate_and_parent APIs. This patch adds support for these, which will be taken into use in the following patches. Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 29 9月, 2014 1 次提交
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由 Tero Kristo 提交于
Previously, the TI clock driver initialized all the clocks hierarchically under each separate clock provider node. Now, each clock that requires IO access will instead check their parent node to find out which IO range to use. This patch allows the TI clock driver to use a few new features provided by the generic of_clk_init, and also allows registration of clock nodes outside the clock hierarchy (for example, any external clocks.) Signed-off-by: NTero Kristo <t-kristo@ti.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Stefan Assmann <sassmann@kpanic.de> Acked-by: NTony Lindgren <tony@atomide.com>
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- 07 6月, 2014 1 次提交
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由 Andrii Tseglytskyi 提交于
Duty Cycle Correction(DCC) needs to be enabled if the MPU is to run at frequencies beyond 1.4GHz for OMAP5, DRA75x, DRA72x. MPU DPLL has a limitation on the maximum frequency it can be locked at. Duty Cycle Correction circuit is used to recover a correct duty cycle for achieving higher frequencies (hardware internally switches output to M3 output(CLKOUTHIF) from M2 output (CLKOUT)). For further information, See the note on OMAP5432 Technical Reference Manual(SWPU282U) chapter 3.6.3.3.1 "DPLLs Output Clocks Parameters", and also the "OMAP543x ES2.0 DM Operating Conditions Addendum v0.5" chapter 2.1 "Micro Processor Unit (MPU)". Equivalent information is present in relevant DRA75x, 72x documentation(SPRUHP2E, SPRUHI2P). Signed-off-by: NAndrii Tseglytskyi <andrii.tseglytskyi@ti.com> Signed-off-by: NTaras Kondratiuk <taras@ti.com> Signed-off-by: NJ Keerthy <j-keerthy@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> [t-kristo@ti.com: added TRM / DM references for DCC clock rate] Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 28 5月, 2014 5 次提交
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由 Tero Kristo 提交于
The clock and clkdev for this are added manually. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
Adds support for registering the alias clocks, boot time clock-enable list and disabling autoidle of clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
OMAP2430 I2CHS modules require specific hardware ops to be used, so added a new compatible string for this. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
This patch adds support for omap2 type aplls, which have gating and autoidle functionality. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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由 Tero Kristo 提交于
OMAP2 has slightly different DPLL compared to later OMAP generations. This patch adds support for the ti,omap2-dpll-core-clock and also adds the bindings documentation. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 20 2月, 2014 1 次提交
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由 Tomi Valkeinen 提交于
If CLK_SET_RATE_PARENT is set for a clkoutx2 clock, calling clk_set_rate() on the clock "skips" the x2 multiplier as there are no set_rate and round_rate functions defined for the clkoutx2. This results in getting double the requested clock rates, breaking the display on omap3430 based devices. This got broken when d0f58bd3 and related patches were merged for v3.14, as omapdss driver now relies more on the clk-framework and CLK_SET_RATE_PARENT. This patch implements set_rate and round_rate for clkoutx2. Tested on OMAP3430, OMAP3630, OMAP4460. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 18 1月, 2014 16 次提交
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由 Tero Kristo 提交于
clk-43xx.c now contains the clock init functionality for am43xx, including DT clock registration and adding of static clkdev entries. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-3xxx.c now contains the clock init functionality for omap3, including DT clock registration and adding of static clkdev entries. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
OMAP3 has interface clocks in addition to functional clocks, which require special handling for the autoidle and idle status register offsets mainly. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-33xx.c now contains the clock init functionality for am33xx, including DT clock registration and adding of static clkdev entries. This patch also moves the omap2_clk_enable_init_clocks declaration to the driver include, as this is needed by the am33xx clock init code. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-7xx.c now contains the clock init functionality for dra7, including DT clock registration and adding of static clkdev entries. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-54xx.c now contains the clock init functionality for omap5, including DT clock registration and adding of static clkdev entries. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
clk-44xx.c now contains the clock init functionality for omap4, including DT clock registration and adding of static clkdev entries. Signed-off-by: NTero Kristo <t-kristo@ti.com> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
ti,mux-clock provides now a binding for basic mux support. This is just using the basic clock type. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
Some OMAP clocks require knowledge about their parent clockdomain for book keeping purposes. This patch creates a new DT binding for TI clockdomains, which act as a collection of device clocks. Clockdomain itself is rather misleading name for the hardware functionality, as at least on OMAP4 / OMAP5 / DRA7 the clockdomains can be collections of either clocks and/or IP blocks, thus idle-domain or such might be more appropriate. For most cases on these SoCs, the kernel doesn't even need the information and the mappings can be ignored. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
This patch adds support for TI specific gate clocks. These behave as basic gate-clock, but have different ops / hw-ops for controlling the actual gate, for example waiting until the clock is ready. Several sub-types are supported: - ti,gate-clock: basic gate clock with default ops/hwops - ti,clkdm-gate-clock: clockdomain level gate control - ti,dss-gate-clock: gate clock with DSS specific hardware handling - ti,am35xx-gate-clock: gate clock with AM35xx specific hardware handling - ti,hsdiv-gate-clock: gate clock with OMAP36xx hardware errata handling Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
This is a multipurpose clock node, which contains support for multiple sub-clocks. Uses basic composite clock type to implement the actual functionality, and TI specific gate, mux and divider clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
TI clk driver now routes some of the basic clocks through own registration routine to allow autoidle support. This routine just checks a couple of device node properties and adds autoidle support if required, and just passes the registration forward to basic clocks. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
The OMAP clock driver now supports DPLL clock type. This patch also adds support for DT DPLL nodes. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
ti_dt_clk_init_provider() can now be used to initialize the contents of a single clock IP block. This parses all the clocks under the IP block and calls the corresponding init function for them. This patch also introduces a helper function for the TI clock drivers to get register info from DT and append the master IP info to this. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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由 Tero Kristo 提交于
Some devices require their clocks to be available with a specific dev-id con-id mapping. With DT, the clocks can be found by default only with their name, or alternatively through the device node of the consumer. With drivers, that don't support DT fully yet, add mechanism to register specific clock names. Signed-off-by: NTero Kristo <t-kristo@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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