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OpenCorePKG_MOD
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体验新版 GitCode,发现更多精彩内容 >>
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ad4414cf
编写于
2月 12, 2022
作者:
V
vit9696
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电子邮件补丁
差异文件
OcAppleKernelLib: Added global MSR 35h fix to `ProvideCurrentCpuInfo`
This allows `-cpu host` in KVM
上级
9d7bb640
变更
8
隐藏空白更改
内联
并排
Showing
8 changed file
with
28 addition
and
12 deletion
+28
-12
Changelog.md
Changelog.md
+1
-0
Docs/Configuration.md5
Docs/Configuration.md5
+1
-1
Docs/Configuration.pdf
Docs/Configuration.pdf
+0
-0
Docs/Configuration.tex
Docs/Configuration.tex
+2
-0
Docs/Differences/Differences.pdf
Docs/Differences/Differences.pdf
+0
-0
Docs/Differences/Differences.tex
Docs/Differences/Differences.tex
+5
-3
Docs/Errata/Errata.pdf
Docs/Errata/Errata.pdf
+0
-0
Library/OcAppleKernelLib/CpuidPatches.c
Library/OcAppleKernelLib/CpuidPatches.c
+19
-8
未找到文件。
Changelog.md
浏览文件 @
ad4414cf
...
...
@@ -8,6 +8,7 @@ OpenCore Changelog
-
Added script to build qemu recovery images to macrecovery
-
Fixed selecting
`SecureBootModel`
on hypervisors (should be
`x86legacy`
)
-
Added kext blocking
`Strategy`
for prelinked and newer
-
Added global MSR 35h fix to
`ProvideCurrentCpuInfo`
, allowing
`-cpu host`
in KVM
#### v0.7.8
-
Updated ocvalidate to warn about insecure
`DmgLoading`
with secure
`SecureBootModel`
(already disallowed in runtime)
...
...
Docs/Configuration.md5
浏览文件 @
ad4414cf
5653169e52602ebc7ba6439a3e23b6bc
af8312e880f1b5c8f1773e840ef3dbf0
Docs/Configuration.pdf
浏览文件 @
ad4414cf
无法预览此类型文件
Docs/Configuration.tex
浏览文件 @
ad4414cf
...
...
@@ -2721,6 +2721,8 @@ blocking.
\tightlist
\item
For Microsoft Hyper-V it provides the correct TSC and FSB values
to the kernel, as well as disables CPU topology validation (10.8+).
\item
For KVM and other hypervisors it provides precomputed MSR 35h
values solving kernel panic with
\texttt
{
-cpu host
}
.
\item
For Intel CPUs it adds support for asymmetrical SMP systems
(e.g. Intel Alder Lake) by patching core count to thread count along
with the supplemental required changes (10.14+).
...
...
Docs/Differences/Differences.pdf
浏览文件 @
ad4414cf
无法预览此类型文件
Docs/Differences/Differences.tex
浏览文件 @
ad4414cf
\documentclass
[]
{
article
}
%DIF LATEXDIFF DIFFERENCE FILE
%DIF DEL PreviousConfiguration.tex
Sat Feb 12 00:03:53
2022
%DIF ADD ../Configuration.tex Sat Feb 12 0
0:03:53
2022
%DIF DEL PreviousConfiguration.tex
Thu Feb 10 18:56:25
2022
%DIF ADD ../Configuration.tex Sat Feb 12 0
4:35:26
2022
\usepackage
{
lmodern
}
\usepackage
{
amssymb,amsmath
}
...
...
@@ -2786,7 +2786,9 @@ blocking.
\tightlist
\item
For Microsoft Hyper-V it provides the correct TSC and FSB values
to the kernel, as well as disables CPU topology validation (10.8+).
\item
For Intel CPUs it adds support for asymmetrical SMP systems
\item
For
\DIFaddbegin
\DIFadd
{
KVM and other hypervisors it provides precomputed MSR 35h
values solving kernel panic with
}
\texttt
{
\DIFadd
{
-cpu host
}}
\DIFadd
{
.
}
\item
\DIFadd
{
For
}
\DIFaddend
Intel CPUs it adds support for asymmetrical SMP systems
(e.g. Intel Alder Lake) by patching core count to thread count along
with the supplemental required changes (10.14+).
\end{itemize}
...
...
Docs/Errata/Errata.pdf
浏览文件 @
ad4414cf
无法预览此类型文件
Library/OcAppleKernelLib/CpuidPatches.c
浏览文件 @
ad4414cf
...
...
@@ -1215,7 +1215,7 @@ mProvideCurrentCpuInfoTopologyCorePerPackageV2Patch = {
STATIC
EFI_STATUS
PatchProvideCurrentCpuInfo
ForAmpCpu
(
PatchProvideCurrentCpuInfo
MSR35h
(
IN
OUT
PATCHER_CONTEXT
*
Patcher
,
IN
OC_CPU_INFO
*
CpuInfo
,
IN
UINT32
KernelVersion
...
...
@@ -1223,6 +1223,7 @@ PatchProvideCurrentCpuInfoForAmpCpu (
{
EFI_STATUS
Status
;
UINT32
CoreThreadCount
;
BOOLEAN
IsAmpCpu
;
//
// TODO: We can support older, just there is no real need.
...
...
@@ -1233,8 +1234,20 @@ PatchProvideCurrentCpuInfoForAmpCpu (
return
EFI_SUCCESS
;
}
CoreThreadCount
=
(((
UINT32
)
CpuInfo
->
ThreadCount
)
<<
16U
)
|
((
UINT32
)
CpuInfo
->
ThreadCount
);
IsAmpCpu
=
(
CpuInfo
->
ThreadCount
%
CpuInfo
->
CoreCount
)
!=
0
;
//
// Provide real values for normal CPUs.
// Provide Thread=Thread for AMP (ADL) CPUs.
//
if
(
IsAmpCpu
)
{
CoreThreadCount
=
(((
UINT32
)
CpuInfo
->
ThreadCount
)
<<
16U
)
|
((
UINT32
)
CpuInfo
->
ThreadCount
);
}
else
{
CoreThreadCount
=
(((
UINT32
)
CpuInfo
->
CoreCount
)
<<
16U
)
|
((
UINT32
)
CpuInfo
->
ThreadCount
);
}
CopyMem
(
&
mProvideCurrentCpuInfoTopologyCoreCountReplace
[
1
],
&
CoreThreadCount
,
...
...
@@ -1248,7 +1261,7 @@ PatchProvideCurrentCpuInfoForAmpCpu (
DEBUG
((
DEBUG_INFO
,
"OCAK: Patching MSR 35h to %08x - %r
\n
"
,
CoreThreadCount
,
Status
));
if
(
EFI_ERROR
(
Status
))
{
if
(
EFI_ERROR
(
Status
)
||
!
IsAmpCpu
)
{
return
Status
;
}
...
...
@@ -1318,9 +1331,8 @@ PatchProvideCurrentCpuInfo (
ASSERT
(
Patcher
!=
NULL
);
if
(
!
CpuInfo
->
Hypervisor
&&
CpuInfo
->
Vendor
[
0
]
==
CPUID_VENDOR_INTEL
)
{
return
PatchProvideCurrentCpuInfoForAmpCpu
(
Patcher
,
CpuInfo
,
KernelVersion
);
}
Status
=
EFI_SUCCESS
;
Status
|=
PatchProvideCurrentCpuInfoMSR35h
(
Patcher
,
CpuInfo
,
KernelVersion
);
Start
=
((
UINT8
*
)
MachoGetMachHeader
(
&
Patcher
->
MachContext
));
...
...
@@ -1337,7 +1349,6 @@ PatchProvideCurrentCpuInfo (
//
// Pull required symbols.
//
Status
=
EFI_SUCCESS
;
Status
|=
PatcherGetSymbolAddress
(
Patcher
,
"_tsc_init"
,
(
UINT8
**
)
&
TscInitFunc
);
Status
|=
PatcherGetSymbolAddress
(
Patcher
,
"_tmrCvt"
,
(
UINT8
**
)
&
TmrCvtFunc
);
...
...
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