diff --git a/Changelog.md b/Changelog.md
index 3ce67af9618183e578194cd7df6493199bade820..3e552f762a6554f3a7edae9636319a2ec8c3e8a2 100644
--- a/Changelog.md
+++ b/Changelog.md
@@ -8,6 +8,7 @@ OpenCore Changelog
 - Added script to build qemu recovery images to macrecovery
 - Fixed selecting `SecureBootModel` on hypervisors (should be `x86legacy`)
 - Added kext blocking `Strategy` for prelinked and newer
+- Added global MSR 35h fix to `ProvideCurrentCpuInfo`, allowing `-cpu host` in KVM
 
 #### v0.7.8
 - Updated ocvalidate to warn about insecure `DmgLoading` with secure `SecureBootModel` (already disallowed in runtime)
diff --git a/Docs/Configuration.md5 b/Docs/Configuration.md5
index 3c2378bf49355115715379cdf9fec8e1bd684a5c..f70a2f847982355caf3edc9b6a84643a2baab75f 100644
--- a/Docs/Configuration.md5
+++ b/Docs/Configuration.md5
@@ -1 +1 @@
-5653169e52602ebc7ba6439a3e23b6bc
+af8312e880f1b5c8f1773e840ef3dbf0
diff --git a/Docs/Configuration.pdf b/Docs/Configuration.pdf
index 8f787756ded2dbf0bae2016404b823550124b589..9f0dde10e27c3186965ddabd1ea7b27dac173041 100644
Binary files a/Docs/Configuration.pdf and b/Docs/Configuration.pdf differ
diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex
index 61b6ea71249f40b9c0aab1cceefd546b0a8ec599..12ba7dcc922a004922fec99e90d5a3b021a6d2b3 100755
--- a/Docs/Configuration.tex
+++ b/Docs/Configuration.tex
@@ -2721,6 +2721,8 @@ blocking.
   \tightlist
   \item For Microsoft Hyper-V it provides the correct TSC and FSB values
     to the kernel, as well as disables CPU topology validation (10.8+).
+  \item For KVM and other hypervisors it provides precomputed MSR 35h
+    values solving kernel panic with \texttt{-cpu host}.
   \item For Intel CPUs it adds support for asymmetrical SMP systems
     (e.g. Intel Alder Lake) by patching core count to thread count along
     with the supplemental required changes (10.14+).
diff --git a/Docs/Differences/Differences.pdf b/Docs/Differences/Differences.pdf
index 485b63bd4c598c6311541b49ae011376f0f8ce7a..83fdecd26f228e54514aa7791130bb62e69e1f95 100644
Binary files a/Docs/Differences/Differences.pdf and b/Docs/Differences/Differences.pdf differ
diff --git a/Docs/Differences/Differences.tex b/Docs/Differences/Differences.tex
index ddd0875790a46d8952cafaa687ee7b1678faecfc..f5536ecb29313d3c21b92878a72251ef416ad785 100644
--- a/Docs/Differences/Differences.tex
+++ b/Docs/Differences/Differences.tex
@@ -1,7 +1,7 @@
 \documentclass[]{article}
 %DIF LATEXDIFF DIFFERENCE FILE
-%DIF DEL PreviousConfiguration.tex   Sat Feb 12 00:03:53 2022
-%DIF ADD ../Configuration.tex        Sat Feb 12 00:03:53 2022
+%DIF DEL PreviousConfiguration.tex   Thu Feb 10 18:56:25 2022
+%DIF ADD ../Configuration.tex        Sat Feb 12 04:35:26 2022
 
 \usepackage{lmodern}
 \usepackage{amssymb,amsmath}
@@ -2786,7 +2786,9 @@ blocking.
   \tightlist
   \item For Microsoft Hyper-V it provides the correct TSC and FSB values
     to the kernel, as well as disables CPU topology validation (10.8+).
-  \item For Intel CPUs it adds support for asymmetrical SMP systems
+  \item For \DIFaddbegin \DIFadd{KVM and other hypervisors it provides precomputed MSR 35h
+    values solving kernel panic with }\texttt{\DIFadd{-cpu host}}\DIFadd{.
+  }\item \DIFadd{For }\DIFaddend Intel CPUs it adds support for asymmetrical SMP systems
     (e.g. Intel Alder Lake) by patching core count to thread count along
     with the supplemental required changes (10.14+).
   \end{itemize}
diff --git a/Docs/Errata/Errata.pdf b/Docs/Errata/Errata.pdf
index b4c823c08871b36398051d3d97ce151bfe01962c..c7c2ba7ce34379d01f6edeb2f4f84ace305c3b1b 100644
Binary files a/Docs/Errata/Errata.pdf and b/Docs/Errata/Errata.pdf differ
diff --git a/Library/OcAppleKernelLib/CpuidPatches.c b/Library/OcAppleKernelLib/CpuidPatches.c
index 08c674f467837d810def98cc3515261be7133d52..a83aeb2d9158c79c14a327f84e7c274ec8cd1bb1 100644
--- a/Library/OcAppleKernelLib/CpuidPatches.c
+++ b/Library/OcAppleKernelLib/CpuidPatches.c
@@ -1215,7 +1215,7 @@ mProvideCurrentCpuInfoTopologyCorePerPackageV2Patch = {
 
 STATIC
 EFI_STATUS
-PatchProvideCurrentCpuInfoForAmpCpu (
+PatchProvideCurrentCpuInfoMSR35h (
   IN OUT PATCHER_CONTEXT  *Patcher,
   IN     OC_CPU_INFO      *CpuInfo,
   IN     UINT32           KernelVersion
@@ -1223,6 +1223,7 @@ PatchProvideCurrentCpuInfoForAmpCpu (
 {
   EFI_STATUS  Status;
   UINT32      CoreThreadCount;
+  BOOLEAN     IsAmpCpu;
 
   //
   // TODO: We can support older, just there is no real need.
@@ -1233,8 +1234,20 @@ PatchProvideCurrentCpuInfoForAmpCpu (
     return EFI_SUCCESS;
   }
 
-  CoreThreadCount =
-    (((UINT32) CpuInfo->ThreadCount) << 16U) | ((UINT32) CpuInfo->ThreadCount);
+  IsAmpCpu = (CpuInfo->ThreadCount % CpuInfo->CoreCount) != 0;
+
+  //
+  // Provide real values for normal CPUs.
+  // Provide Thread=Thread for AMP (ADL) CPUs.
+  //
+  if (IsAmpCpu) {
+    CoreThreadCount =
+      (((UINT32) CpuInfo->ThreadCount) << 16U) | ((UINT32) CpuInfo->ThreadCount);
+  } else {
+    CoreThreadCount =
+      (((UINT32) CpuInfo->CoreCount) << 16U) | ((UINT32) CpuInfo->ThreadCount);
+  }
+
   CopyMem (
     &mProvideCurrentCpuInfoTopologyCoreCountReplace[1],
     &CoreThreadCount,
@@ -1248,7 +1261,7 @@ PatchProvideCurrentCpuInfoForAmpCpu (
 
   DEBUG ((DEBUG_INFO, "OCAK: Patching MSR 35h to %08x - %r\n", CoreThreadCount, Status));
 
-  if (EFI_ERROR (Status)) {
+  if (EFI_ERROR (Status) || !IsAmpCpu) {
     return Status;
   }
 
@@ -1318,9 +1331,8 @@ PatchProvideCurrentCpuInfo (
 
   ASSERT (Patcher != NULL);
 
-  if (!CpuInfo->Hypervisor && CpuInfo->Vendor[0] == CPUID_VENDOR_INTEL) {
-    return PatchProvideCurrentCpuInfoForAmpCpu (Patcher, CpuInfo, KernelVersion);
-  }
+  Status = EFI_SUCCESS;
+  Status |= PatchProvideCurrentCpuInfoMSR35h (Patcher, CpuInfo, KernelVersion);
 
   Start = ((UINT8 *) MachoGetMachHeader (&Patcher->MachContext));
 
@@ -1337,7 +1349,6 @@ PatchProvideCurrentCpuInfo (
   //
   // Pull required symbols.
   //
-  Status = EFI_SUCCESS;
   Status |= PatcherGetSymbolAddress (Patcher, "_tsc_init",        (UINT8 **) &TscInitFunc);
   Status |= PatcherGetSymbolAddress (Patcher, "_tmrCvt",          (UINT8 **) &TmrCvtFunc);