riscv64-nemu,cte: delegate everything and enter S-mode

See merge request projectn/nexus-am!23

Start 0x80000000

See merge request projectn/nexus-am!22

riscv64-nemu,vme: fix wrong mode for sv39

See merge request projectn/nexus-am!21

riscv64-nemu,vme: refactor ptw

See merge request projectn/nexus-am!20

Riscv64 nemu sv39

See merge request projectn/nexus-am!19

* CLINT should be included by MMIO virtual memory space in vme

Fix navy litenes

See merge request projectn/nexus-am!18

* TODO: support mainargs in navy by envp

riscv64-noop,cte: enable meip

See merge request projectn/nexus-am!17

test,softmdutest: fix compile error for riscv64

See merge request projectn/nexus-am!16

Cache

See merge request projectn/nexus-am!15

Mtime

See merge request projectn/nexus-am!14

* pass interrupt test in amtest

riscv64-noop,input: add number key

See merge request projectn/nexus-am!13

Fence.i test

See merge request projectn/nexus-am!12

* The original code is not PIC, since it accesses a gloabl array. If we
  copy the code to somewhere else, it cannot access that global array
  any longer. To fix this, we pass the global array as function argument
  to make the code PIC.
* Now NOOP can pass the loader test with fence.i.

riscv64-noop,cte: use machine mode CSR

See merge request projectn/nexus-am!11

feat(rv64): update am to support riscv64-nanos

See merge request projectn/nexus-am!10

riscv64-nemu,cte: support timer interrupt from clint

See merge request projectn/nexus-am!9

feat(rv64): set up rv64 difftest environment

See merge request projectn/nexus-am!8