提交 · 9f57f652403e63c5641c1b73bd1f8b607a4c2556 · OpenXiangShan / NEMU

19 10月, 2019 6 次提交
- Z
  riscv64,exec: fix bug of instruction accross page boundary · 9f57f652
  由 Zihao Yu 提交于 10月 19, 2019
```
* With RVC, an instruction may cross page boundary. To fix this, we
  should fetch twice.
```
  9f57f652
- Z
  
  riscv64,mmu: add page fault exceptions · 450f26e3
  由 Zihao Yu 提交于 10月 19, 2019
  
  450f26e3
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  riscv64,intr: add longjmp_raise_intr() · a57e022a
  由 Zihao Yu 提交于 10月 19, 2019
  
  a57e022a
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  riscv64,csr: fix delegation · f986a097
  由 Zihao Yu 提交于 10月 19, 2019
```
* machine level interrupts can not be delegated
```
  f986a097
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  riscv64,clint: associate with mtip · 8408dbe7
  由 Zihao Yu 提交于 10月 19, 2019
  
  8408dbe7
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  riscv64,csr: add mip and sip · 1c1555e0
  由 Zihao Yu 提交于 10月 19, 2019
  
  1c1555e0
15 10月, 2019 3 次提交
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  riscv64,intr: fix the condition of interrupt taken with delegation · 6f00141f
  由 Zihao Yu 提交于 10月 15, 2019
  
  6f00141f
- Z
  
  riscv64,mmu: support access bit and dirty bit · 21bd508b
  由 Zihao Yu 提交于 10月 15, 2019
  
  21bd508b
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  riscv64,exec,fence: correctly synchronize with QEMU by difftest_skip_dut() · 5df83c11
  由 Zihao Yu 提交于 10月 15, 2019
  
  5df83c11
14 10月, 2019 22 次提交
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  riscv64,csr: correctly implement sstatus and sie · 5d13ff5a
  由 Zihao Yu 提交于 10月 14, 2019
```
* They are really the subset of mstatus and mie. We should refactor the
  access of CSR to support this.
```
  5d13ff5a
- Z
  
  riscv64,csr: change macro variable name: val -> addr · c79ac84f
  由 Zihao Yu 提交于 10月 14, 2019
  
  c79ac84f
- Z
  
  riscv64: add cpu.mode · 632882bd
  由 Zihao Yu 提交于 10月 14, 2019
  
  632882bd
- Z
  
  riscv64,exec: fix wrong immediate length · 9934cd86
  由 Zihao Yu 提交于 10月 13, 2019
  
  9934cd86
- Z
  
  riscv64,system: add S-mode priviledge instructions · a8e95f9f
  由 Zihao Yu 提交于 10月 13, 2019
  
  a8e95f9f
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  riscv64,exec: add amoswap · 38812d0f
  由 Zihao Yu 提交于 10月 13, 2019
  
  38812d0f
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  riscv64,csr: add more CSRs · f46f7a30
  由 Zihao Yu 提交于 10月 13, 2019
  
  f46f7a30
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  qemu-diff,riscv64: do not enter S-mode · 7747578e
  由 Zihao Yu 提交于 10月 13, 2019
  
  7747578e
- Z
  Merge branch 'reset-at-0' into 'rv64' · 607434b1
  由 Zihao Yu 提交于 10月 14, 2019
```
Reset at 0

See merge request projectn/nemu!23
```
  607434b1
- Z
  
  monitor: move mainargs to PC_START + 0x1000 · 3a959023
  由 Zihao Yu 提交于 10月 14, 2019
  
  3a959023
- Z
  
  memory: change IMAGE_START to 0 · bf62c213
  由 Zihao Yu 提交于 10月 14, 2019
  
  bf62c213
- Z
  Merge branch 'serial-16550' into 'rv64' · 3a7598f1
  由 Zihao Yu 提交于 10月 14, 2019
```
Serial 16550

See merge request projectn/nemu!22
```
  3a7598f1
- Z
  
  device,serial: support rx ready flag · cdc08b1b
  由 Zihao Yu 提交于 10月 14, 2019
  
  cdc08b1b
- Z
  
  device,serial: add registers to keep compatible to 16550 · be9e35ba
  由 Zihao Yu 提交于 10月 13, 2019
  
  be9e35ba
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  Merge branch 'getopt-long' into 'rv64' · 36630311
  由 Zihao Yu 提交于 10月 14, 2019
```
Getopt long

See merge request projectn/nemu!21
```
  36630311
- Z
  
  monitor: update usage · 91c4e076
  由 Zihao Yu 提交于 10月 14, 2019
  
  91c4e076
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  monitor: support long option, also change -a to -m · a457ff8c
  由 Zihao Yu 提交于 10月 14, 2019
  
  a457ff8c
- Z
  Merge branch 'improve-debug' into 'rv64' · 1b866a65
  由 Zihao Yu 提交于 10月 14, 2019
```
Improve debug

See merge request projectn/nemu!20
```
  1b866a65
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  monitor,cpu-exec: fix compile error · 5659ca97
  由 Zihao Yu 提交于 10月 14, 2019
  
  5659ca97
- Z
  monitor,cpu-exec: call abort() when return with NEMU_ABORT · 1802f032
  由 Zihao Yu 提交于 10月 14, 2019
```
* This can let gdb catch the abort signal to observe detail state of
  NEMU, instead of exiting.
```
  1802f032
- Z
  monitor: control when to print the log by instr count · b473fcf6
  由 Zihao Yu 提交于 10月 14, 2019
```
* this makes it easy to filter unnecessary log far from the crash point
```
  b473fcf6
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  debug: display reg info and instr count after Assert fails · cbabbe49
  由 Zihao Yu 提交于 10月 14, 2019
  
  cbabbe49
12 10月, 2019 4 次提交
- Z
  Merge branch 'fix-riscv64-mmu' into 'rv64' · ce6f7448
  由 Zihao Yu 提交于 10月 12, 2019
```
riscv64,mmu: fix wrong mode for sv39

See merge request projectn/nemu!19
```
  ce6f7448
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  riscv64,mmu: fix wrong mode for sv39 · 9defcd71
  由 Zihao Yu 提交于 10月 12, 2019
  
  9defcd71
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  Merge branch 'riscv64-ptw-refactor' into 'rv64' · cb5c27d6
  由 Zihao Yu 提交于 10月 12, 2019
```
riscv64,mmu: refactor page_walk

See merge request projectn/nemu!18
```
  cb5c27d6
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  riscv64,mmu: refactor page_walk · 2c1e4be1
  由 Zihao Yu 提交于 10月 12, 2019
  
  2c1e4be1
11 10月, 2019 3 次提交
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  Merge branch 'riscv64-sv39' into 'rv64' · 5beb8194
  由 Zihao Yu 提交于 10月 11, 2019
```
Riscv64 sv39

See merge request projectn/nemu!17
```
  5beb8194
- Z
  riscv64,clint: move CLINT to 0xa2000000 · 803f67e5
  由 Zihao Yu 提交于 10月 11, 2019
```
* CLINT should be included by MMIO virtual memory space in AM
```
  803f67e5
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  riscv64,mmu: support sv39 paging · cc081ec8
  由 Zihao Yu 提交于 10月 11, 2019
  
  cc081ec8
10 10月, 2019 2 次提交
- Z
  Merge branch 'rvc-bugfix' into 'rv64' · 7bd56bb6
  由 Zihao Yu 提交于 10月 10, 2019
```
Rvc bugfix

See merge request projectn/nemu!16
```
  7bd56bb6
- W
  
  fix(rv64): fix a rv64c decode conflict · 64d5193a
  由 William Wang 提交于 10月 09, 2019
  
  64d5193a

OpenXiangShan / NEMU 11 个月 前同步成功

OpenXiangShan / NEMU
11 个月前同步成功