* it seems that new versions of mips32-qemu changes the behavior of
  delay slot at the end of the page

* Most of paddr accessings are pmem, so we can check whether it is pmem
  accessing first.

* But we can not fully keep them the same, since currently the user
  stack is located in kernel space. Let the user process access the
  stack will raise a bus error exception in QEMU.

* it is not easy to hide the details of riscv privileged architecture if
  we use M mode and S mode together