* calling setjmp() at the beginning of exec() will reduce performance

* now the set of API to abstract the behavior of different ISAs are
  listed in include/isa.h
* ISA-dependent structure and macro definitions used by non-ISA code are
  listed in include/$ISA.h

* this is used to support difftest with some csrs for riscv64, taking
  NEMU as REF
* consider redesign the difftest API in the future
  * for example, make difftest_(get|set)regs() ISA-dependent

* If an RVC instruction is at the end of page boundary, we should not
  fetch 4 bytes. Otherwise, we may trigger an IPF when fetching the
  remaining 2 bytes at the beginning of the next page, which is
  inconsistent with the behavior of the RISC-V priviledged manual.

* In such a case, we should first fetch 2 byte. If it is an RVC
  instruction, then execute it without fetching the remaining 2 bytes.
  If it is not an RVC instruciton, then fetching the remaining 2 bytes
  to obtain a 4-byte instruction.

* this can help to reduce idle time in Linux

* linux drivers really use it

* An illegal instruction will be emulated in M-mode. It may trigger page
  fault during the emulation. In such a situation, we should record the
  bad address in mtval instead of stval, and trap into M-mode again. The
  M-mode handler will distribute this page fault exception to S-mode by
  software code.
* If we do not set mtval in such case, the software handler will
  distribute the page fault exception with a garbage mtval set to stval,
  causing kernel panic by a real page fault.

* QEMU does not use an LR bit. Is it safe enough?

* An AMO instruction may trigger page fault when storing the result back
  to memory. In such a case, we should not update the dest register. To
  fix this issue, we delay the register writeback after the store
  operation.