未验证 提交 eb5564af 编写于 作者: C Cai Yudong 提交者: GitHub

fix Milvus docker image report illegal instruction (#2598)

Signed-off-by: Nyudong.cai <yudong.cai@zilliz.com>
上级 b6b56a08
......@@ -6,6 +6,7 @@ Please mark all changes in change log and use the issue from GitHub
## Bug
- \#2487 Remove timeout when creating collection in dev test
- \#2532 Fix Milvus docker image report illegal instruction
- \#2551 Fix test_hybrid_db and test_rpc error
- \#2582 CreateHybridIndex.cpp compile error
......
......@@ -3,6 +3,7 @@
#include <array>
#include <bitset>
#include <cpuid.h>
#include <cstring>
#include <iostream>
#include <string>
......@@ -10,58 +11,6 @@
namespace faiss {
#if defined(__i386__) && defined(__PIC__)
/* %ebx may be the PIC register. */
#if __GNUC__ >= 3
#define __cpuid(level, a, b, c, d) \
__asm__( \
"xchg{l}\t{%%}ebx, %1\n\t" \
"cpuid\n\t" \
"xchg{l}\t{%%}ebx, %1\n\t" \
: "=a"(a), "=r"(b), "=c"(c), "=d"(d) \
: "0"(level))
#define __cpuid_count(level, count, a, b, c, d) \
__asm__( \
"xchg{l}\t{%%}ebx, %1\n\t" \
"cpuid\n\t" \
"xchg{l}\t{%%}ebx, %1\n\t" \
: "=a"(a), "=r"(b), "=c"(c), "=d"(d) \
: "0"(level), "2"(count))
#else /* __GNUC__ >= 3 */
/* Host GCCs older than 3.0 weren't supporting Intel asm syntax
nor alternatives in i386 code. */
#define __cpuid(level, a, b, c, d) \
__asm__( \
"xchgl\t%%ebx, %1\n\t" \
"cpuid\n\t" \
"xchgl\t%%ebx, %1\n\t" \
: "=a"(a), "=r"(b), "=c"(c), "=d"(d) \
: "0"(level))
#define __cpuid_count(level, count, a, b, c, d) \
__asm__( \
"xchgl\t%%ebx, %1\n\t" \
"cpuid\n\t" \
"xchgl\t%%ebx, %1\n\t" \
: "=a"(a), "=r"(b), "=c"(c), "=d"(d) \
: "0"(level), "2"(count))
#endif /* __GNUC__ >= 3 */
#else /* defined(__i386__) && defined(__PIC__) */
#define __cpuid(level, a, b, c, d) __asm__("cpuid\n\t" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(level))
#define __cpuid_count(level, count, a, b, c, d) \
__asm__("cpuid\n\t" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(level), "2"(count))
#endif /* defined(__i386__) && defined(__PIC__) */
class InstructionSet {
public:
static InstructionSet&
......
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