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rt-thread

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提交 efda5106 编写于 作者: mysterywolf's avatar mysterywolf
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Merge branch 'master' into pico

上级 f766999a f50fbb03
展开全部 隐藏空白更改
内联 并排
Showing with 44577 addition and 3548 deletion
.github/workflows/action.yml
浏览文件 @ efda5106
...@@ -37,6 +37,7 @@ jobs: ...@@ -37,6 +37,7 @@ jobs:
- {RTT_BSP: "at91/at91sam9g45", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "at91/at91sam9g45", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "at91/at91sam9260", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "at91/at91sam9260", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "allwinner_tina", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "allwinner_tina", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "cypress/psoc6-cy8cproto-4343w", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "ft32/ft32f072xb-starter", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "ft32/ft32f072xb-starter", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "gd32/arm/gd32103c-eval", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "gd32/arm/gd32103c-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "gd32/arm/gd32105c-eval", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "gd32/arm/gd32105c-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
......
bsp/ESP32_C3/.config
浏览文件 @ efda5106
...@@ -62,7 +62,9 @@ CONFIG_RT_USING_HEAP=y ...@@ -62,7 +62,9 @@ CONFIG_RT_USING_HEAP=y
CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set # CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set
# CONFIG_RT_USING_CONSOLE is not set CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=256
CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
CONFIG_RT_VER_NUM=0x40101 CONFIG_RT_VER_NUM=0x40101
# CONFIG_RT_USING_CPU_FFS is not set # CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
...@@ -73,7 +75,21 @@ CONFIG_RT_VER_NUM=0x40101 ...@@ -73,7 +75,21 @@ CONFIG_RT_VER_NUM=0x40101
CONFIG_RT_USING_COMPONENTS_INIT=y CONFIG_RT_USING_COMPONENTS_INIT=y
# CONFIG_RT_USING_USER_MAIN is not set # CONFIG_RT_USING_USER_MAIN is not set
# CONFIG_RT_USING_LEGACY is not set # CONFIG_RT_USING_LEGACY is not set
# CONFIG_RT_USING_MSH is not set CONFIG_RT_USING_MSH=y
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_CMD_SIZE=80
CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10
# CONFIG_RT_USING_DFS is not set # CONFIG_RT_USING_DFS is not set
# CONFIG_RT_USING_FAL is not set # CONFIG_RT_USING_FAL is not set
...@@ -82,7 +98,11 @@ CONFIG_RT_USING_COMPONENTS_INIT=y ...@@ -82,7 +98,11 @@ CONFIG_RT_USING_COMPONENTS_INIT=y
# #
CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_USING_DEVICE_IPC=y
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
# CONFIG_RT_USING_SERIAL is not set CONFIG_RT_USING_SERIAL=y
CONFIG_RT_USING_SERIAL_V1=y
# CONFIG_RT_USING_SERIAL_V2 is not set
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set # CONFIG_RT_USING_CPUTIME is not set
...@@ -620,9 +640,12 @@ CONFIG_BSP_BOARD_LUATOS_ESP32C3=y ...@@ -620,9 +640,12 @@ CONFIG_BSP_BOARD_LUATOS_ESP32C3=y
# Onboard Peripheral Drivers # Onboard Peripheral Drivers
# #
CONFIG_RT_BSP_LED_PIN=12 CONFIG_RT_BSP_LED_PIN=12
CONFIG_RT_BSP_UART_PORT=0
CONFIG_RT_BSP_UART_TX_PIN=21
CONFIG_RT_BSP_UART_RX_PIN=20
# #
# On-chip Peripheral Drivers # On-chip Peripheral Drivers
# #
CONFIG_BSP_USING_GPIO=y CONFIG_BSP_USING_GPIO=y
# CONFIG_BSP_USING_UART is not set CONFIG_BSP_USING_UART=y
bsp/ESP32_C3/0001-add-the-config-of-RTTHREAD.patch 已删除 100644 → 0
浏览文件 @ f766999a
From 317ee995e9d530587bfb14439b3b1ee38d1afe77 Mon Sep 17 00:00:00 2001
From: supperthomas <78900636@qq.com>
Date: Fri, 6 May 2022 23:06:28 +0800
Subject: [PATCH] add the config of RTTHREAD
add the init link file
---
Kconfig | 4 +
.../esp_system/ld/esp32c3/sections.ld.in | 26 +++
components/freertos/port/port_common.c | 5 +
components/freertos/port/port_systick.c | 3 +
components/riscv/vectors.S | 220 ++++++++++++++++--
5 files changed, 239 insertions(+), 19 deletions(-)
diff --git a/Kconfig b/Kconfig
index 928d274106..d368adaa37 100644
--- a/Kconfig
+++ b/Kconfig
@@ -61,6 +61,10 @@ mainmenu "Espressif IoT Development Framework Configuration"
bool
default "y" if IDF_TARGET="linux"
+ config IDF_RTOS_RTTHREAD
+ bool "RT-THREAD SELECT"
+ default "n"
+
config IDF_FIRMWARE_CHIP_ID
hex
default 0x0000 if IDF_TARGET_ESP32
diff --git a/components/esp_system/ld/esp32c3/sections.ld.in b/components/esp_system/ld/esp32c3/sections.ld.in
index 0ebeda06c1..8215237fff 100644
--- a/components/esp_system/ld/esp32c3/sections.ld.in
+++ b/components/esp_system/ld/esp32c3/sections.ld.in
@@ -183,6 +183,32 @@ SECTIONS
_noinit_end = ABSOLUTE(.);
} > dram0_0_seg
+ .stack_dummy (COPY):
+ {
+ . = ALIGN(8);
+ __STACKSIZE__ = 40960;
+ __stack_start__ = .;
+ *(.stack*)
+ . += __STACKSIZE__;
+ __stack_cpu0 = .;
+ __stack_end__ = .;
+ } > dram0_0_seg
+
+ .stack_dummy (COPY):
+ {
+ . = ALIGN(8);
+ __HEAPSIZE__ = 40960;
+ __heap_start__ = .;
+ . += __STACKSIZE__;
+ __heap_end__ = .;
+ /* section information for initial. */
+ . = ALIGN(4);
+ __rt_init_start = .;
+ KEEP(*(SORT(.rti_fn*)))
+ __rt_init_end = .;
+
+ . = ALIGN(4);
+ } > dram0_0_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
diff --git a/components/freertos/port/port_common.c b/components/freertos/port/port_common.c
index ffca3d5429..9d8159f588 100644
--- a/components/freertos/port/port_common.c
+++ b/components/freertos/port/port_common.c
@@ -74,11 +74,16 @@ void esp_startup_start_app_common(void)
esp_gdbstub_init();
#endif // CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME
+#ifdef CONFIG_IDF_RTOS_RTTHREAD
+ app_main();
+#else
portBASE_TYPE res = xTaskCreatePinnedToCore(&main_task, "main",
ESP_TASK_MAIN_STACK, NULL,
ESP_TASK_MAIN_PRIO, NULL, ESP_TASK_MAIN_CORE);
assert(res == pdTRUE);
(void)res;
+#endif
+
}
static void main_task(void* args)
diff --git a/components/freertos/port/port_systick.c b/components/freertos/port/port_systick.c
index 0c14a155a1..0fa203574b 100644
--- a/components/freertos/port/port_systick.c
+++ b/components/freertos/port/port_systick.c
@@ -116,6 +116,8 @@ void vPortSetupTimer(void)
*/
IRAM_ATTR void SysTickIsrHandler(void *arg)
{
+#ifdef CONFIG_IDF_RTOS_RTTHREAD
+#else
uint32_t cpuid = xPortGetCoreID();
systimer_hal_context_t *systimer_hal = (systimer_hal_context_t *)arg;
#ifdef CONFIG_PM_TRACE
@@ -144,6 +146,7 @@ IRAM_ATTR void SysTickIsrHandler(void *arg)
#ifdef CONFIG_PM_TRACE
ESP_PM_TRACE_EXIT(TICK, cpuid);
#endif
+#endif
}
#endif // CONFIG_FREERTOS_SYSTICK_USES_CCOUNT
diff --git a/components/riscv/vectors.S b/components/riscv/vectors.S
index 1006d5bea5..963494fcb3 100644
--- a/components/riscv/vectors.S
+++ b/components/riscv/vectors.S
@@ -17,6 +17,9 @@
#include "soc/soc_caps.h"
#include "sdkconfig.h"
+#define STORE sw
+#define LOAD lw
+#define REGBYTES 4
.equ SAVE_REGS, 32
.equ CONTEXT_SIZE, (SAVE_REGS * 4)
@@ -218,25 +221,27 @@ _call_panic_handler:
*/
.global _interrupt_handler
.type _interrupt_handler, @function
+#ifndef CONFIG_IDF_RTOS_RTTHREAD
+
_interrupt_handler:
/* entry */
- save_regs
- save_mepc
+ save_regs /* 保存寄存器 */
+ save_mepc /* 保存MEPC */
/* Before doing anythig preserve the stack pointer */
/* It will be saved in current TCB, if needed */
- mv a0, sp
+ mv a0, sp /* 保存SP a0 = sp */
call rtos_int_enter
/* Before dispatch c handler, restore interrupt to enable nested intr */
- csrr s1, mcause
- csrr s2, mstatus
+ csrr s1, mcause /* 保存mcause s1 = mcause */
+ csrr s2, mstatus /* 保存mstatus s2 = mstatus */
- /* Save the interrupt threshold level */
- la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
- lw s3, 0(t0)
+ /* Save the interrupt threshold level 保存中断嵌套层数? */
+ la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG /* 保存mstatus t0 = &INTERRUPT_CORE0_CPU_INT_THRESH_REG */
+ lw s3, 0(t0) /* s3 = mstatus */
- /* Increase interrupt threshold level */
+ /* Increase interrupt threshold level 增加中断嵌套层数*/
li t2, 0x7fffffff
and t1, s1, t2 /* t1 = mcause & mask */
slli t1, t1, 2 /* t1 = mcause * 4 */
@@ -247,8 +252,8 @@ _interrupt_handler:
sw t2, 0(t0) /* INTERRUPT_CORE0_CPU_INT_THRESH_REG = t2 */
fence
- li t0, 0x8
- csrrs t0, mstatus, t0
+ li t0, 0x8 /* t0 = 8 */
+ csrrs t0, mstatus, t0 /*设置状态MIE寄存器，开总中断*/
#ifdef CONFIG_PM_TRACE
li a0, 0 /* = ESP_PM_TRACE_IDLE */
@@ -269,34 +274,211 @@ _interrupt_handler:
/* call the C dispatcher */
mv a0, sp /* argument 1, stack pointer */
mv a1, s1 /* argument 2, interrupt number (mcause) */
- /* mask off the interrupt flag of mcause */
+ /* mask off the interrupt flag of mcause 屏幕异常中断*/
li t0, 0x7fffffff
and a1, a1, t0
jal _global_interrupt_handler
- /* After dispatch c handler, disable interrupt to make freertos make context switch */
+ /* After dispatch c handler, disable interrupt to make freertos make context switch
+ 在调用c函数之后，disable 中断让freertos能够做内容切换
+ */
li t0, 0x8
- csrrc t0, mstatus, t0
+ csrrc t0, mstatus, t0 /*清状态MIE寄存器 关总中断*/
- /* restore the interrupt threshold level */
+
+ /* restore the interrupt threshold level 中断嵌套 */
la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
sw s3, 0(t0)
fence
/* Yield to the next task is needed: */
- mv a0, sp
+ mv a0, sp /* a0 = sp*/
call rtos_int_exit
/* The next (or current) stack pointer is returned in a0 */
- mv sp, a0
+ mv sp, a0 /* sp = a0*/
/* restore the rest of the registers */
- csrw mcause, s1
- csrw mstatus, s2
+ csrw mcause, s1 /* mcause = s1 */
+ csrw mstatus, s2 /* mstatus = s2 */
restore_mepc
restore_regs
/* exit, this will also re-enable the interrupts */
mret
.size _interrupt_handler, .-_interrupt_handler
+#else
+_interrupt_handler:
+ /* 此时CPU的sp = from_thread->sp */
+ /* 注意： 在这里，并没有将mepc的值赋值为from_thread栈中的epc，但后面会赋值 */
+ addi sp, sp, -32 * REGBYTES /* sp = sp - 32 * 4 栈指针向下偏移32个寄存器长度，用来将CPU的寄存器保存到from_thread的栈中*/
+ STORE x1, 1 * REGBYTES(sp) /* 将CPU的x1寄存器，即ra寄存器，保存到from_thread->栈中 */
+
+ li t0, 0x80 /* t0 = 0x80 */
+ STORE t0, 2 * REGBYTES(sp) /* mstatus = t0, 即关闭全局中断 */
+
+ /* 将 CPU 的其他寄存器的值，保存到from_thread的任务栈中 */
+ STORE x4, 4 * REGBYTES(sp)
+ STORE x5, 5 * REGBYTES(sp)
+ STORE x6, 6 * REGBYTES(sp)
+ STORE x7, 7 * REGBYTES(sp)
+ STORE x8, 8 * REGBYTES(sp)
+ STORE x9, 9 * REGBYTES(sp)
+ STORE x10, 10 * REGBYTES(sp)
+ STORE x11, 11 * REGBYTES(sp)
+ STORE x12, 12 * REGBYTES(sp)
+ STORE x13, 13 * REGBYTES(sp)
+ STORE x14, 14 * REGBYTES(sp)
+ STORE x15, 15 * REGBYTES(sp)
+ STORE x16, 16 * REGBYTES(sp)
+ STORE x17, 17 * REGBYTES(sp)
+ STORE x18, 18 * REGBYTES(sp)
+ STORE x19, 19 * REGBYTES(sp)
+ STORE x20, 20 * REGBYTES(sp)
+ STORE x21, 21 * REGBYTES(sp)
+ STORE x22, 22 * REGBYTES(sp)
+ STORE x23, 23 * REGBYTES(sp)
+ STORE x24, 24 * REGBYTES(sp)
+ STORE x25, 25 * REGBYTES(sp)
+ STORE x26, 26 * REGBYTES(sp)
+ STORE x27, 27 * REGBYTES(sp)
+ STORE x28, 28 * REGBYTES(sp)
+ STORE x29, 29 * REGBYTES(sp)
+ STORE x30, 30 * REGBYTES(sp)
+ STORE x31, 31 * REGBYTES(sp)
+
+ /* 备份 CPU 的 sp (这时，CPU的sp其实就是from thread的sp指针) 寄存器的值到 s0 寄存器中，下面会使用s0，恢复 CPU 的寄存器 */
+ move s0, sp /* s0 = sp */
+
+ /* 在中断函数中，中断函数中调用的C函数，需要使用 sp， 这里，在中断函数中，使用的 sp 为，系统的栈资源 */
+ /* switch to interrupt stack */
+ la sp, __stack_end__ /* sp = _sp */
+
+ /* interrupt handle */
+ /* 注意： 在调用C函数之前,比如sp的值为0x30001000, 在执行完C函数后，sp的值还是会变成 0x30001000 */
+ call rt_interrupt_enter /* 执行所有的中断函数前，调用该函数 */
+
+ csrr s1, mcause
+ csrr s2, mstatus
+
+ /* Save the interrupt threshold level */
+ la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
+ lw s3, 0(t0)
+
+ li t2, 0x7fffffff
+ and t1, s1, t2 /* t1 = mcause & mask */
+ slli t1, t1, 2 /* t1 = mcause * 4 */
+ la t2, INTC_INT_PRIO_REG(0)
+ add t1, t2, t1 /* t1 = INTC_INT_PRIO_REG + 4 * mcause */
+ lw t2, 0(t1) /* t2 = INTC_INT_PRIO_REG[mcause] */
+ addi t2, t2, 1 /* t2 = t2 +1 */
+ sw t2, 0(t0) /* INTERRUPT_CORE0_CPU_INT_THRESH_REG = t2 */
+ fence
+
+ li t0, 0x8
+ csrrs t0, mstatus, t0
+
+ /* call the C dispatcher */
+ mv a0, sp /* argument 1, stack pointer */
+ mv a1, s1 /* argument 2, interrupt number (mcause) */
+ /* mask off the interrupt flag of mcause */
+ li t0, 0x7fffffff
+ and a1, a1, t0
+ jal _global_interrupt_handler
+
+ li t0, 0x8
+ csrrc t0, mstatus, t0
+
+ /* restore the interrupt threshold level */
+ la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
+ sw s3, 0(t0)
+ fence
+
+ call rt_interrupt_leave /* 执行所有的中断函数后，调用该函数 */
+
+ /* 上面，将保存执行中断服务函数之前的CPU的sp寄存器到了s0所指向的位置处，当执行完中断服务函数，需要将之前的CPU寄存器，恢复一下,此时sp又变成了from thread的sp了 */
+ move sp, s0 /* sp = s0 */
+
+ /* 下面两句话，相当于将 rt_thread_switch_interrupt_flag 值，赋值给了s2 */
+ /* 将 rt_thread_switch_interrupt_flag 的地址值，赋值给 s0 寄存器*/
+ la s0, rt_thread_switch_interrupt_flag /* s0 = &rt_thread_switch_interrupt_flag */
+ /* 将 s0 所指向的地址处的内容，取出来，赋值给 s2 寄存器，其实就是将 rt_thread_switch_interrupt_flag 的值，赋值给了 s2 寄存器*/
+ lw s2, 0(s0) /* s2 = *s0 = rt_thread_switch_interrupt_flag */
+
+ /* 如果 s2的值，即 rt_thread_switch_interrupt_flag 值，如果不为0，则需要继续执行下一条指令，如果为0，则需要跳转到 spurious_interrupt 标号处 执行 */
+ /* 如果 s2的值等于0，rt_thread_switch_interrupt_flag等于0， 则不需要在中断处理函数中，进行上下文切换，反之则需要 */
+ /* 如果不需要上下文切换， */
+
+ /* 在这里，跳转到 spurious_interrupt的话，是不会进行上下文切换的，因为，此时CPU的sp指针还是from线程的*/
+ beqz s2, spurious_interrupt /* if (s2 == 0) goto spurious_interrupt; else 执行下一条语句*/
+
+ /* 需要上下文切换： 主要目的是将CPU的sp指针，赋值为to_thread的sp */
+
+ /* 将 s0 所执向的地址的内容设置为0， 也就是，将变量 rt_thread_switch_interrupt_flag 赋值为了 0 */
+ /* s0存放的值是 rt_thread_switch_interrupt_flag 变量的地址*/
+ sw zero, 0(s0) /* *s0 = 0; 也就是 rt_thread_switch_interrupt_flag = 0 */
+ /* 将 mepc 的值，赋值给 a0 寄存器，mepc 的值是，跳转到中断函数执行之前的 PC 指针 */
+ /* 这时的mpec其实，还是from线程，在跳转到中断执行前的一个PC地址 */
+ csrr a0, mepc /* a0 = mepc */
+
+ /* 将 mpec 的值写回到freom thread任务栈中的 epc 中,待后续，恢复from线程时，使用 */
+ STORE a0, 0 * REGBYTES(sp) /* from_thread->sp->epc = a0 ，中断入口处*/
+
+ /* 将from_thread的sp指针，赋值为CPU的sp指针 */
+ la s0, rt_interrupt_from_thread /* s0 = &rt_interrupt_from_thread 注意： rt_interrupt_from_thread = &(from_thread->sp) */
+ LOAD s1, 0(s0) /* s1 = rt_interrupt_from_thread，也就是s1 = &(from_thread->sp) */
+ STORE sp, 0(s1) /* from_thread->sp = sp*/
+
+ /* 接下来，需要开始恢复CPU的sp为to_thread的sp了 */
+ la s0, rt_interrupt_to_thread /* s0 = &rt_interrupt_to_thread 注意： rt_interrupt_to_thread = &(to_thred->sp)*/
+ LOAD s1, 0(s0) /* s1 = rt_interrupt_to_thread, 也就是s1 = &(to_thred->sp) */
+ LOAD sp, 0(s1) /* sp = (to_thred->sp)*/
+
+ /* 将CPU的 mepc设置为to_thred的mepc，待中断退出，执行mret指令后，将从该地址开始执行 */
+ LOAD a0, 0 * REGBYTES(sp) /* a0 = to_thread的mepc的值*/
+ csrw mepc, a0 /* mepc = a0 */
+
+
+spurious_interrupt:
+ LOAD x1, 1 * REGBYTES(sp)
+
+ /* Remain in M-mode after mret */
+ li t0, 0x00001800
+ csrs mstatus, t0
+ LOAD t0, 2 * REGBYTES(sp)
+ csrs mstatus, t0
+
+ LOAD x4, 4 * REGBYTES(sp)
+ LOAD x5, 5 * REGBYTES(sp)
+ LOAD x6, 6 * REGBYTES(sp)
+ LOAD x7, 7 * REGBYTES(sp)
+ LOAD x8, 8 * REGBYTES(sp)
+ LOAD x9, 9 * REGBYTES(sp)
+ LOAD x10, 10 * REGBYTES(sp)
+ LOAD x11, 11 * REGBYTES(sp)
+ LOAD x12, 12 * REGBYTES(sp)
+ LOAD x13, 13 * REGBYTES(sp)
+ LOAD x14, 14 * REGBYTES(sp)
+ LOAD x15, 15 * REGBYTES(sp)
+ LOAD x16, 16 * REGBYTES(sp)
+ LOAD x17, 17 * REGBYTES(sp)
+ LOAD x18, 18 * REGBYTES(sp)
+ LOAD x19, 19 * REGBYTES(sp)
+ LOAD x20, 20 * REGBYTES(sp)
+ LOAD x21, 21 * REGBYTES(sp)
+ LOAD x22, 22 * REGBYTES(sp)
+ LOAD x23, 23 * REGBYTES(sp)
+ LOAD x24, 24 * REGBYTES(sp)
+ LOAD x25, 25 * REGBYTES(sp)
+ LOAD x26, 26 * REGBYTES(sp)
+ LOAD x27, 27 * REGBYTES(sp)
+ LOAD x28, 28 * REGBYTES(sp)
+ LOAD x29, 29 * REGBYTES(sp)
+ LOAD x30, 30 * REGBYTES(sp)
+ LOAD x31, 31 * REGBYTES(sp)
+
+ addi sp, sp, 32 * REGBYTES
+ mret
+ .size _interrupt_handler, .-_interrupt_handler
+#endif
--
2.35.1.windows.2
bsp/ESP32_C3/README.md
浏览文件 @ efda5106
...@@ -45,7 +45,7 @@ ...@@ -45,7 +45,7 @@
| **片上外设** | **支持情况** | **备注** | | **片上外设** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- | | :----------------- | :----------: | :------------------------------------- |
| GPIO | 支持 | | | GPIO | 支持 | |
| UART | 支持中 | | | UART | 支持 | 使用LUATOS_ESP32C3开发板需要在UART0_TX和UART0_RX连接串口转USB芯片（如CP2102）|
| JTAG调试 | 支持 | ESP32C3采用USB方式和PC链接的开发板可以调试 | | JTAG调试 | 支持 | ESP32C3采用USB方式和PC链接的开发板可以调试 |
## 使用说明 ## 使用说明
...@@ -58,15 +58,15 @@ IDF的搭建方法有很多种，尝试了很多种方法之后，总结了一 ...@@ -58,15 +58,15 @@ IDF的搭建方法有很多种，尝试了很多种方法之后，总结了一
### ESP-IDF 添加RT-THREAD patch ### ESP-IDF 添加RT-THREAD patch
由于IDF使用的是FREERTOS，如果需要使用rt-thread就需要修改一些文件。将`0001-add-the-config-of-RTTHREAD.patch` 这个文件拷贝到IDF的代码目录下面，然后在`git bash`命令行内执行命令下面几条命令就可以打上patch 由于IDF使用的是FREERTOS，如果需要使用rt-thread就需要修改一些文件。将`rtt.patch` 这个文件拷贝到IDF的代码目录下面，然后在`git bash`命令行内执行命令下面几条命令就可以打上patch
``` ```
cd esp/esp-idf cd esp/esp-idf
git checkout v4.4 git checkout v4.4
git am 0001-add-the-config-of-RTTHREAD.patch git am rtt.patch
``` ```
如果不想用patch文件，已经将代码上传到github上面，可以进入[supperthomas/esp-idf](https://github.com/supperthomas/esp-idf) 下载最新的master分支代码即可。修改之后的IDF，原来的IDF的example还是正常使用，互不干扰，可以放心使用。 如果不想用patch文件，已经将代码上传到github上面，可以进入[tangzz98/esp-idf](https://github.com/tangzz98/esp-idf/tree/freertos_wrapper) 下载最新的freertos_wrapper分支代码即可。修改之后的IDF，原来的IDF的example还是正常使用，互不干扰，可以放心使用。
#### 编译下载 #### 编译下载
......
bsp/ESP32_C3/board/Kconfig
浏览文件 @ efda5106
...@@ -27,6 +27,21 @@ menu "Onboard Peripheral Drivers" ...@@ -27,6 +27,21 @@ menu "Onboard Peripheral Drivers"
default 8 if BSP_BOARD_HX_EXP32C3 default 8 if BSP_BOARD_HX_EXP32C3
depends on BSP_USING_GPIO depends on BSP_USING_GPIO
config RT_BSP_UART_PORT
int "UART PORT SET"
default 0
depends on BSP_USING_UART
config RT_BSP_UART_TX_PIN
int "UART TX PIN SET"
default 21 if BSP_BOARD_LUATOS_ESP32C3
depends on BSP_USING_UART
config RT_BSP_UART_RX_PIN
int "UART RX PIN SET"
default 20 if BSP_BOARD_LUATOS_ESP32C3
depends on BSP_USING_UART
endmenu endmenu
...@@ -38,7 +53,9 @@ menu "On-chip Peripheral Drivers" ...@@ -38,7 +53,9 @@ menu "On-chip Peripheral Drivers"
config BSP_USING_UART config BSP_USING_UART
bool "Enable UART" bool "Enable UART"
default n select RT_USING_SERIAL
select RT_USING_SERIAL_V1
default y
endmenu endmenu
endmenu endmenu
......
bsp/ESP32_C3/main/CMakeLists.txt
浏览文件 @ efda5106
idf_component_register(SRCS "board.c" "main.c" idf_component_register(SRCS "board.c" "main.c"
"drv_gpio.c" "drv_gpio.c"
"drv_uart.c"
"../../../libcpu/risc-v/common/cpuport.c" "../../../libcpu/risc-v/common/cpuport.c"
"../../../libcpu/risc-v/common/context_gcc.S" "../../../libcpu/risc-v/common/context_gcc.S"
"../../../src/components.c" "../../../src/components.c"
...@@ -24,11 +25,18 @@ idf_component_register(SRCS "board.c" "main.c" ...@@ -24,11 +25,18 @@ idf_component_register(SRCS "board.c" "main.c"
"../../../components/drivers/ipc/dataqueue.c" "../../../components/drivers/ipc/dataqueue.c"
"../../../components/drivers/ipc/ringbuffer.c" "../../../components/drivers/ipc/ringbuffer.c"
"../../../components/drivers/ipc/workqueue.c" "../../../components/drivers/ipc/workqueue.c"
"../../../components/drivers/serial/serial.c"
"../../../components/finsh/cmd.c"
"../../../components/finsh/msh_file.c"
"../../../components/finsh/msh_parse.c"
"../../../components/finsh/msh.c"
"../../../components/finsh/shell.c"
INCLUDE_DIRS INCLUDE_DIRS
"../../../components/drivers/include/drivers" "../../../components/drivers/include/drivers"
"../../../components/drivers/include" "../../../components/drivers/include"
"../../../components/finsh"
"." "."
"../../../include" "../../../include"
"../../../libcpu/risc-v/common" "../../../libcpu/risc-v/common"
......
bsp/ESP32_C3/main/board.c
浏览文件 @ efda5106
...@@ -21,8 +21,8 @@ ...@@ -21,8 +21,8 @@
#include "rtthread.h" #include "rtthread.h"
#include "rthw.h" #include "rthw.h"
#include "drv_gpio.h" #include "drv_gpio.h"
#include "drv_uart.h"
#define rt_kprintf printf #include "shell.h"
#ifdef RT_USING_COMPONENTS_INIT #ifdef RT_USING_COMPONENTS_INIT
/* /*
...@@ -190,16 +190,13 @@ void rt_hw_systick_init(void) ...@@ -190,16 +190,13 @@ void rt_hw_systick_init(void)
void rt_hw_board_init(void) void rt_hw_board_init(void)
{ {
rt_hw_systick_init(); rt_hw_systick_init();
#if defined(RT_USING_HEAP)
extern int __heap_start__;
extern int __heap_end__;
printf("%s:%d__heap_start__:%p,__heap_end__:%p\n",__func__,__LINE__,&__heap_start__,&__heap_end__);
rt_system_heap_init((void *)&__heap_start__, (void *)&__heap_end__);
#endif
/* Board underlying hardware initialization */ /* Board underlying hardware initialization */
#ifdef RT_USING_COMPONENTS_INIT #ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init(); rt_components_board_init();
#endif #endif
#if defined(RT_USING_CONSOLE) && defined(RT_USING_DEVICE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
} }
static void rtthread_startup(void) static void rtthread_startup(void)
...@@ -207,15 +204,10 @@ static void rtthread_startup(void) ...@@ -207,15 +204,10 @@ static void rtthread_startup(void)
rt_hw_interrupt_disable(); rt_hw_interrupt_disable();
/* init board */ /* init board */
rt_hw_board_init(); rt_hw_board_init();
/* show RT-Thread version */
rt_show_version();
/* timer system initialization */ /* timer system initialization */
rt_system_timer_init(); rt_system_timer_init();
/* scheduler system initialization */
rt_system_scheduler_init();
/* create init_thread */ /* create init_thread */
rt_application_init(); rt_application_init();
...@@ -229,6 +221,8 @@ static void rtthread_startup(void) ...@@ -229,6 +221,8 @@ static void rtthread_startup(void)
rt_system_scheduler_start(); rt_system_scheduler_start();
/* init scheduler system */ /* init scheduler system */
rt_hw_pin_init(); rt_hw_pin_init();
rt_hw_uart_init();
finsh_system_init();
/* never reach here */ /* never reach here */
return ; return ;
} }
......
bsp/ESP32_C3/main/drv_uart.c 0 → 100644
浏览文件 @ efda5106
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-08-04 tangzz98 first version
*
*/
#include "drv_uart.h"
#ifdef RT_USING_SERIAL_V1
#ifdef CONFIG_UART_ISR_IN_IRAM
#define UART_ISR_ATTR IRAM_ATTR
#else
#define UART_ISR_ATTR
#endif
uart_hal_context_t hal[] = {
{
.dev = &UART0,
},
{
.dev = &UART1,
},
};
static struct rt_serial_device _serial;
static void mcu_uart_rx_intr_handler(void *param)
{
uint32_t uart_intr_status;
struct rt_serial_device *serial;
uart_port_t port;
rt_interrupt_enter();
serial = (struct rt_serial_device *)param;
port = (uart_port_t)serial->parent.user_data;
uart_intr_status = uart_hal_get_intsts_mask(&hal[port]);
if (uart_intr_status != 0)
{
if (uart_intr_status & UART_INTR_RXFIFO_FULL)
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
uart_hal_clr_intsts_mask(&hal[port], uart_intr_status);
}
rt_interrupt_leave();
}
static rt_err_t mcu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
return RT_EOK;
}
static rt_err_t mcu_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
return RT_EOK;
}
static int mcu_uart_putc(struct rt_serial_device *serial, char c)
{
uart_port_t port = (uart_port_t)serial->parent.user_data;
uint32_t write_size = 0;
do
{
uart_hal_write_txfifo(&hal[port], (const uint8_t *)&c, 1, &write_size);
} while (write_size == 0);
return 1;
}
static int mcu_uart_getc(struct rt_serial_device *serial)
{
uart_port_t port = (uart_port_t)serial->parent.user_data;
uint8_t c;
int len = uart_hal_get_rxfifo_len(&hal[port]);
if (len == 0)
{
return -1;
}
else
{
len = 1;
uart_hal_read_rxfifo(&hal[port], &c, &len);
return (int)c;
}
}
static const struct rt_uart_ops _uart_ops =
{
mcu_uart_configure,
mcu_uart_control,
mcu_uart_putc,
mcu_uart_getc,
RT_NULL,
};
int rt_hw_uart_init(void)
{
uart_intr_config_t uart_intr = {
.intr_enable_mask = UART_INTR_RXFIFO_FULL,
.rxfifo_full_thresh = 1,
};
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
uart_config_t uart_config = {
.baud_rate = BAUD_RATE_115200,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
.source_clk = UART_SCLK_APB,
};
int intr_alloc_flags = 0;
#if CONFIG_UART_ISR_IN_IRAM
intr_alloc_flags = ESP_INTR_FLAG_IRAM;
#endif
ESP_ERROR_CHECK(uart_param_config(RT_BSP_UART_PORT, &uart_config));
ESP_ERROR_CHECK(uart_set_pin(RT_BSP_UART_PORT, RT_BSP_UART_TX_PIN, RT_BSP_UART_RX_PIN, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
ESP_ERROR_CHECK(esp_intr_alloc(uart_periph_signal[RT_BSP_UART_PORT].irq, intr_alloc_flags, mcu_uart_rx_intr_handler, (void *)&_serial, NULL));
ESP_ERROR_CHECK(uart_intr_config(RT_BSP_UART_PORT, &uart_intr));
_serial.ops = &_uart_ops;
_serial.config = config;
return rt_hw_serial_register(&_serial, "uart", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, (void *)RT_BSP_UART_PORT);
}
INIT_BOARD_EXPORT(rt_hw_uart_init);
#endif /* RT_USING_SERIAL_V1 */
bsp/ESP32_C3/main/drv_uart.h 0 → 100644
浏览文件 @ efda5106
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-08-04 tangzz98 first version
*
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#include <rtthread.h>
#include <rthw.h>
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#endif
#include "driver/uart.h"
#include "hal/uart_hal.h"
#include "sdkconfig.h"
int rt_hw_uart_init(void);
#endif /* __DRV_UART_H__ */
bsp/ESP32_C3/main/main.c
浏览文件 @ efda5106
...@@ -15,10 +15,12 @@ ...@@ -15,10 +15,12 @@
int rtt_main(void) int rtt_main(void)
{ {
/* show RT-Thread version */
rt_show_version();
rt_kprintf("Hello!RT-THREAD!\r\n");
rt_pin_mode(RT_BSP_LED_PIN, PIN_MODE_OUTPUT); rt_pin_mode(RT_BSP_LED_PIN, PIN_MODE_OUTPUT);
while (1) while (1)
{ {
printf("Hello!RT-THREAD!\r\n");
rt_pin_write(RT_BSP_LED_PIN, PIN_HIGH); rt_pin_write(RT_BSP_LED_PIN, PIN_HIGH);
rt_thread_mdelay(1000); rt_thread_mdelay(1000);
rt_pin_write(RT_BSP_LED_PIN, PIN_LOW); rt_pin_write(RT_BSP_LED_PIN, PIN_LOW);
......
bsp/ESP32_C3/rtconfig.h
浏览文件 @ efda5106
...@@ -34,16 +34,34 @@ ...@@ -34,16 +34,34 @@
/* Kernel Device Object */ /* Kernel Device Object */
#define RT_USING_DEVICE #define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 256
#define RT_CONSOLE_DEVICE_NAME "uart"
#define RT_VER_NUM 0x40101 #define RT_VER_NUM 0x40101
/* RT-Thread Components */ /* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT #define RT_USING_COMPONENTS_INIT
#define RT_USING_MSH
#define RT_USING_FINSH
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
/* Device Drivers */ /* Device Drivers */
#define RT_USING_DEVICE_IPC #define RT_USING_DEVICE_IPC
#define RT_USING_PIN #define RT_USING_PIN
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
/* Using USB */ /* Using USB */
...@@ -150,9 +168,13 @@ ...@@ -150,9 +168,13 @@
/* Onboard Peripheral Drivers */ /* Onboard Peripheral Drivers */
#define RT_BSP_LED_PIN 12 #define RT_BSP_LED_PIN 12
#define RT_BSP_UART_PORT 0
#define RT_BSP_UART_TX_PIN 21
#define RT_BSP_UART_RX_PIN 20
/* On-chip Peripheral Drivers */ /* On-chip Peripheral Drivers */
#define BSP_USING_GPIO #define BSP_USING_GPIO
#define BSP_USING_UART
#endif #endif
bsp/ESP32_C3/rtt.patch 0 → 100644
浏览文件 @ efda5106
此差异已折叠。
bsp/ESP32_C3/sdkconfig
浏览文件 @ efda5106
...@@ -600,7 +600,7 @@ CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y ...@@ -600,7 +600,7 @@ CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y
# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set # CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set
CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y
CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y
CONFIG_FREERTOS_HZ=100 CONFIG_FREERTOS_HZ=1000
CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
...@@ -628,8 +628,7 @@ CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y ...@@ -628,8 +628,7 @@ CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set # CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
CONFIG_FREERTOS_DEBUG_OCDAWARE=y CONFIG_FREERTOS_DEBUG_OCDAWARE=y
CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y # CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT is not set
# CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH is not set
# end of FreeRTOS # end of FreeRTOS
# #
......
bsp/apm32/apm32f103xe-minibroard/.config
浏览文件 @ efda5106
...@@ -80,7 +80,7 @@ CONFIG_RT_USING_DEVICE=y ...@@ -80,7 +80,7 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40101 CONFIG_RT_VER_NUM=0x40101
CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y CONFIG_RT_USING_CPU_FFS=y
......
bsp/apm32/apm32f103xe-minibroard/applications/main.c
浏览文件 @ efda5106
...@@ -22,7 +22,7 @@ int main(void) ...@@ -22,7 +22,7 @@ int main(void)
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
/* Print system clock */ /* Print system clock */
sysclock = RCM_ReadSYSCLKFreq(); sysclock = RCM_ReadSYSCLKFreq();
rt_kprintf("Read: Sec = %d, Usec = 0x%08X\n", sysclock, sysclock); rt_kprintf("System Clock: %d\n", sysclock);
while (1) while (1)
{ {
......
bsp/apm32/apm32f103xe-minibroard/rtconfig.h
浏览文件 @ efda5106
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#define RT_USING_DEVICE #define RT_USING_DEVICE
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40101 #define RT_VER_NUM 0x40101
#define ARCH_ARM #define ARCH_ARM
#define RT_USING_CPU_FFS #define RT_USING_CPU_FFS
......
bsp/apm32/apm32f407ig-minibroard/.config
浏览文件 @ efda5106
...@@ -80,7 +80,7 @@ CONFIG_RT_USING_DEVICE=y ...@@ -80,7 +80,7 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_INTERRUPT_INFO is not set # CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40101 CONFIG_RT_VER_NUM=0x40101
CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y CONFIG_RT_USING_CPU_FFS=y
......
bsp/apm32/apm32f407ig-minibroard/applications/main.c
浏览文件 @ efda5106
...@@ -22,7 +22,7 @@ int main(void) ...@@ -22,7 +22,7 @@ int main(void)
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT); rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
/* Print system clock */ /* Print system clock */
sysclock = RCM_ReadSYSCLKFreq(); sysclock = RCM_ReadSYSCLKFreq();
rt_kprintf("Read: Sec = %d, Usec = 0x%08X\n", sysclock, sysclock); rt_kprintf("System Clock: %d\n", sysclock);
while (1) while (1)
{ {
......
bsp/apm32/apm32f407ig-minibroard/rtconfig.h
浏览文件 @ efda5106
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#define RT_USING_DEVICE #define RT_USING_DEVICE
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40101 #define RT_VER_NUM 0x40101
#define ARCH_ARM #define ARCH_ARM
#define RT_USING_CPU_FFS #define RT_USING_CPU_FFS
......
bsp/apm32/libraries/APM32F4xx_Library/Device/Geehy/APM32F4xx/Source/gcc/startup_apm32f40x.s 0 → 100644
浏览文件 @ efda5106
;/*!
; * @file startup_apm32f40x.s
; *
; * @brief CMSIS Cortex-M4 based Core Device Startup File for Device startup_apm32f40x
; *
; * @version V1.0.2
; *
; * @date 2022-06-23
; *
; * @attention
; *
; * Copyright (C) 2021-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
/* bl __libc_init_array */
/* Call the application's entry point.*/
bl entry
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDT_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EINT Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EINT line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EINT line */
.word FLASH_IRQHandler /* FLASH */
.word RCM_IRQHandler /* RCC */
.word EINT0_IRQHandler /* EINT Line0 */
.word EINT1_IRQHandler /* EINT Line1 */
.word EINT2_IRQHandler /* EINT Line2 */
.word EINT3_IRQHandler /* EINT Line3 */
.word EINT4_IRQHandler /* EINT Line4 */
.word DMA1_STR0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_STR1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_STR2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_STR3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_STR4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_STR5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_STR6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EINT9_5_IRQHandler /* External Line[9:5]s */
.word TMR1_BRK_TMR9_IRQHandler /* TMR1 Break and TMR9 */
.word TMR1_UP_TMR10_IRQHandler /* TMR1 Update and TMR10 */
.word TMR1_TRG_COM_TMR11_IRQHandler /* TMR1 Trigger and Commutation and TMR11 */
.word TMR1_CC_IRQHandler /* TMR1 Capture Compare */
.word TMR2_IRQHandler /* TMR2 */
.word TMR3_IRQHandler /* TMR3 */
.word TMR4_IRQHandler /* TMR4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EINT15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EINT Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EINT line */
.word TMR8_BRK_TMR12_IRQHandler /* TMR8 Break and TMR12 */
.word TMR8_UP_TMR13_IRQHandler /* TMR8 Update and TMR13 */
.word TMR8_TRG_COM_TMR14_IRQHandler /* TMR8 Trigger and Commutation and TMR14 */
.word TMR8_CC_IRQHandler /* TMR8 Capture Compare */
.word DMA1_STR7_IRQHandler /* DMA1 Stream7 */
.word EMMC_IRQHandler /* EMMC */
.word SDIO_IRQHandler /* SDIO */
.word TMR5_IRQHandler /* TMR5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TMR6_DAC_IRQHandler /* TMR6 and DAC1&2 underrun errors */
.word TMR7_IRQHandler /* TMR7 */
.word DMA2_STR0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_STR1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_STR2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_STR3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_STR4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EINT line */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_STR5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_STR6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_STR7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS1_EP1_OUT_IRQHandler /* USB OTG HS1 End Point 1 Out */
.word OTG_HS1_EP1_IN_IRQHandler /* USB OTG HS1 End Point 1 In */
.word OTG_HS1_WKUP_IRQHandler /* USB OTG HS1 Wakeup through EINT */
.word OTG_HS1_IRQHandler /* USB OTG HS1 */
.word DCI_IRQHandler /* DCI */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word FPU_IRQHandler /* FPU */
.word SM3_IRQHandler /* SM3 */
.word SM4_IRQHandler /* SM4 */
.word BN_IRQHandler /* BN */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDT_IRQHandler
.thumb_set WWDT_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCM_IRQHandler
.thumb_set RCM_IRQHandler,Default_Handler
.weak EINT0_IRQHandler
.thumb_set EINT0_IRQHandler,Default_Handler
.weak EINT1_IRQHandler
.thumb_set EINT1_IRQHandler,Default_Handler
.weak EINT2_IRQHandler
.thumb_set EINT2_IRQHandler,Default_Handler
.weak EINT3_IRQHandler
.thumb_set EINT3_IRQHandler,Default_Handler
.weak EINT4_IRQHandler
.thumb_set EINT4_IRQHandler,Default_Handler
.weak DMA1_STR0_IRQHandler
.thumb_set DMA1_STR0_IRQHandler,Default_Handler
.weak DMA1_STR1_IRQHandler
.thumb_set DMA1_STR1_IRQHandler,Default_Handler
.weak DMA1_STR2_IRQHandler
.thumb_set DMA1_STR2_IRQHandler,Default_Handler
.weak DMA1_STR3_IRQHandler
.thumb_set DMA1_STR3_IRQHandler,Default_Handler
.weak DMA1_STR4_IRQHandler
.thumb_set DMA1_STR4_IRQHandler,Default_Handler
.weak DMA1_STR5_IRQHandler
.thumb_set DMA1_STR5_IRQHandler,Default_Handler
.weak DMA1_STR6_IRQHandler
.thumb_set DMA1_STR6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EINT9_5_IRQHandler
.thumb_set EINT9_5_IRQHandler,Default_Handler
.weak TMR1_BRK_TMR9_IRQHandler
.thumb_set TMR1_BRK_TMR9_IRQHandler,Default_Handler
.weak TMR1_UP_TMR10_IRQHandler
.thumb_set TMR1_UP_TMR10_IRQHandler,Default_Handler
.weak TMR1_TRG_COM_TMR11_IRQHandler
.thumb_set TMR1_TRG_COM_TMR11_IRQHandler,Default_Handler
.weak TMR1_CC_IRQHandler
.thumb_set TMR1_CC_IRQHandler,Default_Handler
.weak TMR2_IRQHandler
.thumb_set TMR2_IRQHandler,Default_Handler
.weak TMR3_IRQHandler
.thumb_set TMR3_IRQHandler,Default_Handler
.weak TMR4_IRQHandler
.thumb_set TMR4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EINT15_10_IRQHandler
.thumb_set EINT15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak TMR8_BRK_TMR12_IRQHandler
.thumb_set TMR8_BRK_TMR12_IRQHandler,Default_Handler
.weak TMR8_UP_TMR13_IRQHandler
.thumb_set TMR8_UP_TMR13_IRQHandler,Default_Handler
.weak TMR8_TRG_COM_TMR14_IRQHandler
.thumb_set TMR8_TRG_COM_TMR14_IRQHandler,Default_Handler
.weak TMR8_CC_IRQHandler
.thumb_set TMR8_CC_IRQHandler,Default_Handler
.weak DMA1_STR7_IRQHandler
.thumb_set DMA1_STR7_IRQHandler,Default_Handler
.weak EMMC_IRQHandler
.thumb_set EMMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TMR5_IRQHandler
.thumb_set TMR5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TMR6_DAC_IRQHandler
.thumb_set TMR6_DAC_IRQHandler,Default_Handler
.weak TMR7_IRQHandler
.thumb_set TMR7_IRQHandler,Default_Handler
.weak DMA2_STR0_IRQHandler
.thumb_set DMA2_STR0_IRQHandler,Default_Handler
.weak DMA2_STR1_IRQHandler
.thumb_set DMA2_STR1_IRQHandler,Default_Handler
.weak DMA2_STR2_IRQHandler
.thumb_set DMA2_STR2_IRQHandler,Default_Handler
.weak DMA2_STR3_IRQHandler
.thumb_set DMA2_STR3_IRQHandler,Default_Handler
.weak DMA2_STR4_IRQHandler
.thumb_set DMA2_STR4_IRQHandler,Default_Handler
.weak ETH_IRQHandler
.thumb_set ETH_IRQHandler,Default_Handler
.weak ETH_WKUP_IRQHandler
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
.weak CAN2_TX_IRQHandler
.thumb_set CAN2_TX_IRQHandler,Default_Handler
.weak CAN2_RX0_IRQHandler
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
.weak CAN2_RX1_IRQHandler
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
.weak CAN2_SCE_IRQHandler
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_STR5_IRQHandler
.thumb_set DMA2_STR5_IRQHandler,Default_Handler
.weak DMA2_STR6_IRQHandler
.thumb_set DMA2_STR6_IRQHandler,Default_Handler
.weak DMA2_STR7_IRQHandler
.thumb_set DMA2_STR7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak OTG_HS1_EP1_OUT_IRQHandler
.thumb_set OTG_HS1_EP1_OUT_IRQHandler,Default_Handler
.weak OTG_HS1_EP1_IN_IRQHandler
.thumb_set OTG_HS1_EP1_IN_IRQHandler,Default_Handler
.weak OTG_HS1_WKUP_IRQHandler
.thumb_set OTG_HS1_WKUP_IRQHandler,Default_Handler
.weak OTG_HS1_IRQHandler
.thumb_set OTG_HS1_IRQHandler,Default_Handler
.weak DCI_IRQHandler
.thumb_set DCI_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak SM3_IRQHandler
.thumb_set SM3_IRQHandler,Default_Handler
.weak SM4_IRQHandler
.thumb_set SM4_IRQHandler,Default_Handler
.weak BN_IRQHandler
.thumb_set BN_IRQHandler,Default_Handler
bsp/apm32/libraries/APM32F4xx_Library/Device/Geehy/APM32F4xx/Source/gcc/startup_apm32f41x.s 0 → 100644
浏览文件 @ efda5106
;/*!
; * @file startup_apm32f41x.s
; *
; * @brief CMSIS Cortex-M4 based Core Device Startup File for Device startup_apm32f41x
; *
; * @version V1.0.2
; *
; * @date 2022-06-23
; *
; * @attention
; *
; * Copyright (C) 2021-2022 Geehy Semiconductor
; *
; * You may not use this file except in compliance with the
; * GEEHY COPYRIGHT NOTICE (GEEHY SOFTWARE PACKAGE LICENSE).
; *
; * The program is only for reference, which is distributed in the hope
; * that it will be usefull and instructional for customers to develop
; * their software. Unless required by applicable law or agreed to in
; * writing, the program is distributed on an "AS IS" BASIS, WITHOUT
; * ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
; * See the GEEHY SOFTWARE PACKAGE LICENSE for the governing permissions
; * and limitations under the License.
; */
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
/* bl __libc_init_array */
/* Call the application's entry point.*/
bl entry
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
* @param None
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
*******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* External Interrupts */
.word WWDT_IRQHandler /* Window WatchDog */
.word PVD_IRQHandler /* PVD through EINT Line detection */
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EINT line */
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EINT line */
.word FLASH_IRQHandler /* FLASH */
.word RCM_IRQHandler /* RCC */
.word EINT0_IRQHandler /* EINT Line0 */
.word EINT1_IRQHandler /* EINT Line1 */
.word EINT2_IRQHandler /* EINT Line2 */
.word EINT3_IRQHandler /* EINT Line3 */
.word EINT4_IRQHandler /* EINT Line4 */
.word DMA1_STR0_IRQHandler /* DMA1 Stream 0 */
.word DMA1_STR1_IRQHandler /* DMA1 Stream 1 */
.word DMA1_STR2_IRQHandler /* DMA1 Stream 2 */
.word DMA1_STR3_IRQHandler /* DMA1 Stream 3 */
.word DMA1_STR4_IRQHandler /* DMA1 Stream 4 */
.word DMA1_STR5_IRQHandler /* DMA1 Stream 5 */
.word DMA1_STR6_IRQHandler /* DMA1 Stream 6 */
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
.word CAN1_TX_IRQHandler /* CAN1 TX */
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
.word EINT9_5_IRQHandler /* External Line[9:5]s */
.word TMR1_BRK_TMR9_IRQHandler /* TMR1 Break and TMR9 */
.word TMR1_UP_TMR10_IRQHandler /* TMR1 Update and TMR10 */
.word TMR1_TRG_COM_TMR11_IRQHandler /* TMR1 Trigger and Commutation and TMR11 */
.word TMR1_CC_IRQHandler /* TMR1 Capture Compare */
.word TMR2_IRQHandler /* TMR2 */
.word TMR3_IRQHandler /* TMR3 */
.word TMR4_IRQHandler /* TMR4 */
.word I2C1_EV_IRQHandler /* I2C1 Event */
.word I2C1_ER_IRQHandler /* I2C1 Error */
.word I2C2_EV_IRQHandler /* I2C2 Event */
.word I2C2_ER_IRQHandler /* I2C2 Error */
.word SPI1_IRQHandler /* SPI1 */
.word SPI2_IRQHandler /* SPI2 */
.word USART1_IRQHandler /* USART1 */
.word USART2_IRQHandler /* USART2 */
.word USART3_IRQHandler /* USART3 */
.word EINT15_10_IRQHandler /* External Line[15:10]s */
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EINT Line */
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EINT line */
.word TMR8_BRK_TMR12_IRQHandler /* TMR8 Break and TMR12 */
.word TMR8_UP_TMR13_IRQHandler /* TMR8 Update and TMR13 */
.word TMR8_TRG_COM_TMR14_IRQHandler /* TMR8 Trigger and Commutation and TMR14 */
.word TMR8_CC_IRQHandler /* TMR8 Capture Compare */
.word DMA1_STR7_IRQHandler /* DMA1 Stream7 */
.word EMMC_IRQHandler /* EMMC */
.word SDIO_IRQHandler /* SDIO */
.word TMR5_IRQHandler /* TMR5 */
.word SPI3_IRQHandler /* SPI3 */
.word UART4_IRQHandler /* UART4 */
.word UART5_IRQHandler /* UART5 */
.word TMR6_DAC_IRQHandler /* TMR6 and DAC1&2 underrun errors */
.word TMR7_IRQHandler /* TMR7 */
.word DMA2_STR0_IRQHandler /* DMA2 Stream 0 */
.word DMA2_STR1_IRQHandler /* DMA2 Stream 1 */
.word DMA2_STR2_IRQHandler /* DMA2 Stream 2 */
.word DMA2_STR3_IRQHandler /* DMA2 Stream 3 */
.word DMA2_STR4_IRQHandler /* DMA2 Stream 4 */
.word ETH_IRQHandler /* Ethernet */
.word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EINT line */
.word CAN2_TX_IRQHandler /* CAN2 TX */
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
.word OTG_FS_IRQHandler /* USB OTG FS */
.word DMA2_STR5_IRQHandler /* DMA2 Stream 5 */
.word DMA2_STR6_IRQHandler /* DMA2 Stream 6 */
.word DMA2_STR7_IRQHandler /* DMA2 Stream 7 */
.word USART6_IRQHandler /* USART6 */
.word I2C3_EV_IRQHandler /* I2C3 event */
.word I2C3_ER_IRQHandler /* I2C3 error */
.word OTG_HS1_EP1_OUT_IRQHandler /* USB OTG HS1 End Point 1 Out */
.word OTG_HS1_EP1_IN_IRQHandler /* USB OTG HS1 End Point 1 In */
.word OTG_HS1_WKUP_IRQHandler /* USB OTG HS1 Wakeup through EINT */
.word OTG_HS1_IRQHandler /* USB OTG HS1 */
.word DCI_IRQHandler /* DCI */
.word CRYP_IRQHandler /* CRYP crypto */
.word HASH_RNG_IRQHandler /* Hash and Rng */
.word FPU_IRQHandler /* FPU */
.word SM3_IRQHandler /* SM3 */
.word SM4_IRQHandler /* SM4 */
.word BN_IRQHandler /* BN */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDT_IRQHandler
.thumb_set WWDT_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMP_STAMP_IRQHandler
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCM_IRQHandler
.thumb_set RCM_IRQHandler,Default_Handler
.weak EINT0_IRQHandler
.thumb_set EINT0_IRQHandler,Default_Handler
.weak EINT1_IRQHandler
.thumb_set EINT1_IRQHandler,Default_Handler
.weak EINT2_IRQHandler
.thumb_set EINT2_IRQHandler,Default_Handler
.weak EINT3_IRQHandler
.thumb_set EINT3_IRQHandler,Default_Handler
.weak EINT4_IRQHandler
.thumb_set EINT4_IRQHandler,Default_Handler
.weak DMA1_STR0_IRQHandler
.thumb_set DMA1_STR0_IRQHandler,Default_Handler
.weak DMA1_STR1_IRQHandler
.thumb_set DMA1_STR1_IRQHandler,Default_Handler
.weak DMA1_STR2_IRQHandler
.thumb_set DMA1_STR2_IRQHandler,Default_Handler
.weak DMA1_STR3_IRQHandler
.thumb_set DMA1_STR3_IRQHandler,Default_Handler
.weak DMA1_STR4_IRQHandler
.thumb_set DMA1_STR4_IRQHandler,Default_Handler
.weak DMA1_STR5_IRQHandler
.thumb_set DMA1_STR5_IRQHandler,Default_Handler
.weak DMA1_STR6_IRQHandler
.thumb_set DMA1_STR6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EINT9_5_IRQHandler
.thumb_set EINT9_5_IRQHandler,Default_Handler
.weak TMR1_BRK_TMR9_IRQHandler
.thumb_set TMR1_BRK_TMR9_IRQHandler,Default_Handler
.weak TMR1_UP_TMR10_IRQHandler
.thumb_set TMR1_UP_TMR10_IRQHandler,Default_Handler
.weak TMR1_TRG_COM_TMR11_IRQHandler
.thumb_set TMR1_TRG_COM_TMR11_IRQHandler,Default_Handler
.weak TMR1_CC_IRQHandler
.thumb_set TMR1_CC_IRQHandler,Default_Handler
.weak TMR2_IRQHandler
.thumb_set TMR2_IRQHandler,Default_Handler
.weak TMR3_IRQHandler
.thumb_set TMR3_IRQHandler,Default_Handler
.weak TMR4_IRQHandler
.thumb_set TMR4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EINT15_10_IRQHandler
.thumb_set EINT15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak OTG_FS_WKUP_IRQHandler
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
.weak TMR8_BRK_TMR12_IRQHandler
.thumb_set TMR8_BRK_TMR12_IRQHandler,Default_Handler
.weak TMR8_UP_TMR13_IRQHandler
.thumb_set TMR8_UP_TMR13_IRQHandler,Default_Handler
.weak TMR8_TRG_COM_TMR14_IRQHandler
.thumb_set TMR8_TRG_COM_TMR14_IRQHandler,Default_Handler
.weak TMR8_CC_IRQHandler
.thumb_set TMR8_CC_IRQHandler,Default_Handler
.weak DMA1_STR7_IRQHandler
.thumb_set DMA1_STR7_IRQHandler,Default_Handler
.weak EMMC_IRQHandler
.thumb_set EMMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TMR5_IRQHandler
.thumb_set TMR5_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak UART5_IRQHandler
.thumb_set UART5_IRQHandler,Default_Handler
.weak TMR6_DAC_IRQHandler
.thumb_set TMR6_DAC_IRQHandler,Default_Handler
.weak TMR7_IRQHandler
.thumb_set TMR7_IRQHandler,Default_Handler
.weak DMA2_STR0_IRQHandler
.thumb_set DMA2_STR0_IRQHandler,Default_Handler
.weak DMA2_STR1_IRQHandler
.thumb_set DMA2_STR1_IRQHandler,Default_Handler
.weak DMA2_STR2_IRQHandler
.thumb_set DMA2_STR2_IRQHandler,Default_Handler
.weak DMA2_STR3_IRQHandler
.thumb_set DMA2_STR3_IRQHandler,Default_Handler
.weak DMA2_STR4_IRQHandler
.thumb_set DMA2_STR4_IRQHandler,Default_Handler
.weak ETH_IRQHandler
.thumb_set ETH_IRQHandler,Default_Handler
.weak ETH_WKUP_IRQHandler
.thumb_set ETH_WKUP_IRQHandler,Default_Handler
.weak CAN2_TX_IRQHandler
.thumb_set CAN2_TX_IRQHandler,Default_Handler
.weak CAN2_RX0_IRQHandler
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
.weak CAN2_RX1_IRQHandler
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
.weak CAN2_SCE_IRQHandler
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
.weak OTG_FS_IRQHandler
.thumb_set OTG_FS_IRQHandler,Default_Handler
.weak DMA2_STR5_IRQHandler
.thumb_set DMA2_STR5_IRQHandler,Default_Handler
.weak DMA2_STR6_IRQHandler
.thumb_set DMA2_STR6_IRQHandler,Default_Handler
.weak DMA2_STR7_IRQHandler
.thumb_set DMA2_STR7_IRQHandler,Default_Handler
.weak USART6_IRQHandler
.thumb_set USART6_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak OTG_HS1_EP1_OUT_IRQHandler
.thumb_set OTG_HS1_EP1_OUT_IRQHandler,Default_Handler
.weak OTG_HS1_EP1_IN_IRQHandler
.thumb_set OTG_HS1_EP1_IN_IRQHandler,Default_Handler
.weak OTG_HS1_WKUP_IRQHandler
.thumb_set OTG_HS1_WKUP_IRQHandler,Default_Handler
.weak OTG_HS1_IRQHandler
.thumb_set OTG_HS1_IRQHandler,Default_Handler
.weak DCI_IRQHandler
.thumb_set DCI_IRQHandler,Default_Handler
.weak CRYP_IRQHandler
.thumb_set CRYP_IRQHandler,Default_Handler
.weak HASH_RNG_IRQHandler
.thumb_set HASH_RNG_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak SM3_IRQHandler
.thumb_set SM3_IRQHandler,Default_Handler
.weak SM4_IRQHandler
.thumb_set SM4_IRQHandler,Default_Handler
.weak BN_IRQHandler
.thumb_set BN_IRQHandler,Default_Handler
bsp/cypress/libraries/HAL_Drivers/SConscript
浏览文件 @ efda5106
...@@ -38,6 +38,9 @@ if GetDepend(['BSP_USING_SPI']): ...@@ -38,6 +38,9 @@ if GetDepend(['BSP_USING_SPI']):
if GetDepend(['BSP_USING_ADC']): if GetDepend(['BSP_USING_ADC']):
src += ['drv_adc.c'] src += ['drv_adc.c']
if GetDepend(['BSP_USING_USBD']):
src += ['drv_usbd.c']
if GetDepend('BSP_USING_RTC'): if GetDepend('BSP_USING_RTC'):
src += ['drv_rtc.c'] src += ['drv_rtc.c']
...@@ -46,6 +49,12 @@ if GetDepend('BSP_USING_ON_CHIP_FLASH'): ...@@ -46,6 +49,12 @@ if GetDepend('BSP_USING_ON_CHIP_FLASH'):
if GetDepend(['RT_USING_WDT']): if GetDepend(['RT_USING_WDT']):
src += ['drv_wdt.c'] src += ['drv_wdt.c']
if GetDepend(['RT_USING_DAC']):
src += ['drv_dac.c']
if GetDepend(['BSP_USING_TIM']):
src += ['drv_hwtimer.c']
path = [cwd] path = [cwd]
path += [cwd + '/config'] path += [cwd + '/config']
......
bsp/cypress/libraries/HAL_Drivers/drv_dac.c 0 → 100644
浏览文件 @ efda5106
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-07-28 rtthread qiu first version
*/
#include "drv_dac.h"
#include "drv_common.h"
#include <rtthread.h>
#if defined(BSP_USING_DAC1) || defined(BSP_USING_DAC2)
#define LOG_TAG "drv.dac"
#include <drv_log.h>
struct cyp_dac
{
cy_stc_csdidac_config_t cyhal_dac_device;
struct rt_dac_device cyp_dac_device;
char *name;
};
static struct cyp_dac dac_config[] =
{
#ifdef BSP_USING_DAC1
DAC1_CONFIG,
#endif
#ifdef BSP_USING_DAC2
DAC2_CONFIG,
#endif
};
/*get dac channel*/
static rt_uint32_t cyp_dac_get_channel(rt_uint32_t channel)
{
rt_uint32_t cyp_dac_channel = 0;
switch (channel)
{
case 1:
cyp_dac_channel = CY_CSDIDAC_A;
break;
case 2:
cyp_dac_channel = CY_CSDIDAC_B;
break;
default:
RT_ASSERT(0);
break;
}
return cyp_dac_channel;
}
struct cyp_dac cyp_adc_obj[sizeof(dac_config) / sizeof(dac_config[0])];
cy_stc_csdidac_context_t csdidac_context;
/*dac device enable*/
static rt_err_t cyp_dac_enabled(struct rt_dac_device *device, rt_uint32_t channel)
{
cy_rslt_t result;
rt_uint32_t cyp_channel;
RT_ASSERT(device != RT_NULL);
cyhal_dac_t *dac_device;
dac_device = device->parent.user_data;
/* get current dac channel*/
cyp_channel = cyp_dac_get_channel(channel);
/*DAC device init*/
result = Cy_CSDIDAC_Init(&CSDIDAC_csdidac_config, &csdidac_context);
if (result != RT_EOK)
{
LOG_E("Cy_CSDIDAC_Init fail = %d\n", result);
return -RT_ENOSYS;
}
return RT_EOK;
}
/*dac device disable*/
static rt_err_t cyp_dac_disable(struct rt_dac_device *device, rt_uint32_t channel)
{
rt_uint32_t cyp_channel;
cy_rslt_t result;
RT_ASSERT(device != RT_NULL);
cyhal_dac_t *dac_device;
dac_device = device->parent.user_data;
cyp_channel = cyp_dac_get_channel(channel);
/*DAC free device*/
result = Cy_CSDIDAC_OutputDisable(cyp_channel, &csdidac_context);
if (result != RT_EOK)
{
LOG_E("DAC Outputdisable failed. Error: %d\n", result);
return -RT_ENOSYS;
}
return RT_EOK;
}
/*set dac output value*/
static rt_err_t cyp_adc_convert(struct rt_dac_device *device, rt_uint32_t channel, rt_uint32_t *value)
{
RT_ASSERT(device != RT_NULL);
cy_rslt_t result;
rt_uint32_t cyp_channel;
cyp_channel = cyp_dac_get_channel(channel);
result = Cy_CSDIDAC_OutputEnable(cyp_channel, *value, &csdidac_context);
if (result != RT_EOK)
{
LOG_E("DAC channel initialization failed. Error: %d\n", result);
return -RT_ENOSYS;
}
return RT_EOK;
}
static const struct rt_dac_ops cyp_dac_ops =
{
.disabled = cyp_dac_disable,
.enabled = cyp_dac_enabled,
.convert = cyp_adc_convert,
};
/*dac device init*/
static int rt_hw_dac_init(void)
{
int result = RT_EOK;
/* save dac name */
char name_buf[5] = {'d', 'a', 'c', '0', 0};
int i = 0;
i = sizeof(dac_config) / sizeof(dac_config[0]);
for (i = 0; i < sizeof(dac_config) / sizeof(dac_config[0]); i++)
{
#ifdef BSP_USING_DAC1
name_buf[3] = '1';
#endif
#ifdef BSP_USING_DAC2
name_buf[3] = '2';
#endif
/* register DAC device */
if (rt_hw_dac_register(&cyp_adc_obj[i].cyp_dac_device, name_buf, &cyp_dac_ops, RT_NULL) == RT_EOK)
{
LOG_E("dac device register success\n");
}
else
{
LOG_E("dac device register fail\n");
result = -RT_ERROR;
}
}
return result;
}
INIT_BOARD_EXPORT(rt_hw_dac_init);
#endif /* BSP_USING_DAC1 /BSP_USING_DAC2 */
bsp/cypress/libraries/HAL_Drivers/drv_dac.h 0 → 100644
浏览文件 @ efda5106
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-07-28 rtthread qiu first version
*/
#ifndef __DRV__DAC_H__
#define __DRV__DAC_H__
#include "rtconfig.h"
#include "cycfg.h"
#include <rtthread.h>
#include "cy_csdidac.h"
#include "cycfg_peripherals.h"
static const cy_stc_csdidac_pin_t CSDIDAC_csdidac_a_pin =
{
.ioPcPtr = GPIO_PRT10,
.pin = 0u,
};
static const cy_stc_csdidac_pin_t CSDIDAC_csdidac_b_pin =
{
.ioPcPtr = GPIO_PRT10,
.pin = 0u,
};
const cy_stc_csdidac_config_t CSDIDAC_csdidac_config =
{
.base = CSD0,
.csdCxtPtr = &cy_csd_0_context,
.configA = CY_CSDIDAC_GPIO,
.configB = CY_CSDIDAC_GPIO,
.ptrPinA = (const cy_stc_csdidac_pin_t *)&CSDIDAC_csdidac_a_pin,
.ptrPinB = (const cy_stc_csdidac_pin_t *)&CSDIDAC_csdidac_b_pin,
.cpuClk = 100000000u,
.csdInitTime = 25u,
};
#ifdef BSP_USING_DAC1
#ifndef DAC1_CONFIG
#define DAC1_CONFIG \
{ \
.name = "dac1", \
}
#endif /* DAC1_CONFIG */
#endif /*BSP_USING_DAC2*/
#ifdef BSP_USING_DAC2
#ifndef DAC2_CONFIG
#define DAC2_CONFIG \
{ \
.name = "dac2", \
}
#endif /* DAC2_CONFIG */
#endif /*BSP_USING_DAC2*/
#endif /*__DRV__DAC_H__*/
bsp/cypress/libraries/HAL_Drivers/drv_gpio.h
浏览文件 @ efda5106
...@@ -15,8 +15,6 @@ ...@@ -15,8 +15,6 @@
#include <rtdevice.h> #include <rtdevice.h>
#include "drv_common.h" #include "drv_common.h"
#include "cy_retarget_io.h"
#include "cyhal_gpio.h"
#include "cyhal_irq_psoc.h" #include "cyhal_irq_psoc.h"
#define GPIO_INTERRUPT_PRIORITY (7u) #define GPIO_INTERRUPT_PRIORITY (7u)
......
bsp/cypress/libraries/HAL_Drivers/drv_hwtimer.c 0 → 100644
浏览文件 @ efda5106
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-07-29 rtthread qiu first version
*/
#include "drv_common.h"
#include "drv_hwtimer.h"
#include <board.h>
#ifdef BSP_USING_TIM
//#define DRV_DEBUG
#define LOG_TAG "drv.hwtimer"
#include <drv_log.h>
static void isr_timer(void *callback_arg, cyhal_timer_event_t event);
#ifdef RT_USING_HWTIMER
enum
{
#ifdef BSP_USING_TIM1
TIM1_INDEX,
#endif
#ifdef BSP_USING_TIM2
TIM2_INDEX,
#endif
};
struct cyp_hwtimer
{
rt_hwtimer_t time_device;
cyhal_timer_t tim_handle;
IRQn_Type tim_irqn;
char *name;
};
static struct cyp_hwtimer cyp_hwtimer_obj[] =
{
#ifdef BSP_USING_TIM1
TIM1_CONFIG,
#endif
#ifdef BSP_USING_TIM2
TIM2_CONFIG,
#endif
};
static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state)
{
RT_ASSERT(timer != RT_NULL);
cy_rslt_t result = RT_EOK;
cyhal_timer_t *tim = RT_NULL;
tim = (cyhal_timer_t *)timer->parent.user_data;
const cyhal_timer_cfg_t init_timer_cfg =
{
.compare_value = 0, /* Timer compare value, not used */
.period = 9999, /* Defines the timer period */
.direction = CYHAL_TIMER_DIR_UP, /* Timer counts up */
.is_compare = false, /* Don't use compare mode */
.is_continuous = true, /* Run timer indefinitely */
.value = 0 /* Initial value of counter */
};
if (state)
{
/* Initialize the timer object. Does not use input pin ('pin' is NC) and
* does not use a pre-configured clock source ('clk' is NULL). */
result = cyhal_timer_init(tim, NC, NULL);
if (result != CY_RSLT_SUCCESS)
{
LOG_E("timer init error \r\n");
return;
}
else
{
/* Configure timer period and operation mode such as count direction,
duration */
cyhal_timer_configure(tim, &init_timer_cfg);
/* Set the frequency of timer's clock source */
cyhal_timer_set_frequency(tim, 10000);
cyhal_timer_start(tim);
}
}
else
{
cyhal_timer_free(tim);
LOG_E("free time \r\n");
}
}
static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
{
RT_ASSERT(timer != RT_NULL);
RT_ASSERT(opmode != RT_NULL);
cy_rslt_t result = RT_EOK;
cyhal_timer_t *tim = RT_NULL;
tim = (cyhal_timer_t *)timer->parent.user_data;
const cyhal_timer_cfg_t init_timer_cfg =
{
.compare_value = 0, /* Timer compare value, not used */
.period = t - 1, /* Defines the timer period */
.direction = CYHAL_TIMER_DIR_UP, /* Timer counts up */
.is_compare = false, /* Don't use compare mode */
.is_continuous = true, /* Run timer indefinitely */
.value = 0 /* Initial value of counter */
};
/* Configure timer period and operation mode such as count direction,
duration */
cyhal_timer_configure(tim, &init_timer_cfg);
if (opmode == HWTIMER_MODE_ONESHOT)
{
/* set timer to single mode */
cyhal_timer_stop(tim);
}
else
{
cyhal_timer_reset(tim);
}
result = cyhal_timer_start(tim);
if (result != CY_RSLT_SUCCESS)
{
LOG_E("time start error\r\n");
cyhal_timer_free(tim);
}
/* Assign the ISR to execute on timer interrupt */
cyhal_timer_register_callback(tim, isr_timer, NULL);
/* Set the event on which timer interrupt occurs and enable it */
cyhal_timer_enable_event(tim, CYHAL_TIMER_IRQ_TERMINAL_COUNT, 1, true);
return result;
}
static void timer_stop(rt_hwtimer_t *timer)
{
RT_ASSERT(timer != RT_NULL);
cyhal_timer_t *tim = RT_NULL;
tim = (cyhal_timer_t *)timer->parent.user_data;
cyhal_timer_stop(tim);
}
static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
{
cyhal_timer_t *tim = RT_NULL;
rt_uint32_t count;
RT_ASSERT(timer != RT_NULL);
tim = (cyhal_timer_t *)timer->parent.user_data;
count = cyhal_timer_read(tim);
return count;
}
static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
{
RT_ASSERT(timer != RT_NULL);
RT_ASSERT(arg != RT_NULL);
cyhal_timer_t *tim = RT_NULL;
rt_err_t result = -RT_ERROR;
tim = (cyhal_timer_t *)timer->parent.user_data;
switch (cmd)
{
case HWTIMER_CTRL_FREQ_SET:
{
rt_uint32_t freq;
rt_uint16_t val;
freq = *((rt_uint32_t *)arg);
result = cyhal_timer_set_frequency(tim, freq);
if (result != CY_RSLT_SUCCESS)
{
LOG_E("cyhal_timer_set_frequency error\r\n");
return RT_ERROR;
}
}
break;
default:
{
result = -RT_EINVAL;
}
break;
}
return result;
}
static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
static const struct rt_hwtimer_ops _ops =
{
.init = timer_init,
.start = timer_start,
.stop = timer_stop,
.count_get = timer_counter_get,
.control = timer_ctrl,
};
#ifdef BSP_USING_TIM1
static void isr_timer(void *callback_arg, cyhal_timer_event_t event)
{
/* enter interrupt */
rt_interrupt_enter();
(void)callback_arg;
(void)event;
rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM1_INDEX].time_device);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef BSP_USING_TIM2
static void isr_timer(void *callback_arg, cyhal_timer_event_t event)
{
/* enter interrupt */
rt_interrupt_enter();
(void)callback_arg;
(void)event;
rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM2_INDEX].time_device);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
int cyp_hwtimer_init(void)
{
int i = 0;
int result = RT_EOK;
for (i = 0; i < sizeof(cyp_hwtimer_obj) / sizeof(cyp_hwtimer_obj[0]); i++)
{
cyp_hwtimer_obj[i].time_device.info = &_info;
cyp_hwtimer_obj[i].time_device.ops = &_ops;
if (rt_device_hwtimer_register(&cyp_hwtimer_obj[i].time_device, cyp_hwtimer_obj[i].name, &cyp_hwtimer_obj[i].tim_handle) != RT_EOK)
{
LOG_E("%s register failed", cyp_hwtimer_obj[i].name);
result = -RT_ERROR;
}
}
return result;
}
INIT_BOARD_EXPORT(cyp_hwtimer_init);
#endif /*RT_USING_HWTIMER*/
#endif /*BSP_USING_TIM*/
/* this is a hwtimer test demo*/
#include <rtthread.h>
#include <rtdevice.h>
#define HWTIMER_DEV_NAME "time2" /* device name */
static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size)
{
rt_kprintf("this is hwtimer timeout callback fucntion!\n");
rt_kprintf("tick is :%d !\n", rt_tick_get());
return 0;
}
int hwtimer_sample()
{
rt_err_t ret = RT_EOK;
rt_hwtimerval_t timeout_s;
rt_device_t hw_dev = RT_NULL;
rt_hwtimer_mode_t mode;
rt_uint32_t freq = 10000;
hw_dev = rt_device_find(HWTIMER_DEV_NAME);
if (hw_dev == RT_NULL)
{
rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME);
return RT_ERROR;
}
ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR);
if (ret != RT_EOK)
{
rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME);
return ret;
}
rt_device_set_rx_indicate(hw_dev, timeout_cb);
rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq);
mode = HWTIMER_MODE_PERIOD;
ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode);
if (ret != RT_EOK)
{
rt_kprintf("set mode failed! ret is :%d\n", ret);
return ret;
}
/* Example Set the timeout period of the timer */
timeout_s.sec = 3; /* secend */
timeout_s.usec = 0; /* microsecend */
if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s))
{
rt_kprintf("set timeout value failed\n");
return RT_ERROR;
}
while (1)
{
rt_thread_mdelay(1500);
rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s));
rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec);
}
return ret;
}
MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample);
\ No newline at end of file
bsp/cypress/libraries/HAL_Drivers/drv_hwtimer.h 0 → 100644
浏览文件 @ efda5106
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-07-29 rtthread qiu first version
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#include <rtthread.h>
#include "cy_pdl.h"
#include "cyhal.h"
#include "cybsp.h"
#include "cy_retarget_io.h"
#ifndef TIM_DEV_INFO_CONFIG
#define TIM_DEV_INFO_CONFIG \
{ \
.maxfreq = 1000000, \
.minfreq = 2000, \
.maxcnt = 0xFFFF, \
.cntmode = HWTIMER_CNTMODE_UP, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_TIM1
#ifndef TIM1_CONFIG
#define TIM1_CONFIG \
{ \
.tim_irqn = tcpwm_0_interrupts_0_IRQn, \
.name = "time1", \
}
#endif /*TIM1_CONFIG*/
#endif /* BSP_USING_TIM1 */
#ifdef BSP_USING_TIM2
#ifndef TIM2_CONFIG
#define TIM2_CONFIG \
{ \
.tim_irqn = tcpwm_1_interrupts_0_IRQn, \
.name = "time2", \
}
#endif /*TIM2_CONFIG*/
#endif /* BSP_USING_TIM2 */
#endif /* __DRV_HWTIMER_H__ */
\ No newline at end of file
bsp/cypress/libraries/HAL_Drivers/drv_uart.c
浏览文件 @ efda5106
...@@ -12,51 +12,50 @@ ...@@ -12,51 +12,50 @@
#include "drv_uart.h" #include "drv_uart.h"
#include "uart_config.h" #include "uart_config.h"
#include "cy_retarget_io.h"
#include "cyhal_scb_common.h" #include "cyhal_scb_common.h"
enum enum
{ {
#ifdef BSP_USING_UART0 #ifdef BSP_USING_UART0
UART0_INDEX, UART0_INDEX,
#endif #endif
#ifdef BSP_USING_UART1 #ifdef BSP_USING_UART1
UART1_INDEX, UART1_INDEX,
#endif #endif
#ifdef BSP_USING_UART2 #ifdef BSP_USING_UART2
UART2_INDEX, UART2_INDEX,
#endif #endif
#ifdef BSP_USING_UART3 #ifdef BSP_USING_UART3
UART3_INDEX, UART3_INDEX,
#endif #endif
#ifdef BSP_USING_UART4 #ifdef BSP_USING_UART4
UART4_INDEX, UART4_INDEX,
#endif #endif
#ifdef BSP_USING_UART5 #ifdef BSP_USING_UART5
UART5_INDEX, UART5_INDEX,
#endif #endif
}; };
static struct ifx_uart_config uart_config[] = static struct ifx_uart_config uart_config[] =
{ {
#ifdef BSP_USING_UART0 #ifdef BSP_USING_UART0
UART0_CONFIG, UART0_CONFIG,
#endif #endif
#ifdef BSP_USING_UART1 #ifdef BSP_USING_UART1
UART1_CONFIG, UART1_CONFIG,
#endif #endif
#ifdef BSP_USING_UART2 #ifdef BSP_USING_UART2
UART2_CONFIG, UART2_CONFIG,
#endif #endif
#ifdef BSP_USING_UART3 #ifdef BSP_USING_UART3
UART3_CONFIG, UART3_CONFIG,
#endif #endif
#ifdef BSP_USING_UART4 #ifdef BSP_USING_UART4
UART4_CONFIG, UART4_CONFIG,
#endif #endif
#ifdef BSP_USING_UART5 #ifdef BSP_USING_UART5
UART5_CONFIG, UART5_CONFIG,
#endif #endif
}; };
static struct ifx_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; static struct ifx_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
...@@ -196,20 +195,20 @@ static rt_err_t ifx_control(struct rt_serial_device *serial, int cmd, void *arg) ...@@ -196,20 +195,20 @@ static rt_err_t ifx_control(struct rt_serial_device *serial, int cmd, void *arg)
switch (cmd) switch (cmd)
{ {
case RT_DEVICE_CTRL_CLR_INT: case RT_DEVICE_CTRL_CLR_INT:
break; break;
case RT_DEVICE_CTRL_SET_INT: case RT_DEVICE_CTRL_SET_INT:
/* Unmasking only the RX fifo not empty interrupt bit */ /* Unmasking only the RX fifo not empty interrupt bit */
uart->config->usart_x->INTR_RX_MASK = SCB_INTR_RX_MASK_NOT_EMPTY_Msk; uart->config->usart_x->INTR_RX_MASK = SCB_INTR_RX_MASK_NOT_EMPTY_Msk;
/* Interrupt Settings for UART */ /* Interrupt Settings for UART */
Cy_SysInt_Init(uart->config->UART_SCB_IRQ_cfg, uart->config->userIsr); Cy_SysInt_Init(uart->config->UART_SCB_IRQ_cfg, uart->config->userIsr);
/* Enable the interrupt */ /* Enable the interrupt */
NVIC_EnableIRQ(uart->config->intrSrc); NVIC_EnableIRQ(uart->config->intrSrc);
break; break;
} }
return (RT_EOK); return (RT_EOK);
......
bsp/cypress/libraries/HAL_Drivers/drv_uart.h
浏览文件 @ efda5106
...@@ -15,7 +15,6 @@ ...@@ -15,7 +15,6 @@
#include <rtdevice.h> #include <rtdevice.h>
#include "board.h" #include "board.h"
#include "cycfg_peripherals.h"
#define uart_isr_callback(name) name##_isr_callback #define uart_isr_callback(name) name##_isr_callback
......
bsp/cypress/libraries/HAL_Drivers/uart_config.h
浏览文件 @ efda5106
...@@ -20,7 +20,7 @@ extern "C" { ...@@ -20,7 +20,7 @@ extern "C" {
#ifdef BSP_USING_UART0 #ifdef BSP_USING_UART0
/* UART0 device driver structure */ /* UART0 device driver structure */
cy_stc_sysint_t UART2_SCB_IRQ_cfg = cy_stc_sysint_t UART0_SCB_IRQ_cfg =
{ {
.intrSrc = (IRQn_Type) scb_0_interrupt_IRQn, .intrSrc = (IRQn_Type) scb_0_interrupt_IRQn,
.intrPriority = (7u), .intrPriority = (7u),
......
bsp/cypress/libraries/IFX_PSOC6_HAL/SConscript
浏览文件 @ efda5106
...@@ -19,8 +19,7 @@ src = Split(''' ...@@ -19,8 +19,7 @@ src = Split('''
mtb-hal-cat1/source/cyhal_utils_psoc.c mtb-hal-cat1/source/cyhal_utils_psoc.c
mtb-hal-cat1/source/cyhal_utils.c mtb-hal-cat1/source/cyhal_utils.c
mtb-hal-cat1/source/cyhal_lptimer.c mtb-hal-cat1/source/cyhal_lptimer.c
mtb-hal-cat1/source/cyhal_irq_psoc.c mtb-hal-cat1/source/cyhal_irq_psoc.c
mtb-hal-cat1/include_pvt/cyhal_hw_types.h
mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c mtb-hal-cat1/COMPONENT_CAT1A/source/triggers/cyhal_triggers_psoc6_02.c
mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_124_bga.c mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/cyhal_psoc6_02_124_bga.c
mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/cy_device.c
...@@ -37,8 +36,7 @@ src = Split(''' ...@@ -37,8 +36,7 @@ src = Split('''
mtb-pdl-cat1/drivers/source/cy_ipc_sema.c mtb-pdl-cat1/drivers/source/cy_ipc_sema.c
mtb-pdl-cat1/drivers/source/cy_ipc_drv.c mtb-pdl-cat1/drivers/source/cy_ipc_drv.c
mtb-pdl-cat1/drivers/source/cy_trigmux.c mtb-pdl-cat1/drivers/source/cy_trigmux.c
mtb-pdl-cat1/drivers/source/cy_prot.c mtb-pdl-cat1/drivers/source/cy_prot.c
mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.s
TARGET_CY8CKIT-062S2-43012/cybsp.c TARGET_CY8CKIT-062S2-43012/cybsp.c
TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/system_psoc6_cm4.c
TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg.c
...@@ -95,6 +93,16 @@ if GetDepend(['RT_USING_SPI']): ...@@ -95,6 +93,16 @@ if GetDepend(['RT_USING_SPI']):
if GetDepend(['RT_USING_I2C']): if GetDepend(['RT_USING_I2C']):
src += ['mtb-hal-cat1/source/cyhal_i2c.c'] src += ['mtb-hal-cat1/source/cyhal_i2c.c']
if GetDepend('BSP_USING_USBD'):
src += ['mtb_shared/usbdev/cy_usb_dev.c']
src += ['mtb_shared/usbdev/cy_usb_dev_hid.c']
src += ['mtb-hal-cat1/source/cyhal_usb_dev.c']
src += ['mtb-pdl-cat1/drivers/source/cy_dma.c']
src += ['mtb-pdl-cat1/drivers/source/cy_usbfs_dev_drv.c']
src += ['mtb-pdl-cat1/drivers/source/cy_usbfs_dev_drv_io.c']
src += ['mtb-pdl-cat1/drivers/source/cy_usbfs_dev_drv_io_dma.c']
src += ['TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_usbdev.c']
if GetDepend('BSP_USING_RTC'): if GetDepend('BSP_USING_RTC'):
src += ['mtb-pdl-cat1/drivers/source/cy_rtc.c'] src += ['mtb-pdl-cat1/drivers/source/cy_rtc.c']
src += ['mtb-hal-cat1/source/cyhal_rtc.c'] src += ['mtb-hal-cat1/source/cyhal_rtc.c']
...@@ -121,18 +129,25 @@ if GetDepend(['RT_USING_WDT']): ...@@ -121,18 +129,25 @@ if GetDepend(['RT_USING_WDT']):
src += ['mtb-pdl-cat1/drivers/source/cy_wdt.c'] src += ['mtb-pdl-cat1/drivers/source/cy_wdt.c']
src += ['mtb-hal-cat1/source/cyhal_wdt.c'] src += ['mtb-hal-cat1/source/cyhal_wdt.c']
if GetDepend(['RT_USING_DAC']):
src += ['mtb_shared/csdidac/cy_csdidac.c']
if GetDepend(['RT_USING_HWTIMER']):
src += ['mtb-hal-cat1/source/cyhal_timer.c']
path = [cwd + '/capsense', path = [cwd + '/capsense',
cwd + '/psoc6cm0p', cwd + '/psoc6cm0p',
cwd + '/retarget-io', cwd + '/retarget-io',
cwd + '/core-lib/include', cwd + '/core-lib/include',
cwd + '/mtb_shared/serial-flash', cwd + '/mtb_shared/serial-flash',
cwd + '/mtb-hal-cat1/include', cwd + '/mtb_shared/usbdev',
cwd + '/mtb-hal-cat1/include_pvt', cwd + '/mtb_shared/csdidac',
cwd + '/mtb-pdl-cat1/cmsis/include', cwd + '/mtb-pdl-cat1/cmsis/include',
cwd + '/mtb-pdl-cat1/drivers/include', cwd + '/mtb-pdl-cat1/drivers/include',
cwd + '/mtb-hal-cat1/COMPONENT_CAT1A/include',
cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include', cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include',
cwd + '/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include', cwd + '/mtb-hal-cat1/include_pvt',
cwd + '/mtb-hal-cat1/include',
cwd + '/mtb-hal-cat1/COMPONENT_CAT1A/include',
cwd + '/TARGET_CY8CKIT-062S2-43012', cwd + '/TARGET_CY8CKIT-062S2-43012',
cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource'] cwd + '/TARGET_CY8CKIT-062S2-43012/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource']
......
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb-hal-cat1/source/cyhal_scb_common.c
浏览文件 @ efda5106
...@@ -38,7 +38,7 @@ extern "C" ...@@ -38,7 +38,7 @@ extern "C"
{ {
#endif #endif
CySCB_Type* const _CYHAL_SCB_BASE_ADDRESSES[_SCB_ARRAY_SIZE] = CySCB_Type *const _CYHAL_SCB_BASE_ADDRESSES[_SCB_ARRAY_SIZE] =
{ {
#ifdef SCB0 #ifdef SCB0
SCB0, SCB0,
...@@ -149,73 +149,93 @@ const _cyhal_system_irq_t _CYHAL_SCB_IRQ_N[_SCB_ARRAY_SIZE] = ...@@ -149,73 +149,93 @@ const _cyhal_system_irq_t _CYHAL_SCB_IRQ_N[_SCB_ARRAY_SIZE] =
/** The configuration structs for the resource in use on each SCB block */ /** The configuration structs for the resource in use on each SCB block */
static void *_cyhal_scb_config_structs[_SCB_ARRAY_SIZE]; static void *_cyhal_scb_config_structs[_SCB_ARRAY_SIZE];
/** The callback to use for each scb instance */ /** The callback to use for each scb instance */
static bool (*_cyhal_scb_config_pm_callback[_SCB_ARRAY_SIZE]) (void *obj_ptr, cyhal_syspm_callback_state_t state, cy_en_syspm_callback_mode_t pdl_mode); static bool (*_cyhal_scb_config_pm_callback[_SCB_ARRAY_SIZE])(void *obj_ptr, cyhal_syspm_callback_state_t state, cy_en_syspm_callback_mode_t pdl_mode);
static uint8_t _cyhal_scb_get_block_from_irqn(_cyhal_system_irq_t irqn) static uint8_t _cyhal_scb_get_block_from_irqn(_cyhal_system_irq_t irqn)
{ {
switch (irqn) switch (irqn)
{ {
#if (_SCB_ARRAY_SIZE > 0) #if (_SCB_ARRAY_SIZE > 0)
case scb_0_interrupt_IRQn: return 0; case scb_0_interrupt_IRQn:
return 0;
#endif #endif
#if (_SCB_ARRAY_SIZE > 1) #if (_SCB_ARRAY_SIZE > 1)
case scb_1_interrupt_IRQn: return 1; case scb_1_interrupt_IRQn:
return 1;
#endif #endif
#if (_SCB_ARRAY_SIZE > 2) #if (_SCB_ARRAY_SIZE > 2)
case scb_2_interrupt_IRQn: return 2; case scb_2_interrupt_IRQn:
return 2;
#endif #endif
#if (_SCB_ARRAY_SIZE > 3) #if (_SCB_ARRAY_SIZE > 3)
#if !defined(CY_DEVICE_PSOC6A256K) #if !defined(CY_DEVICE_PSOC6A256K)
case scb_3_interrupt_IRQn: return 3; case scb_3_interrupt_IRQn:
return 3;
#endif #endif
#endif #endif
#if (_SCB_ARRAY_SIZE > 4) #if (_SCB_ARRAY_SIZE > 4)
case scb_4_interrupt_IRQn: return 4; case scb_4_interrupt_IRQn:
return 4;
#endif #endif
#if (_SCB_ARRAY_SIZE > 5) #if (_SCB_ARRAY_SIZE > 5)
case scb_5_interrupt_IRQn: return 5; case scb_5_interrupt_IRQn:
return 5;
#endif #endif
#if (_SCB_ARRAY_SIZE > 6) #if (_SCB_ARRAY_SIZE > 6)
case scb_6_interrupt_IRQn: return 6; case scb_6_interrupt_IRQn:
return 6;
#endif #endif
#if (_SCB_ARRAY_SIZE > 7) #if (_SCB_ARRAY_SIZE > 7)
case scb_7_interrupt_IRQn: return 7; case scb_7_interrupt_IRQn:
return 7;
#endif #endif
#if (_SCB_ARRAY_SIZE > 8) #if (_SCB_ARRAY_SIZE > 8)
case scb_8_interrupt_IRQn: return 8; case scb_8_interrupt_IRQn:
return 8;
#endif #endif
#if (_SCB_ARRAY_SIZE > 9) #if (_SCB_ARRAY_SIZE > 9)
case scb_9_interrupt_IRQn: return 9; case scb_9_interrupt_IRQn:
return 9;
#endif #endif
#if (_SCB_ARRAY_SIZE > 10) #if (_SCB_ARRAY_SIZE > 10)
case scb_10_interrupt_IRQn: return 10; case scb_10_interrupt_IRQn:
return 10;
#endif #endif
#if (_SCB_ARRAY_SIZE > 11) #if (_SCB_ARRAY_SIZE > 11)
case scb_11_interrupt_IRQn: return 11; case scb_11_interrupt_IRQn:
return 11;
#endif #endif
#if (_SCB_ARRAY_SIZE > 12) #if (_SCB_ARRAY_SIZE > 12)
case scb_12_interrupt_IRQn: return 12; case scb_12_interrupt_IRQn:
return 12;
#endif #endif
#if (_SCB_ARRAY_SIZE > 13) #if (_SCB_ARRAY_SIZE > 13)
case scb_13_interrupt_IRQn: return 13; case scb_13_interrupt_IRQn:
return 13;
#endif #endif
#if (_SCB_ARRAY_SIZE > 14) #if (_SCB_ARRAY_SIZE > 14)
case scb_14_interrupt_IRQn: return 14; case scb_14_interrupt_IRQn:
return 14;
#endif #endif
#if (_SCB_ARRAY_SIZE > 15) #if (_SCB_ARRAY_SIZE > 15)
case scb_15_interrupt_IRQn: return 15; case scb_15_interrupt_IRQn:
return 15;
#endif #endif
#if (_SCB_ARRAY_SIZE > 16) #if (_SCB_ARRAY_SIZE > 16)
case scb_16_interrupt_IRQn: return 16; case scb_16_interrupt_IRQn:
return 16;
#endif #endif
#if (_SCB_ARRAY_SIZE > 17) #if (_SCB_ARRAY_SIZE > 17)
case scb_17_interrupt_IRQn: return 17; case scb_17_interrupt_IRQn:
return 17;
#endif #endif
#if (_SCB_ARRAY_SIZE > 18) #if (_SCB_ARRAY_SIZE > 18)
case scb_18_interrupt_IRQn: return 18; case scb_18_interrupt_IRQn:
return 18;
#endif #endif
#if (_SCB_ARRAY_SIZE > 19) #if (_SCB_ARRAY_SIZE > 19)
case scb_19_interrupt_IRQn: return 19; case scb_19_interrupt_IRQn:
return 19;
#endif #endif
#if (_SCB_ARRAY_SIZE > 20) #if (_SCB_ARRAY_SIZE > 20)
#error "Unhandled scb count" #error "Unhandled scb count"
...@@ -281,7 +301,7 @@ uint32_t _cyhal_i2c_set_peri_divider(void *obj, bool is_i2c, uint32_t freq, bool ...@@ -281,7 +301,7 @@ uint32_t _cyhal_i2c_set_peri_divider(void *obj, bool is_i2c, uint32_t freq, bool
} }
if (peri_freq > 0 && _cyhal_utils_peri_pclk_assign_divider( if (peri_freq > 0 && _cyhal_utils_peri_pclk_assign_divider(
_cyhal_scb_get_clock_index(block_num), clock) == CY_SYSCLK_SUCCESS) _cyhal_scb_get_clock_index(block_num), clock) == CY_SYSCLK_SUCCESS)
{ {
cy_rslt_t status = CY_RSLT_SUCCESS; cy_rslt_t status = CY_RSLT_SUCCESS;
...@@ -294,18 +314,18 @@ uint32_t _cyhal_i2c_set_peri_divider(void *obj, bool is_i2c, uint32_t freq, bool ...@@ -294,18 +314,18 @@ uint32_t _cyhal_i2c_set_peri_divider(void *obj, bool is_i2c, uint32_t freq, bool
status = cyhal_clock_set_enabled(clock, true, false); status = cyhal_clock_set_enabled(clock, true, false);
} }
if(status == CY_RSLT_SUCCESS) if (status == CY_RSLT_SUCCESS)
{ {
data_rate = (is_slave) data_rate = (is_slave)
? Cy_SCB_I2C_GetDataRate(base, cyhal_clock_get_frequency(clock)) ? Cy_SCB_I2C_GetDataRate(base, cyhal_clock_get_frequency(clock))
: Cy_SCB_I2C_SetDataRate(base, freq, cyhal_clock_get_frequency(clock)); : Cy_SCB_I2C_SetDataRate(base, freq, cyhal_clock_get_frequency(clock));
} }
} }
} }
return data_rate; return data_rate;
} }
const cyhal_resource_pin_mapping_t* _cyhal_scb_find_map(cyhal_gpio_t pin, const cyhal_resource_pin_mapping_t *pin_map, const cyhal_resource_pin_mapping_t *_cyhal_scb_find_map(cyhal_gpio_t pin, const cyhal_resource_pin_mapping_t *pin_map,
size_t count, const cyhal_resource_inst_t *block_res) size_t count, const cyhal_resource_inst_t *block_res)
{ {
for (size_t i = 0; i < count; i++) for (size_t i = 0; i < count; i++)
...@@ -356,17 +376,17 @@ uint32_t _cyhal_scb_check_pin_affiliation(cyhal_gpio_t pin, const cyhal_resource ...@@ -356,17 +376,17 @@ uint32_t _cyhal_scb_check_pin_affiliation(cyhal_gpio_t pin, const cyhal_resource
cy_rslt_t _cyhal_scb_set_fifo_level(CySCB_Type *base, cyhal_scb_fifo_type_t type, uint16_t level) cy_rslt_t _cyhal_scb_set_fifo_level(CySCB_Type *base, cyhal_scb_fifo_type_t type, uint16_t level)
{ {
if(!CY_SCB_IS_TRIGGER_LEVEL_VALID(base, level)) if (!CY_SCB_IS_TRIGGER_LEVEL_VALID(base, level))
return CYHAL_SCB_RSLT_ERR_BAD_ARGUMENT; return CYHAL_SCB_RSLT_ERR_BAD_ARGUMENT;
if(type == CYHAL_SCB_FIFO_RX) if (type == CYHAL_SCB_FIFO_RX)
{ {
SCB_RX_FIFO_CTRL(base) &= ~SCB_RX_FIFO_CTRL_TRIGGER_LEVEL_Msk; SCB_RX_FIFO_CTRL(base) &= ~SCB_RX_FIFO_CTRL_TRIGGER_LEVEL_Msk;
SCB_RX_FIFO_CTRL(base) |= _VAL2FLD(SCB_RX_FIFO_CTRL_TRIGGER_LEVEL, level); SCB_RX_FIFO_CTRL(base) |= _VAL2FLD(SCB_RX_FIFO_CTRL_TRIGGER_LEVEL, level);
return CY_RSLT_SUCCESS; return CY_RSLT_SUCCESS;
} }
else if(type == CYHAL_SCB_FIFO_TX) else if (type == CYHAL_SCB_FIFO_TX)
{ {
SCB_TX_FIFO_CTRL(base) &= ~SCB_TX_FIFO_CTRL_TRIGGER_LEVEL_Msk; SCB_TX_FIFO_CTRL(base) &= ~SCB_TX_FIFO_CTRL_TRIGGER_LEVEL_Msk;
SCB_TX_FIFO_CTRL(base) |= _VAL2FLD(SCB_TX_FIFO_CTRL_TRIGGER_LEVEL, level); SCB_TX_FIFO_CTRL(base) |= _VAL2FLD(SCB_TX_FIFO_CTRL_TRIGGER_LEVEL, level);
...@@ -384,13 +404,13 @@ cy_rslt_t _cyhal_scb_enable_output(cyhal_resource_inst_t resource, cyhal_scb_out ...@@ -384,13 +404,13 @@ cy_rslt_t _cyhal_scb_enable_output(cyhal_resource_inst_t resource, cyhal_scb_out
// This just returns a proper cyhal_source_t. Use _cyhal_scb_set_fifo_level // This just returns a proper cyhal_source_t. Use _cyhal_scb_set_fifo_level
// to actually set level. // to actually set level.
cyhal_internal_source_t src_int; cyhal_internal_source_t src_int;
if(output == CYHAL_SCB_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED) if (output == CYHAL_SCB_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED)
{ {
#if defined(CY_DEVICE_PSOC6A256K) #if defined(CY_DEVICE_PSOC6A256K)
// 256K devices have no SCB3 // 256K devices have no SCB3
src_int = (resource.block_num < 3) src_int = (resource.block_num < 3)
? (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_RX_REQ + resource.block_num) ? (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_RX_REQ + resource.block_num)
: (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_RX_REQ + resource.block_num - 1); : (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_RX_REQ + resource.block_num - 1);
#else #else
src_int = (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_RX_REQ + resource.block_num); src_int = (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_RX_REQ + resource.block_num);
#endif #endif
...@@ -400,13 +420,13 @@ cy_rslt_t _cyhal_scb_enable_output(cyhal_resource_inst_t resource, cyhal_scb_out ...@@ -400,13 +420,13 @@ cy_rslt_t _cyhal_scb_enable_output(cyhal_resource_inst_t resource, cyhal_scb_out
} }
// This just returns a proper cyhal_source_t. Use _cyhal_scb_set_fifo_level // This just returns a proper cyhal_source_t. Use _cyhal_scb_set_fifo_level
// to actually set level. // to actually set level.
else if(output == CYHAL_SCB_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED) else if (output == CYHAL_SCB_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED)
{ {
#if defined(CY_DEVICE_PSOC6A256K) #if defined(CY_DEVICE_PSOC6A256K)
// 256K devices have no SCB3 // 256K devices have no SCB3
src_int = (resource.block_num < 3) src_int = (resource.block_num < 3)
? (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_TX_REQ + resource.block_num) ? (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_TX_REQ + resource.block_num)
: (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_TX_REQ + resource.block_num - 1); : (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_TX_REQ + resource.block_num - 1);
#else #else
src_int = (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_TX_REQ + resource.block_num); src_int = (cyhal_internal_source_t)(_CYHAL_TRIGGER_SCB0_TR_TX_REQ + resource.block_num);
#endif #endif
...@@ -430,7 +450,7 @@ cy_rslt_t _cyhal_scb_disable_output(cyhal_scb_output_t output) ...@@ -430,7 +450,7 @@ cy_rslt_t _cyhal_scb_disable_output(cyhal_scb_output_t output)
#if (defined(CY_IP_MXSCB) || defined(CY_DEVICE_PSOC4AMC) || defined(CY_DEVICE_PSOC4AS3) || defined(CY_DEVICE_PSOC4AS4)) #if (defined(CY_IP_MXSCB) || defined(CY_DEVICE_PSOC4AMC) || defined(CY_DEVICE_PSOC4AS3) || defined(CY_DEVICE_PSOC4AS4))
// Noop: Use _cyhal_scb_set_fifo_level to actually set level // Noop: Use _cyhal_scb_set_fifo_level to actually set level
if (output == CYHAL_SCB_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED || if (output == CYHAL_SCB_OUTPUT_TRIGGER_RX_FIFO_LEVEL_REACHED ||
output == CYHAL_SCB_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED) output == CYHAL_SCB_OUTPUT_TRIGGER_TX_FIFO_LEVEL_REACHED)
{ {
return CY_RSLT_SUCCESS; return CY_RSLT_SUCCESS;
} }
...@@ -456,7 +476,7 @@ static bool _cyhal_scb_pm_callback_index(uint8_t index, cyhal_syspm_callback_sta ...@@ -456,7 +476,7 @@ static bool _cyhal_scb_pm_callback_index(uint8_t index, cyhal_syspm_callback_sta
return ((NULL != obj) && (callback != NULL)) ? callback(obj, state, pdl_mode) : true; return ((NULL != obj) && (callback != NULL)) ? callback(obj, state, pdl_mode) : true;
} }
static bool _cyhal_scb_pm_callback_common(cyhal_syspm_callback_state_t state, cyhal_syspm_callback_mode_t mode, void* callback_arg) static bool _cyhal_scb_pm_callback_common(cyhal_syspm_callback_state_t state, cyhal_syspm_callback_mode_t mode, void *callback_arg)
{ {
CY_UNUSED_PARAMETER(callback_arg); CY_UNUSED_PARAMETER(callback_arg);
bool allow = true; bool allow = true;
...@@ -516,15 +536,15 @@ void _cyhal_scb_update_instance_data(uint8_t block_num, void *obj, cyhal_scb_ins ...@@ -516,15 +536,15 @@ void _cyhal_scb_update_instance_data(uint8_t block_num, void *obj, cyhal_scb_ins
if (count == 0) if (count == 0)
{ {
CY_ASSERT(obj == NULL); CY_ASSERT(obj == NULL);
#if (CYHAL_DRIVER_AVAILABLE_SYSPM) #if (CYHAL_DRIVER_AVAILABLE_SYSPM)
_cyhal_syspm_unregister_peripheral_callback(&_cyhal_scb_pm_callback_data); _cyhal_syspm_unregister_peripheral_callback(&_cyhal_scb_pm_callback_data);
#endif #endif
} }
else if (count == 1 && obj != NULL) else if (count == 1 && obj != NULL)
{ {
#if (CYHAL_DRIVER_AVAILABLE_SYSPM) #if (CYHAL_DRIVER_AVAILABLE_SYSPM)
_cyhal_syspm_register_peripheral_callback(&_cyhal_scb_pm_callback_data); _cyhal_syspm_register_peripheral_callback(&_cyhal_scb_pm_callback_data);
#endif #endif
} }
} }
......
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/csdidac/LICENSE 0 → 100644
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CYPRESS END USER LICENSE AGREEMENT
PLEASE READ THIS END USER LICENSE AGREEMENT ("Agreement") CAREFULLY BEFORE DOWNLOADING, INSTALLING, COPYING, OR USING THIS SOFTWARE AND ACCOMPANYING DOCUMENTATION. BY DOWNLOADING, INSTALLING, COPYING OR USING THE SOFTWARE, YOU ARE AGREEING TO BE BOUND BY THIS AGREEMENT. IF YOU DO NOT AGREE TO ALL OF THE TERMS OF THIS AGREEMENT, PROMPTLY RETURN AND DO NOT USE THE SOFTWARE. IF YOU HAVE PURCHASED THIS LICENSE TO THE SOFTWARE, YOUR RIGHT TO RETURN THE SOFTWARE EXPIRES 30 DAYS AFTER YOUR PURCHASE AND APPLIES ONLY TO THE ORIGINAL PURCHASER.
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"Software" means this software and any accompanying documentation, including any upgrades, updates, bug fixes or modified versions provided to you by Cypress.
"Source Code" means software in human-readable form.
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"Development Tools" means software that is intended to be installed on a personal computer and used to create programming code for Firmware, Drivers, or Host Applications. Examples of Development Tools are Cypress's PSoC Creator software, Cypress's WICED SDKs, and Cypress's Modus Toolbox software.
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"inf File" means a hardware setup information file (.inf file) created by the Software to allow a Microsoft Windows operating system to install the driver for a Cypress hardware product.
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a. to use the Development Tools in object code form solely for the purpose of creating Firmware, Drivers, Host Applications, and inf Files for Cypress hardware products; and
b. (i) if provided in Source Code form, to copy, modify, and compile the Firmware Source Code to create Firmware for execution on a Cypress hardware product, and (ii) to distribute Firmware in binary code form only, only when installed onto a Cypress hardware product; and
c. (i) if provided in Source Code form, to copy, modify, and compile the Driver Source Code to create one or more Drivers to enable the use of a Cypress hardware product on a particular host operating system, and (ii) to distribute the Driver, in binary code form only, only when installed on a device that includes the Cypress hardware product that the Driver is intended to enable; and
d. (i) if provided in Source Code form, to copy, modify, and compile the Host Application Source Code to create one or more Host Applications to program, control, or communicate with a Cypress hardware product, and (ii) to distribute Host Applications, in binary code form only, only when installed on a device that includes a Cypress hardware product that the Host Application is intended to program, control, or communicate with; and
e. to freely distribute any inf File.
Any distribution of Software permitted under this Agreement must be made pursuant to your standard end user license agreement used for your proprietary (closed source) software products, such end user license agreement to include, at a minimum, provisions limiting your licensors' liability and prohibiting reverse engineering of the Software, consistent with such provisions in this Agreement.
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5. No Support. Cypress may, but is not required to, provide technical support for the Software.
6. Term and Termination. This Agreement is effective until terminated, and either party may terminate this Agreement at any time with or without cause. This Agreement and your license rights under this Agreement will terminate immediately without notice from Cypress if you fail to comply with any provision of this Agreement. Upon termination, you must destroy all copies of Software in your possession or control. The following paragraphs shall survive any termination of this Agreement: "Free and Open Source Software," "Proprietary Rights; Ownership," "Compliance With Law," "Disclaimer," "Limitation of Liability," and "General."
7. Compliance With Law. Each party agrees to comply with all applicable laws, rules and regulations in connection with its activities under this Agreement. Without limiting the foregoing, the Software may be subject to export control laws and regulations of the United States and other countries. You agree to comply strictly with all such laws and regulations and acknowledge that you have the responsibility to obtain licenses to export, re-export, or import the Software.
8. Disclaimer. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THE SOFTWARE, INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes to the Software without notice. Cypress does not assume any liability arising out of the application or use of Software or any product or circuit described in the Software. It is the responsibility of the user of the Software to properly design, program, and test the functionality and safety of any application made of the Software and any resulting product. Cypress does not authorize its Software or products for use in any products where a malfunction or failure of the Software or Cypress product may reasonably be expected to result in significant property damage, injury or death (“High Risk Product”). If you include any Software or Cypress product in a High Risk Product, you assume all risk of such use and agree to indemnify Cypress and its suppliers against all liability. No computing device can be absolutely secure. Therefore, despite security measures implemented in Cypress hardware or software products, Cypress does not assume any liability arising out of any security breach, such as unauthorized access to or use of a Cypress product.
9. Limitation of Liability. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT WILL CYPRESS OR ITS SUPPLIERS, RESELLERS, OR DISTRIBUTORS BE LIABLE FOR ANY LOST REVENUE, PROFIT, OR DATA, OR FOR SPECIAL, INDIRECT, CONSEQUENTIAL, INCIDENTAL, OR PUNITIVE DAMAGES HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, ARISING OUT OF OR RELATED TO THE USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF CYPRESS OR ITS SUPPLIERS, RESELLERS, OR DISTRIBUTORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN NO EVENT SHALL CYPRESS' OR ITS SUPPLIERS’, RESELLERS’, OR DISTRIBUTORS’ TOTAL LIABILITY TO YOU, WHETHER IN CONTRACT, TORT (INCLUDING NEGLIGENCE), OR OTHERWISE, EXCEED THE GREATER OF US$500 OR THE PRICE PAID BY YOU FOR THE SOFTWARE. THE FOREGOING LIMITATIONS SHALL APPLY EVEN IF THE ABOVE-STATED WARRANTY FAILS OF ITS ESSENTIAL PURPOSE. BECAUSE SOME STATES OR JURISDICTIONS DO NOT ALLOW LIMITATION OR EXCLUSION OF CONSEQUENTIAL OR INCIDENTAL DAMAGES, ALL OR PORTIONS OF THE ABOVE LIMITATION MAY NOT APPLY TO YOU.
10. Restricted Rights. The Software is commercial computer software as that term is described in 48 C.F.R. 252.227-7014(a)(1). If the Software is being acquired by or on behalf of the U.S. Government or by a U.S. Government prime contractor or subcontractor (at any tier), then the Government's rights in Software shall be only those set forth in this Agreement.
11. Personal Information. You agree that information you provide through your registration on Cypress IoT Community Forum or other Cypress websites, including contact information or other personal information, may be collected and used by Cypress consistent with its Data Privacy Policy (www.cypress.com/privacy-policy), as updated or revised from time to time, and may be provided to its third party sales representatives, distributors and other entities conducting sales activities for Cypress for sales-related and other business purposes.
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bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/csdidac/README.md 0 → 100644
浏览文件 @ efda5106
# Cypress CSDIDAC Middleware Library
### Overview
The CSDIDAC provides an API that allows the CSD HW block IDAC functionality.
It can be useful for devices that do not include other DAC options.
### Features
* A two-channel IDAC with the 7-bit resolution
* The IDAC A and IDAC B channels can be enabled/disabled independently
* The IDAC A and IDAC B channels can be configured with sourcing/sinking current independently
* The IDAC A and IDAC B channels can be joined to increase a maximum output current
* The IDAC A and IDAC B channels can be enabled/disabled simultaneously by using the CY_CSDIDAC_AB option
* The 0 to 609.6 uA (609600 nA) current range is available for each IDAC channel
* Each IDAC can use independently one of the six available LSB depending on a desired output current
### Quick Start
The CSDIDAC could be configured by the ModusToolbox CSD personality. Refer to the [API Reference Guide Configuration Considerations](https://cypresssemiconductorco.github.io/csdidac/csdidac_api_reference_manual/html/index.html#group_csdidac_configuration).
### More information
The following resources contain more information:
* [CSDIDAC Middleware RELEASE.md](./RELEASE.md)
* [CSDIDAC Middleware API Reference Guide](https://cypresssemiconductorco.github.io/csdidac/csdidac_api_reference_manual/html/index.html)
* [ModusToolbox Software Environment, Quick Start Guide, Documentation, and Videos](https://www.cypress.com/products/modustoolbox-software-environment)
* [CSDIDAC Middleware Code Example for MBED OS](https://github.com/cypresssemiconductorco/mbed-os-example-csdidac)
* [ModusToolbox Device Configurator Tool Guide](https://www.cypress.com/ModusToolboxDeviceConfig)
* [CapSense Middleware API Reference Guide](https://cypresssemiconductorco.github.io/capsense/capsense_api_reference_manual/html/index.html)
* [CSDADC Middleware API Reference Guide](https://cypresssemiconductorco.github.io/csdadc/csdadc_api_reference_manual/html/index.html)
* [PSoC 6 Technical Reference Manual](https://www.cypress.com/documentation/technical-reference-manuals/psoc-6-mcu-psoc-63-ble-architecture-technical-reference)
* [PSoC 63 with BLE Datasheet Programmable System-on-Chip datasheet](http://www.cypress.com/ds218787)
* [PSoC 4000S Family: PSoC 4 Architecture Technical Reference Manual (TRM)](https://www.cypress.com/documentation/technical-reference-manuals/psoc-4000s-family-psoc-4-architecture-technical-reference)
* [PSoC 4100S and PSoC 4100S Plus: PSoC 4 Architecture Technical Reference Manual (TRM)](https://www.cypress.com/documentation/technical-reference-manuals/psoc-4100s-and-psoc-4100s-plus-psoc-4-architecture)
* [Cypress Semiconductor](http://www.cypress.com)
---
© Cypress Semiconductor Corporation, 2019.
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/csdidac/RELEASE.md 0 → 100644
浏览文件 @ efda5106
# Cypress CSDIDAC Middleware Library 2.10
### What's Included?
Please refer to the [README.md](./README.md) and the [API Reference Guide](https://cypresssemiconductorco.github.io/csdidac/csdidac_api_reference_manual/html/index.html) for a complete description of the CSDIDAC Middleware.
The revision history of the CSDIDAC Middleware is also available on the [API Reference Guide Changelog](https://cypresssemiconductorco.github.io/csdidac/csdidac_api_reference_manual/html/index.html#group_csdidac_changelog).
New in this release:
* Added the support for the PSoC 4100S Plus devices
### Supported Software and Tools
This version of the CSDIDAC Middleware was validated for compatibility with the following Software and Tools:
| Software and Tools | Version |
| :--- | :----: |
| ModusToolbox Software Environment | 2.1 |
| - ModusToolbox Device Configurator | 2.1 |
| - ModusToolbox CSD Personality for PSoC4 devices in Device Configurator | 1.0 |
| - ModusToolbox CSD Personality for PSoC6 devices in Device Configurator | 2.0 |
| PSoC4 Peripheral Driver Library (PDL) | 1.0.0 |
| PSoC6 Peripheral Driver Library (PDL) | 1.5.0 |
| GCC Compiler | 7.2.1 |
| IAR Compiler | 8.32 |
| ARM Compiler 6 | 6.11 |
| MBED OS | 5.15.1 |
| FreeRTOS | 10.0.1 |
### More information
The following resources contain more information:
* [CSDIDAC Middleware RELEASE.md](./RELEASE.md)
* [CSDIDAC Middleware API Reference Guide](https://cypresssemiconductorco.github.io/csdidac/csdidac_api_reference_manual/html/index.html)
* [ModusToolbox Software Environment, Quick Start Guide, Documentation, and Videos](https://www.cypress.com/products/modustoolbox-software-environment)
* [CSDIDAC Middleware Code Example for MBED OS](https://github.com/cypresssemiconductorco/mbed-os-example-csdidac)
* [ModusToolbox Device Configurator Tool Guide](https://www.cypress.com/ModusToolboxDeviceConfig)
* [CapSense Middleware API Reference Guide](https://cypresssemiconductorco.github.io/capsense/capsense_api_reference_manual/html/index.html)
* [CSDADC Middleware API Reference Guide](https://cypresssemiconductorco.github.io/csdadc/csdadc_api_reference_manual/html/index.html)
* [PSoC 6 Technical Reference Manual](https://www.cypress.com/documentation/technical-reference-manuals/psoc-6-mcu-psoc-63-ble-architecture-technical-reference)
* [PSoC 63 with BLE Datasheet Programmable System-on-Chip datasheet](http://www.cypress.com/ds218787)
* [PSoC 4000S Family: PSoC 4 Architecture Technical Reference Manual (TRM)](https://www.cypress.com/documentation/technical-reference-manuals/psoc-4000s-family-psoc-4-architecture-technical-reference)
* [PSoC 4100S and PSoC 4100S Plus: PSoC 4 Architecture Technical Reference Manual (TRM)](https://www.cypress.com/documentation/technical-reference-manuals/psoc-4100s-and-psoc-4100s-plus-psoc-4-architecture)
* [Cypress Semiconductor](http://www.cypress.com)
---
© Cypress Semiconductor Corporation, 2019-2020.
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(iv) use the Software or any sample code other than for the Purpose.
You hereby covenant that you will not assert any claim that the Software, or
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"Proprietary Rights; Ownership," "Compliance With Law," "Disclaimer,"
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Without limiting the foregoing, the Software may be subject to export control
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have the responsibility to obtain licenses to export, re-export, or import the
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MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THE
SOFTWARE, INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED
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reserves the right to make changes to the Software without notice. Cypress
does not assume any liability arising out of the application or use of
Software or any product or circuit described in the Software. It is the
responsibility of the user of the Software to properly design, program, and
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for use in any products where a malfunction or failure of the Software or
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agree to indemnify Cypress and its suppliers against all liability. No
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11. Personal Information. You agree that information you provide through your
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and used by Cypress consistent with its Data Privacy Policy
(www.cypress.com/privacy-policy), as updated or revised from time to time, and
may be provided to its third party sales representatives, distributors and
other entities conducting sales activities for Cypress for sales-related and
other business purposes.
12. General. This Agreement will bind and inure to the benefit of each
party's successors and assigns, provided that you may not assign or transfer
this Agreement, in whole or in part, without Cypress' written consent. This
Agreement shall be governed by and construed in accordance with the laws of
the State of California, United States of America, as if performed wholly
within the state and without giving effect to the principles of conflict of
law. The parties consent to personal and exclusive jurisdiction of and venue
in, the state and federal courts within Santa Clara County, California;
provided however, that nothing in this Agreement will limit Cypress' right to
bring legal action in any venue in order to protect or enforce its
intellectual property rights. No failure of either party to exercise or
enforce any of its rights under this Agreement will act as a waiver of such
rights. If any portion of this Agreement is found to be void or
unenforceable, the remaining provisions of this Agreement shall remain in full
force and effect. This Agreement is the complete and exclusive agreement
between the parties with respect to the subject matter hereof, superseding and
replacing any and all prior agreements, communications, and understandings
(both written and oral) regarding such subject matter. Any notice to Cypress
will be deemed effective when actually received and must be sent to Cypress
Semiconductor Corporation, ATTN: Chief Legal Officer, 198 Champion Court, San
Jose, CA 95134 USA.
\ No newline at end of file
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/usbdev/README.md 0 → 100644
浏览文件 @ efda5106
# USB Device Middleware Library
## Overview
The USB Device middleware provides a full-speed
[USB 2.0 Chapter 9 specification](https://usb.org/document-library/usb-20-specification)
compliant device framework. It uses the USBFS driver from
CAT1A/CAT2 Peripheral Driver Library to interface with the hardware.
The middleware provides support for Audio, CDC, HID and Vendor classes.
It also enables implementing support for other classes. The USB Configurator
tool makes it easy to construct a USB Device descriptor.
## Features
* USB Full-Speed Device Framework
* USB Device Configurator
* The following USB Classes are supported:
* Audio Class
* CDC: Communication Device Class
* HID: Human Interface Device
* Adding Custom Class Support
* Vendor-Specific Requests Support
* Power Status Reporting for Self-Powered Devices
* Blocking API Timeout Function Redefinition
* Compliance with [MISRA-C:2012 coding standard](https://www.misra.org.uk/)
## USB Device Specific Instructions
The user must ensure that the parameters selected in the USB Device personality
are aligned with the descriptor configuration in the USB Configurator, because
there is no connection between the USB Device personality in the Device
Configurator and USB Configurator.
Specifically, parameter "Endpoints Mask" in the USB personality must be aligned
with the endpoints selected in the USB Configurator. If DMA Automatic mode is
selected, parameter "Endpoint Buffer Size" must be aligned with the total size
of the endpoint buffers allocated in the USB Configurator.
## Quick Start
Configure the USB Device using the ModusToolbox™ USB Device personality and
USB Device Configurator. Refer to the
[API Reference Quick Start Guide](https://infineon.github.io/usbdev/usbfs_dev_api_reference_manual/html/index.html)
## More information
The following links provide more information:
* [USB Device Middleware Library Release Notes](./RELEASE.md)
* [USB Device Middleware Library API Reference](https://infineon.github.io/usbdev/usbfs_dev_api_reference_manual/html/index.html)
* [CAT1 Peripheral Driver Library API Reference](https://infineon.github.io/mtb-pdl-cat1/pdl_api_reference_manual/html/index.html)
* [CAT2 Peripheral Driver Library API Reference](https://infineon.github.io/mtb-pdl-cat2/pdl_api_reference_manual/html/index.html)
* [ModusToolbox™ Software Environment, Quick Start Guide, Documentation, and Videos](https://www.cypress.com/products/modustoolbox-software-environment)
* [PSoC™ 6 SDK Examples](https://github.com/Infineon?q=mtb-example-psoc6%20NOT%20Deprecated)
* [ModusToolbox™ USB Configurator Tool Guide](https://www.cypress.com/ModusToolboxUSBConfig)
* [ModusToolbox™ Device Configurator Tool Guide](https://www.cypress.com/ModusToolboxDeviceConfig)
* [PSoC™ 6 WiFi-BT Pioneer Kit](http://www.cypress.com/CY8CKIT-062-WiFi-BT)
* [PSoC™ 6 Wi-Fi BT Prototyping Kit](http://www.cypress.com/cy8cproto-062-4343w)
* [PSoC™ 6 MCU Datasheets](http://www.cypress.com/psoc6ds)
* [PSoC™ 6 MCU Application Notes](http://www.cypress.com/psoc6an)
* [PSoC™ 6 MCU Technical Reference Manuals](http://www.cypress.com/psoc6trm)
* [PMG1-S2 Prototyping Kit](http://www.cypress.com/CY7112)
* [PMG1-S3 Prototyping Kit](http://www.cypress.com/CY7113)
* [PMG1 Datasheets](https://www.cypress.com/PMG1DS)
* [CYPRESS™ Semiconductor](http://www.cypress.com)
---
© 2019-2021, CYPRESS™ Semiconductor Corporation (an Infineon company)
or an affiliate of CYPRESS™ Semiconductor Corporation.
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/usbdev/RELEASE.md 0 → 100644
浏览文件 @ efda5106
# USB Device Middleware Library 2.10
## What's Included?
For a complete description of the USB Device Middleware, refer to
[README.md](./README.md) and the
[USB Device API Reference](https://infineon.github.io/usbdev/usbfs_dev_api_reference_manual/html/index.html).
The revision history of the USB Device Middleware is also available in the
[API Reference Changelog](https://infineon.github.io/usbdev/usbfs_dev_api_reference_manual/html/index.html#group_usb_dev_changelog).
New in this release:
* Updated the middleware to support configurations without any data endpoints.
* Added support for the PMG1 Family of MCUs.
* Updated the middleware to comply with MISRA-C:2012 standard.
## Defect Fixes
* Fixed an issue in vendor class request handling.
## USB Device Specific Instructions
The user must ensure that the parameters selected in the USB Device personality
are aligned with the descriptor configuration in the USB Configurator, because
there is no connection between the USB Device personality in the Device
Configurator and USB Configurator.
Specifically, parameter "Endpoints Mask" in the USB personality must be aligned
with the endpoints selected in the USB Configurator. If DMA Automatic mode is
selected, parameter "Endpoint Buffer Size" must be aligned with the total size
of the endpoint buffers allocated in the USB Configurator.
## Known Issues
| Problem | Workaround |
| ------- | ---------- |
| The USB Device ignores LPM requests after wake up from Deep Sleep. | Call USBFS driver Cy_USBFS_Dev_Drv_Lpm_SetResponse() after calling Cy_USBFS_Dev_Drv_Resume() to restore response to the LPM packets. |
| The USB Device modes with DMA do not work after wake up from Deep Sleep, due to incorrect restore of the ARB_CFG register. | Save ARB_CFG values before entering Deep Sleep and restore it after calling of Cy_USBFS_Dev_Drv_Resume. |
## Supported Software and Tools
This version of the USB Device Middleware was validated for compatibility with the following Software and Tools:
| Software and Tools | Version |
| :--- | :----: |
| ModusToolbox™ Software Environment | 2.3 |
| - ModusToolbox™ Device Configurator | 3.0 |
| - ModusToolbox™ USB Device Personality in Device Configurator | 1.1 |
| - ModusToolbox™ USB Device Configurator | 2.30 |
| MTB CAT1A Peripheral Driver Library (PDL) | 2.2.1 |
| MTB CAT2 Peripheral Driver Library (PDL) | 1.2.0 |
| GCC Compiler | 9.3.1 |
| IAR Compiler | 8.42.2 |
| ARM Compiler 6 | 6.16 |
## More information
For a more information, refer to [README.md](./README.md)
---
© 2019-2021, CYPRESS™ Semiconductor Corporation (an Infineon company)
or an affiliate of CYPRESS™ Semiconductor Corporation.
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/usbdev/cy_usb_dev_audio.c 0 → 100644
浏览文件 @ efda5106
/***************************************************************************//**
* \file cy_usb_dev_audio.c
* \version 2.10
*
* Provides Audio class-specific API implementation.
*
********************************************************************************
* \copyright
* (c) 2018-2021, Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/
#include "cy_usb_dev_audio.h"
#if (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS))
/*******************************************************************************
* Function Name: Cy_USB_Dev_Audio_Init
****************************************************************************//**
*
* Initializes the Audio class.
* This function must be called to enable USB Device Audio functionality.
*
* \param config
* Pass NULL as an argument (left for future purposes).
*
* \param context
* The pointer to the context structure \ref cy_stc_usb_dev_audio_context_t
* allocated by the user. The structure is used during the Audio Class operation
* for internal configuration and data retention. The user must not modify
* anything in this structure.
*
* \param devContext
* The pointer to the USB Device context structure \ref cy_stc_usb_dev_context_t.
*
* \return
* Status code of the function execution \ref cy_en_usb_dev_status_t.
*
*******************************************************************************/
cy_en_usb_dev_status_t Cy_USB_Dev_Audio_Init(void const *config,
cy_stc_usb_dev_audio_context_t *context,
cy_stc_usb_dev_context_t *devContext)
{
/* Suppress a compiler warning about unused variables */
(void) config;
if ((NULL == context) || (NULL == devContext))
{
return CY_USB_DEV_BAD_PARAM;
}
/* Store device context */
context->devContext = devContext;
return Cy_USB_Dev_RegisterClass(&context->classItem, &context->classObj, context, devContext);
}
#endif /* (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS)) */
/* [] END OF FILE */
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/usbdev/cy_usb_dev_audio.h 0 → 100644
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/***************************************************************************//**
* \file cy_usb_dev_audio.h
* \version 2.10
*
* Provides Audio class-specific API declarations.
*
********************************************************************************
* \copyright
* (c) 2018-2021, Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/
/**
* \addtogroup group_usb_dev_audio
* This section provides API description for the Audio class.
* \{
* \defgroup group_usb_dev_audio_macros Macros
* \defgroup group_usb_dev_audio_functions Functions
* \defgroup group_usb_dev_audio_data_structures Data Structures
* \}
*/
#if !defined(CY_USB_DEV_AUDIO_H)
#define CY_USB_DEV_AUDIO_H
#include "cy_usb_dev.h"
#if (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS))
#if defined(__cplusplus)
extern "C" {
#endif
/*******************************************************************************
* Enumerated Types
*******************************************************************************/
/*******************************************************************************
* Type Definitions
*******************************************************************************/
/**
* \addtogroup group_usb_dev_audio_data_structures
* \{
*/
/** Audio class context structure.
* All fields for the Audio context structure are internal. Firmware never reads or
* writes these values. Firmware allocates the structure and provides the
* address of the structure to the middleware in Audio function calls. Firmware
* must ensure that the defined instance of this structure remains in scope while
* the middleware is in use.
*/
typedef struct
{
/** \cond INTERNAL*/
/** Pointer to device context */
cy_stc_usb_dev_context_t *devContext;
/** Audio class functions pointers */
cy_stc_usb_dev_class_t classObj;
/** Audio class linked list item */
cy_stc_usb_dev_class_ll_item_t classItem;
/** \endcond */
} cy_stc_usb_dev_audio_context_t;
/** \} group_usb_dev_audio_data_structures */
/*******************************************************************************
* Function Prototypes
*******************************************************************************/
/**
* \addtogroup group_usb_dev_audio_functions
* \{
*/
cy_en_usb_dev_status_t Cy_USB_Dev_Audio_Init(void const *config,
cy_stc_usb_dev_audio_context_t *context,
cy_stc_usb_dev_context_t *devContext);
__STATIC_INLINE void Cy_USB_Dev_Audio_RegisterUserCallback(cy_cb_usb_dev_request_received_t requestReceivedHandle,
cy_cb_usb_dev_request_cmplt_t requestCompletedHandle,
cy_stc_usb_dev_audio_context_t *context);
__STATIC_INLINE cy_stc_usb_dev_class_t * Cy_USB_Dev_Audio_GetClass(cy_stc_usb_dev_audio_context_t *context);
/** \} group_usb_dev_audio_functions */
/*******************************************************************************
* API Constants
*******************************************************************************/
/**
* \addtogroup group_usb_dev_audio_macros
* \{
*/
#define CY_USB_DEV_AUDIO_RQST_GET_CUR (0x81u) /**< GET_CUR Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_GET_MIN (0x82u) /**< GET_MIN Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_GET_MAX (0x83u) /**< GET_MAX Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_GET_RES (0x84u) /**< GET_RES Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_GET_MEM (0x85u) /**< GET_MEM Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_GET_STAT (0xFFu) /**< GET_STAT Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_SET_CUR (0x01u) /**< SET_CUR Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_SET_MIN (0x02u) /**< SET_MIN Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_SET_MAX (0x03u) /**< SET_MAX Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_SET_RES (0x04u) /**< SET_RES Audio v1.0 request */
#define CY_USB_DEV_AUDIO_RQST_SET_MEM (0x05u) /**< SET_STAT Audio v1.0 request */
#define CY_USB_DEV_AUDIO2_RQST_CUR (0x01u) /**< CUR Audio v2.0 request */
#define CY_USB_DEV_AUDIO2_RQST_RANGE (0x02u) /**< RANGE Audio v2.0 request */
#define CY_USB_DEV_AUDIO2_RQST_MEM (0x03u) /**< MEM Audio v2.0 request */
#define CY_USB_DEV_AUDIO_MASTER_CHANNEL (0U) /**< Master channel */
#define CY_USB_DEV_AUDIO_VOLUME_MIN (0x8001U) /**< Volume minimum value */
#define CY_USB_DEV_AUDIO_VOLUME_MAX (0x7FFFU) /**< Volume maximum value */
#define CY_USB_DEV_AUDIO_VOLUME_SILENCE (0x8000U) /**< Volume value that represent silence (CUR attribute only) */
#define CY_USB_DEV_AUDIO_VOLUME_MIN_MSB (0x80U) /**< Volume minimum value MSB */
#define CY_USB_DEV_AUDIO_VOLUME_MIN_LSB (0x01U) /**< Volume minimum value LSB */
#define CY_USB_DEV_AUDIO_VOLUME_MAX_MSB (0x7FU) /**< Volume maximum value MSB */
#define CY_USB_DEV_AUDIO_VOLUME_MAX_LSB (0xFFU) /**< Volume maximum value LSB */
/** \} group_usb_dev_audio_macros */
/*******************************************************************************
* Internal Constants
*******************************************************************************/
/*******************************************************************************
* In-line Function Implementation
*******************************************************************************/
/**
* \addtogroup group_usb_dev_audio_functions
* \{
*/
/*******************************************************************************
* Function Name: Cy_USB_Dev_Audio_RegisterUserCallback
****************************************************************************//**
*
* Registers the user callbacks to handle Audio class requests.
*
* \param requestReceivedHandle
* The pointer to a callback function.
* This function is called when setup packet was received from the USB Host but was
* not recognized. Therefore this might require Audio class processing.
* To remove the callback function, pass a NULL as the function pointer.
*
* \param requestCompletedHandle
* The pointer to a callback function.
* This function is called when the USB Device received data from the USB Host
* as part of current request processing. The requestReceivedHandle function
* must enable notification to trigger this event. This makes sense only when class
* request processing requires a data stage.
* To remove the callback function, pass a NULL as the function pointer.
*
* \param context
* The pointer to the context structure \ref cy_stc_usb_dev_context_t allocated
* by the user. The structure is used during the Audio Class operation for
* internal configuration and data retention. The user must not modify anything
* in this structure.
*
*******************************************************************************/
__STATIC_INLINE void Cy_USB_Dev_Audio_RegisterUserCallback(cy_cb_usb_dev_request_received_t requestReceivedHandle,
cy_cb_usb_dev_request_cmplt_t requestCompletedHandle,
cy_stc_usb_dev_audio_context_t *context)
{
Cy_USB_Dev_RegisterClassRequestRcvdCallback(requestReceivedHandle, Cy_USB_Dev_Audio_GetClass(context));
Cy_USB_Dev_RegisterClassRequestCmpltCallback(requestCompletedHandle, Cy_USB_Dev_Audio_GetClass(context));
}
/*******************************************************************************
* Function Name: Cy_USB_Dev_Audio_GetClass
****************************************************************************//**
*
* Returns pointer to the class structure for Audio class.
*
* \param context
* The pointer to the context structure \ref cy_stc_usb_dev_context_t allocated
* by the user. The structure is used during the Audio Class operation for
* internal configuration and data retention. The user must not modify anything
* in this structure.
*
* \return
* Status pointer to the class \ref cy_stc_usb_dev_class_t.
*
*******************************************************************************/
__STATIC_INLINE cy_stc_usb_dev_class_t * Cy_USB_Dev_Audio_GetClass(cy_stc_usb_dev_audio_context_t *context)
{
return &(context->classObj);
}
/** \} group_usb_dev_audio_functions */
#if defined(__cplusplus)
}
#endif
#endif /* (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS)) */
#endif /* (CY_USB_DEV_AUDIO_H) */
/* [] END OF FILE */
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/usbdev/cy_usb_dev_cdc_descr.h 0 → 100644
浏览文件 @ efda5106
/***************************************************************************//**
* \file cy_usb_dev_cdc_descr.h
* \version 2.10
*
* Provides CDC class-specific descriptor defines.
*
********************************************************************************
* \copyright
* (c) 2018-2021, Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/
#if !defined(CY_USB_DEV_CDC_DESCR_H)
#define CY_USB_DEV_CDC_DESCR_H
#if (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS))
#if defined(__cplusplus)
extern "C" {
#endif
/*******************************************************************************
* API Constants
*******************************************************************************/
/** \cond INTERNAL */
/* CDC class */
#define CY_USB_DEV_CDC_CLASS (0x02U)
#define CY_USB_DEV_CDC_CLASS_DATA (0x0AU)
/** \endcond */
#if defined(__cplusplus)
}
#endif
#endif /* (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS)) */
#endif /* (CY_USB_DEV_CDC_DESCR_H) */
/* [] END OF FILE */
bsp/cypress/libraries/IFX_PSOC6_HAL/mtb_shared/usbdev/cy_usb_dev_hid_descr.h 0 → 100644
浏览文件 @ efda5106
/***************************************************************************//**
* \file cy_usb_dev_hid_descr.h
* \version 2.10
*
* Provides HID class-specific descriptor defines.
*
********************************************************************************
* \copyright
* (c) 2018-2021, Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/
#if !defined(CY_USB_DEV_HID_DESCR_H)
#define CY_USB_DEV_HID_DESCR_H
#if (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS))
#if defined(__cplusplus)
extern "C" {
#endif
/*******************************************************************************
* API Constants
*******************************************************************************/
/** \cond INTERNAL */
/* Supported HID version */
#define CY_USB_DEV_HID_VERSION_1_11 (0x0111U)
/* HID Class */
#define CY_USB_DEV_HID_CLASS (3U)
#define CY_USB_DEV_HID_SUBCLASS_NONE (0U)
#define CY_USB_DEV_HID_PROTOCOL_NONE (0U)
/* Descriptors */
#define CY_USB_DEV_HID_DESCRIPTOR (33U)
#define CY_USB_DEV_HID_DESCRIPTOR_LENGTH (9U)
#define CY_USB_DEV_HID_REPORT_DESCRIPTOR (34U)
/** \endcond */
#if defined(__cplusplus)
}
#endif
#endif /* (defined(CY_IP_MXUSBFS) || defined(CY_IP_M0S8USBDSS)) */
#endif /* (CY_USB_DEV_HID_DESCR_H) */
/* [] END OF FILE */
bsp/cypress/psoc6-cy8cproto-4343w/.config
浏览文件 @ efda5106
...@@ -111,17 +111,7 @@ CONFIG_FINSH_USING_DESCRIPTION=y ...@@ -111,17 +111,7 @@ CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
# CONFIG_FINSH_USING_AUTH is not set # CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_ARG_MAX=10 CONFIG_FINSH_ARG_MAX=10
CONFIG_RT_USING_DFS=y # CONFIG_RT_USING_DFS is not set
CONFIG_DFS_USING_POSIX=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=4
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
CONFIG_DFS_FD_MAX=16
# CONFIG_RT_USING_DFS_MNTTABLE is not set
# CONFIG_RT_USING_DFS_ELMFAT is not set
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_FAL is not set # CONFIG_RT_USING_FAL is not set
# CONFIG_RT_USING_LWP is not set # CONFIG_RT_USING_LWP is not set
...@@ -143,13 +133,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64 ...@@ -143,13 +133,11 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
CONFIG_RT_USING_PIN=y CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_ADC is not set # CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set # CONFIG_RT_USING_DAC is not set
CONFIG_RT_USING_PWM=y # CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_PM is not set
CONFIG_RT_USING_RTC=y # CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_ALARM is not set
# CONFIG_RT_USING_SOFT_RTC is not set
# CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_WDT is not set
...@@ -176,20 +164,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8 ...@@ -176,20 +164,11 @@ CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
# #
# POSIX (Portable Operating System Interface) layer # POSIX (Portable Operating System Interface) layer
# #
CONFIG_RT_USING_POSIX_FS=y # CONFIG_RT_USING_POSIX_FS is not set
CONFIG_RT_USING_POSIX_DEVIO=y # CONFIG_RT_USING_POSIX_DELAY is not set
CONFIG_RT_USING_POSIX_STDIO=y # CONFIG_RT_USING_POSIX_CLOCK is not set
# CONFIG_RT_USING_POSIX_POLL is not set
# CONFIG_RT_USING_POSIX_SELECT is not set
# CONFIG_RT_USING_POSIX_SOCKET is not set
# CONFIG_RT_USING_POSIX_TERMIOS is not set
# CONFIG_RT_USING_POSIX_AIO is not set
# CONFIG_RT_USING_POSIX_MMAN is not set
CONFIG_RT_USING_POSIX_DELAY=y
CONFIG_RT_USING_POSIX_CLOCK=y
# CONFIG_RT_USING_POSIX_TIMER is not set # CONFIG_RT_USING_POSIX_TIMER is not set
CONFIG_RT_USING_PTHREADS=y # CONFIG_RT_USING_PTHREADS is not set
CONFIG_PTHREAD_NUM_MAX=8
# CONFIG_RT_USING_MODULE is not set # CONFIG_RT_USING_MODULE is not set
# #
...@@ -524,7 +503,6 @@ CONFIG_PTHREAD_NUM_MAX=8 ...@@ -524,7 +503,6 @@ CONFIG_PTHREAD_NUM_MAX=8
# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set # CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_ADT74XX is not set
# CONFIG_PKG_USING_AS7341 is not set # CONFIG_PKG_USING_AS7341 is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_ICM20608 is not set
...@@ -697,20 +675,22 @@ CONFIG_BSP_USING_UART=y ...@@ -697,20 +675,22 @@ CONFIG_BSP_USING_UART=y
# CONFIG_BSP_USING_UART3 is not set # CONFIG_BSP_USING_UART3 is not set
# CONFIG_BSP_USING_UART4 is not set # CONFIG_BSP_USING_UART4 is not set
CONFIG_BSP_USING_UART5=y CONFIG_BSP_USING_UART5=y
CONFIG_BSP_USING_PWM=y # CONFIG_BSP_USING_PWM is not set
CONFIG_BSP_USING_PWM0=y # CONFIG_BSP_USING_SPI is not set
CONFIG_BSP_USING_PWM0_CH7=y
# CONFIG_BSP_USING_PWM0_PORT2 is not set
# CONFIG_BSP_USING_PWM0_PORT5 is not set
# CONFIG_BSP_USING_PWM0_PORT7 is not set
CONFIG_BSP_USING_PWM0_PORT9=y
# CONFIG_BSP_USING_PWM0_PORT10 is not set
# CONFIG_BSP_USING_PWM0_PORT12 is not set
# CONFIG_BSP_USING_ADC is not set # CONFIG_BSP_USING_ADC is not set
# CONFIG_BSP_USING_SDMMC is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set # CONFIG_BSP_USING_QSPI_FLASH is not set
# CONFIG_BSP_USING_HW_I2C is not set # CONFIG_BSP_USING_HW_I2C is not set
# CONFIG_BSP_USING_I2C is not set # CONFIG_BSP_USING_I2C is not set
# CONFIG_BSP_USING_USBD is not set
# CONFIG_BSP_USING_RTC is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_DAC is not set
# CONFIG_BSP_USING_TIM is not set
# #
# Board extended module Drivers # Board extended module Drivers
# #
# CONFIG_BSP_USING_SLIDER is not set
# CONFIG_BSP_USING_RW007 is not set
bsp/cypress/psoc6-cy8cproto-4343w/.cproject 0 → 100644
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<?xml version="1.0" encoding="utf-8"?>
<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
<component name="EventRecorderStub" version="1.0.0"/> <!--name and version of the component-->
<events>
</events>
</component_viewer>
bsp/cypress/psoc6-cy8cproto-4343w/board/SConscript
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...@@ -30,11 +30,15 @@ startup_path_prefix = SDK_LIB ...@@ -30,11 +30,15 @@ startup_path_prefix = SDK_LIB
if rtconfig.PLATFORM == 'gcc': if rtconfig.PLATFORM == 'gcc':
src += [startup_path_prefix + src += [startup_path_prefix +
'/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S'] '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/startup_psoc6_02_cm4.S']
src += [startup_path_prefix +
'/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_GCC_ARM/cy_syslib_gcc.S']
elif rtconfig.PLATFORM in ['armcc', 'armclang']: elif rtconfig.PLATFORM in ['armcc', 'armclang']:
src += [startup_path_prefix + src += [startup_path_prefix +
'/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S'] '/IFX_PSOC6_HAL/TARGET_CY8CKIT-062S2-43012/COMPONENT_CM4/TOOLCHAIN_ARM/startup_psoc6_02_cm4.S']
src += [startup_path_prefix +
'/IFX_PSOC6_HAL/mtb-pdl-cat1/drivers/source/TOOLCHAIN_ARM/cy_syslib_mdk.S']
CPPDEFINES = ['IFX_PSOC6_43012', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS'] CPPDEFINES = ['CY8C624ABZI_S2D44', 'IFX_PSOC6_43012', 'CY_USING_HAL', 'COMPONENT_CAT1A', 'COMPONENT_CAT1', 'COMPONENT_BSP_DESIGN_MODUS']
group = DefineGroup('Drivers', src, depend=[''], CPPPATH=path, CPPDEFINES=CPPDEFINES) group = DefineGroup('Drivers', src, depend=[''], CPPPATH=path, CPPDEFINES=CPPDEFINES)
Return('group') Return('group')
\ No newline at end of file
bsp/cypress/psoc6-cy8cproto-4343w/board/board.c
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...@@ -9,7 +9,6 @@ ...@@ -9,7 +9,6 @@
*/ */
#include "board.h" #include "board.h"
#include "drv_uart.h"
void cy_bsp_all_init(void) void cy_bsp_all_init(void)
{ {
......
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components/fal/src/fal_rtt.c
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