未验证 提交 b25a2794 编写于 作者: B Bernard Xiong 提交者: GitHub

Merge pull request #2477 from lymzzyh/interrupt

K210 修改
......@@ -51,9 +51,8 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
# CONFIG_RT_USING_SMALL_MEM is not set
CONFIG_RT_USING_SLAB=y
CONFIG_RT_USING_HEAP=y
#
......@@ -108,9 +107,9 @@ CONFIG_FINSH_ARG_MAX=10
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=4
CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
CONFIG_DFS_FD_MAX=16
CONFIG_DFS_FILESYSTEMS_MAX=16
CONFIG_DFS_FILESYSTEM_TYPES_MAX=16
CONFIG_DFS_FD_MAX=64
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
......@@ -126,7 +125,7 @@ CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
......@@ -159,7 +158,11 @@ CONFIG_RT_USING_PIN=y
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_QSPI is not set
CONFIG_RT_USING_SPI_MSD=y
# CONFIG_RT_USING_SFUD is not set
CONFIG_RT_USING_SFUD=y
CONFIG_RT_SFUD_USING_SFDP=y
CONFIG_RT_SFUD_USING_FLASH_INFO_TABLE=y
# CONFIG_RT_SFUD_USING_QSPI is not set
CONFIG_RT_DEBUG_SFUD=y
# CONFIG_RT_USING_W25QXX is not set
# CONFIG_RT_USING_GD is not set
# CONFIG_RT_USING_ENC28J60 is not set
......
......@@ -8,6 +8,7 @@ board.c
heap.c
drv_uart.c
drv_io_config.c
drv_interrupt.c
''')
CPPPATH = [cwd]
......
......@@ -84,6 +84,8 @@ extern int rt_hw_clint_ipi_enable(void);
void rt_hw_board_init(void)
{
sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL);
/* Init FPIOA */
fpioa_init();
/* Dmac init */
......
......@@ -139,7 +139,7 @@ static void pin_irq(int vector, void *param)
set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 1);
}
if(irq_table[pin_channel 2019-03-18 ZYH first version].edge & GPIO_PE_RISING)
if(irq_table[pin_channel].edge & GPIO_PE_RISING)
{
set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 0);
set_gpio_bit(gpiohs->rise_ip.u32, pin_channel, 1);
......
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-19 ZYH first version
*/
#include <plic.h>
void plic_irq_handle(plic_irq_t irq)
{
plic_instance_t (*plic_instance)[IRQN_MAX] = plic_get_instance();
if (plic_instance[0][irq].callback)
{
plic_instance[0][irq].callback(
plic_instance[0][irq].ctx);
}
else if (plic_instance[1][irq].callback)
{
plic_instance[1][irq].callback(
plic_instance[1][irq].ctx);
}
}
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-19 ZYH first version
*/
#include <rtthread.h>
#include <fpioa.h>
#include <drv_io_config.h>
......@@ -25,7 +35,7 @@ static struct io_config
{BSP_CAMERA_CMOS_PWDN_PIN, FUNC_CMOS_PWDN},
{BSP_CAMERA_CMOS_XCLK_PIN, FUNC_CMOS_XCLK},
{BSP_CAMERA_CMOS_PCLK_PIN, FUNC_CMOS_PCLK},
{BSP_CAMERA_CMOS_PCLK_PIN, FUNC_CMOS_HREF},
{BSP_CAMERA_CMOS_HREF_PIN, FUNC_CMOS_HREF},
#endif
#ifdef BSP_USING_SPI1
......@@ -73,3 +83,4 @@ int io_config_init(void)
}
INIT_BOARD_EXPORT(io_config_init);
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-03-19 ZYH first version
*/
#ifndef __DRV_IO_CONFIG_H__
#define __DRV_IO_CONFIG_H__
......
......@@ -19,9 +19,12 @@
#include <sysctl.h>
#include <gpiohs.h>
#include <string.h>
#include "utils.h"
#define DRV_SPI_DEVICE(spi_bus) (struct drv_spi_bus *)(spi_bus)
#define MAX_CLOCK (40000000UL)
struct drv_spi_bus
{
struct rt_spi_bus parent;
......@@ -48,6 +51,7 @@ static rt_err_t drv_spi_configure(struct rt_spi_device *device,
struct rt_spi_configuration *configuration)
{
rt_err_t ret = RT_EOK;
int freq = 0;
struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus);
struct drv_cs * cs = (struct drv_cs *)device->parent.user_data;
RT_ASSERT(bus != RT_NULL);
......@@ -60,31 +64,43 @@ static rt_err_t drv_spi_configure(struct rt_spi_device *device,
#else
spi_init(bus->spi_instance, configuration->mode & RT_SPI_MODE_3, SPI_FF_STANDARD, configuration->data_width, 0);
#endif
spi_set_clk_rate(bus->spi_instance, configuration->max_hz);
freq = spi_set_clk_rate(bus->spi_instance, configuration->max_hz > MAX_CLOCK ? MAX_CLOCK : configuration->max_hz);
rt_kprintf("set spi freq %d\n", freq);
return ret;
}
extern void spi_receive_data_normal_dma(dmac_channel_number_t dma_send_channel_num,
dmac_channel_number_t dma_receive_channel_num,
spi_device_num_t spi_num, spi_chip_select_t chip_select, const void *cmd_buff,
size_t cmd_len, void *rx_buff, size_t rx_len);
void __spi_set_tmod(uint8_t spi_num, uint32_t tmod)
{
RT_ASSERT(spi_num < SPI_DEVICE_MAX);
volatile spi_t *spi_handle = spi[spi_num];
uint8_t tmod_offset = 0;
switch(spi_num)
{
case 0:
case 1:
case 2:
tmod_offset = 8;
break;
case 3:
default:
tmod_offset = 10;
break;
}
set_bit(&spi_handle->ctrlr0, 3 << tmod_offset, tmod << tmod_offset);
}
static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
{
struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus);
struct drv_cs * cs = (struct drv_cs *)device->parent.user_data;
struct rt_spi_configuration *cfg = &device->config;
const uint8_t * tx_buff = message->send_buf;
uint8_t * rx_buff = message->recv_buf;
uint32_t dummy[1024];
size_t send_size, recv_size;
uint32_t * tx_buff = RT_NULL;
uint32_t * rx_buff = RT_NULL;
int i;
rt_ubase_t dummy = 0xFFFFFFFFU;
send_size = message->length;
recv_size = message->length;
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS_RECV);
RT_ASSERT(bus != RT_NULL);
......@@ -94,18 +110,73 @@ static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_mess
}
if(message->length)
{
if(!tx_buff)
spi_instance[bus->spi_instance]->dmacr = 0x3;
spi_instance[bus->spi_instance]->ssienr = 0x01;
sysctl_dma_select(bus->dma_send_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + bus->spi_instance * 2);
sysctl_dma_select(bus->dma_recv_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + bus->spi_instance * 2);
if(!message->recv_buf)
{
tx_buff = (uint8_t *)&dummy;
send_size = 1;
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), &dummy, DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
}
else
{
rx_buff = rt_calloc(message->length * 4, 1);
if(!rx_buff)
{
goto transfer_done;
}
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
}
if(!rx_buff)
if(!message->send_buf)
{
dmac_set_single_mode(bus->dma_send_channel, &dummy, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_NOCHANGE, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
}
else
{
tx_buff = rt_malloc(message->length * 4);
if(!tx_buff)
{
goto transfer_done;
}
for(i = 0; i < message->length; i++)
{
tx_buff[i] = ((uint8_t *)message->send_buf)[i];
}
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
}
spi_instance[bus->spi_instance]->ser = 1U << cs->cs_index;
dmac_wait_done(bus->dma_send_channel);
dmac_wait_done(bus->dma_recv_channel);
spi_instance[bus->spi_instance]->ser = 0x00;
spi_instance[bus->spi_instance]->ssienr = 0x00;
if(message->recv_buf)
{
for(i = 0; i < message->length; i++)
{
((uint8_t *)message->recv_buf)[i] = (uint8_t)rx_buff[i];
}
}
transfer_done:
if(tx_buff)
{
rt_free(tx_buff);
}
if(rx_buff)
{
rx_buff = (uint8_t *)&dummy;
recv_size = 1;
rt_free(rx_buff);
}
spi_dup_send_receive_data_dma(bus->dma_send_channel, bus->dma_recv_channel, bus->spi_instance, cs->cs_index, tx_buff, send_size, rx_buff, recv_size);
}
if(message->cs_release)
......
......@@ -49,9 +49,8 @@
#define RT_USING_MEMPOOL
/* RT_USING_MEMHEAP is not set */
/* RT_USING_NOHEAP is not set */
#define RT_USING_SMALL_MEM
/* RT_USING_SLAB is not set */
/* RT_USING_MEMTRACE is not set */
/* RT_USING_SMALL_MEM is not set */
#define RT_USING_SLAB
#define RT_USING_HEAP
/* Kernel Device Object */
......@@ -101,9 +100,9 @@
#define RT_USING_DFS
#define DFS_USING_WORKDIR
#define DFS_FILESYSTEMS_MAX 4
#define DFS_FILESYSTEM_TYPES_MAX 4
#define DFS_FD_MAX 16
#define DFS_FILESYSTEMS_MAX 16
#define DFS_FILESYSTEM_TYPES_MAX 16
#define DFS_FD_MAX 64
/* RT_USING_DFS_MNTTABLE is not set */
#define RT_USING_DFS_ELMFAT
......@@ -118,7 +117,7 @@
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
/* RT_DFS_ELM_USE_ERASE is not set */
#define RT_DFS_ELM_REENTRANT
#define RT_USING_DFS_DEVFS
......@@ -150,7 +149,11 @@
#define RT_USING_SPI
/* RT_USING_QSPI is not set */
#define RT_USING_SPI_MSD
/* RT_USING_SFUD is not set */
#define RT_USING_SFUD
#define RT_SFUD_USING_SFDP
#define RT_SFUD_USING_FLASH_INFO_TABLE
/* RT_SFUD_USING_QSPI is not set */
#define RT_DEBUG_SFUD
/* RT_USING_W25QXX is not set */
/* RT_USING_GD is not set */
/* RT_USING_ENC28J60 is not set */
......
......@@ -230,10 +230,6 @@ uintptr_t handle_irq_m_ext(uintptr_t cause, uintptr_t epc)
/* Restore primitive IRQ threshold */
plic->targets.target[core_id].priority_threshold = int_threshold;
}
else
{
rt_kprintf("unhandled trap!\n");
}
return epc;
}
......@@ -270,8 +266,51 @@ uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
rt_hw_interrupt_disable();
tid = rt_thread_self();
rt_kprintf("\nException:\n");
switch (cause)
{
case CAUSE_MISALIGNED_FETCH:
rt_kprintf("Instruction address misaligned");
break;
case CAUSE_FAULT_FETCH:
rt_kprintf("Instruction access fault");
break;
case CAUSE_ILLEGAL_INSTRUCTION:
rt_kprintf("Illegal instruction");
break;
case CAUSE_BREAKPOINT:
rt_kprintf("Breakpoint");
break;
case CAUSE_MISALIGNED_LOAD:
rt_kprintf("Load address misaligned");
break;
case CAUSE_FAULT_LOAD:
rt_kprintf("Load access fault");
break;
case CAUSE_MISALIGNED_STORE:
rt_kprintf("Store address misaligned");
break;
case CAUSE_FAULT_STORE:
rt_kprintf("Store access fault");
break;
case CAUSE_USER_ECALL:
rt_kprintf("Environment call from U-mode");
break;
case CAUSE_SUPERVISOR_ECALL:
rt_kprintf("Environment call from S-mode");
break;
case CAUSE_HYPERVISOR_ECALL:
rt_kprintf("Environment call from H-mode");
break;
case CAUSE_MACHINE_ECALL:
rt_kprintf("Environment call from M-mode");
break;
default:
rt_kprintf("Uknown exception : %08lX", cause);
break;
}
rt_kprintf("\n");
rt_kprintf("unhandled trap, epc => 0x%08x, INT[%d]\n", epc, rt_interrupt_get_nest());
rt_kprintf("exception pc => 0x%08x\n", epc);
rt_kprintf("current thread: %.*s\n", RT_NAME_MAX, tid->name);
#ifdef RT_USING_FINSH
list_thread();
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册