Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
yunqingabc
rt-thread
提交
78fc9b44
R
rt-thread
项目概览
yunqingabc
/
rt-thread
与 Fork 源项目一致
Fork自
RT-Thread / rt-thread
通知
1
Star
0
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
DevOps
流水线
流水线任务
计划
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
R
rt-thread
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
DevOps
DevOps
流水线
流水线任务
计划
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
流水线任务
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
78fc9b44
编写于
12月 25, 2018
作者:
S
SummerGift
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
[bsp][stm32] add stm32f091-nucleo
上级
02bd7c0f
变更
40
展开全部
隐藏空白更改
内联
并排
Showing
40 changed file
with
18267 addition
and
0 deletion
+18267
-0
bsp/stm32/stm32f091-nucleo/.config
bsp/stm32/stm32f091-nucleo/.config
+372
-0
bsp/stm32/stm32f091-nucleo/.gitignore
bsp/stm32/stm32f091-nucleo/.gitignore
+42
-0
bsp/stm32/stm32f091-nucleo/Kconfig
bsp/stm32/stm32f091-nucleo/Kconfig
+22
-0
bsp/stm32/stm32f091-nucleo/README.md
bsp/stm32/stm32f091-nucleo/README.md
+116
-0
bsp/stm32/stm32f091-nucleo/SConscript
bsp/stm32/stm32f091-nucleo/SConscript
+14
-0
bsp/stm32/stm32f091-nucleo/SConstruct
bsp/stm32/stm32f091-nucleo/SConstruct
+58
-0
bsp/stm32/stm32f091-nucleo/applications/SConscript
bsp/stm32/stm32f091-nucleo/applications/SConscript
+11
-0
bsp/stm32/stm32f091-nucleo/applications/main.c
bsp/stm32/stm32f091-nucleo/applications/main.c
+25
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/.mxproject
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/.mxproject
+20
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/CubeMX_Config.ioc
...32/stm32f091-nucleo/board/CubeMX_Config/CubeMX_Config.ioc
+167
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/main.h
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/main.h
+93
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/stm32f0xx_hal_conf.h
...2f091-nucleo/board/CubeMX_Config/Inc/stm32f0xx_hal_conf.h
+323
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/stm32f0xx_it.h
...2/stm32f091-nucleo/board/CubeMX_Config/Inc/stm32f0xx_it.h
+80
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/main.c
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/main.c
+647
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/stm32f0xx_hal_msp.c
...32f091-nucleo/board/CubeMX_Config/Src/stm32f0xx_hal_msp.c
+565
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/stm32f0xx_it.c
...2/stm32f091-nucleo/board/CubeMX_Config/Src/stm32f0xx_it.c
+159
-0
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/system_stm32f1xx.c
...m32f091-nucleo/board/CubeMX_Config/Src/system_stm32f1xx.c
+448
-0
bsp/stm32/stm32f091-nucleo/board/Kconfig
bsp/stm32/stm32f091-nucleo/board/Kconfig
+120
-0
bsp/stm32/stm32f091-nucleo/board/SConscript
bsp/stm32/stm32f091-nucleo/board/SConscript
+30
-0
bsp/stm32/stm32f091-nucleo/board/board.c
bsp/stm32/stm32f091-nucleo/board/board.c
+62
-0
bsp/stm32/stm32f091-nucleo/board/board.h
bsp/stm32/stm32f091-nucleo/board/board.h
+41
-0
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.icf
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.icf
+28
-0
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.lds
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.lds
+143
-0
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.sct
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.sct
+15
-0
bsp/stm32/stm32f091-nucleo/board/ports/fal_cfg.h
bsp/stm32/stm32f091-nucleo/board/ports/fal_cfg.h
+34
-0
bsp/stm32/stm32f091-nucleo/figures/board.jpg
bsp/stm32/stm32f091-nucleo/figures/board.jpg
+0
-0
bsp/stm32/stm32f091-nucleo/project.ewd
bsp/stm32/stm32f091-nucleo/project.ewd
+2834
-0
bsp/stm32/stm32f091-nucleo/project.ewp
bsp/stm32/stm32f091-nucleo/project.ewp
+2270
-0
bsp/stm32/stm32f091-nucleo/project.eww
bsp/stm32/stm32f091-nucleo/project.eww
+10
-0
bsp/stm32/stm32f091-nucleo/project.uvopt
bsp/stm32/stm32f091-nucleo/project.uvopt
+162
-0
bsp/stm32/stm32f091-nucleo/project.uvoptx
bsp/stm32/stm32f091-nucleo/project.uvoptx
+984
-0
bsp/stm32/stm32f091-nucleo/project.uvprojx
bsp/stm32/stm32f091-nucleo/project.uvprojx
+737
-0
bsp/stm32/stm32f091-nucleo/rtconfig.h
bsp/stm32/stm32f091-nucleo/rtconfig.h
+182
-0
bsp/stm32/stm32f091-nucleo/rtconfig.py
bsp/stm32/stm32f091-nucleo/rtconfig.py
+134
-0
bsp/stm32/stm32f091-nucleo/template.ewd
bsp/stm32/stm32f091-nucleo/template.ewd
+2834
-0
bsp/stm32/stm32f091-nucleo/template.ewp
bsp/stm32/stm32f091-nucleo/template.ewp
+2032
-0
bsp/stm32/stm32f091-nucleo/template.eww
bsp/stm32/stm32f091-nucleo/template.eww
+10
-0
bsp/stm32/stm32f091-nucleo/template.uvgui.zylx
bsp/stm32/stm32f091-nucleo/template.uvgui.zylx
+1856
-0
bsp/stm32/stm32f091-nucleo/template.uvoptx
bsp/stm32/stm32f091-nucleo/template.uvoptx
+192
-0
bsp/stm32/stm32f091-nucleo/template.uvprojx
bsp/stm32/stm32f091-nucleo/template.uvprojx
+395
-0
未找到文件。
bsp/stm32/stm32f091-nucleo/.config
0 → 100644
浏览文件 @
78fc9b44
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX
=
8
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE
=
4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32
=
y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX
=
32
CONFIG_RT_TICK_PER_SECOND
=
1000
CONFIG_RT_USING_OVERFLOW_CHECK
=
y
CONFIG_RT_USING_HOOK
=
y
CONFIG_RT_USING_IDLE_HOOK
=
y
CONFIG_RT_IDEL_HOOK_LIST_SIZE
=
4
CONFIG_IDLE_THREAD_STACK_SIZE
=
256
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG
=
y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE
=
y
CONFIG_RT_USING_MUTEX
=
y
CONFIG_RT_USING_EVENT
=
y
CONFIG_RT_USING_MAILBOX
=
y
CONFIG_RT_USING_MESSAGEQUEUE
=
y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL
=
y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM
=
y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP
=
y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE
=
y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE
=
y
CONFIG_RT_CONSOLEBUF_SIZE
=
128
CONFIG_RT_CONSOLE_DEVICE_NAME
=
"uart2"
CONFIG_RT_VER_NUM
=
0
x40000
CONFIG_ARCH_ARM
=
y
CONFIG_ARCH_ARM_CORTEX_M
=
y
CONFIG_ARCH_ARM_CORTEX_M0
=
y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT
=
y
CONFIG_RT_USING_USER_MAIN
=
y
CONFIG_RT_MAIN_THREAD_STACK_SIZE
=
2048
CONFIG_RT_MAIN_THREAD_PRIORITY
=
10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH
=
y
CONFIG_FINSH_THREAD_NAME
=
"tshell"
CONFIG_FINSH_USING_HISTORY
=
y
CONFIG_FINSH_HISTORY_LINES
=
5
CONFIG_FINSH_USING_SYMTAB
=
y
CONFIG_FINSH_USING_DESCRIPTION
=
y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY
=
20
CONFIG_FINSH_THREAD_STACK_SIZE
=
4096
CONFIG_FINSH_CMD_SIZE
=
80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH
=
y
CONFIG_FINSH_USING_MSH_DEFAULT
=
y
CONFIG_FINSH_USING_MSH_ONLY
=
y
CONFIG_FINSH_ARG_MAX
=
10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC
=
y
CONFIG_RT_PIPE_BUFSZ
=
512
CONFIG_RT_USING_SERIAL
=
y
CONFIG_RT_SERIAL_USING_DMA
=
y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
CONFIG_RT_USING_PIN
=
y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
#
# Using WiFi
#
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# ARM CMSIS
#
# CONFIG_RT_USING_CMSIS_OS is not set
# CONFIG_RT_USING_RTT_CMSIS is not set
# CONFIG_RT_USING_LWP is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
#
# sample package
#
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
#
# Privated Packages of RealThread
#
# CONFIG_PKG_USING_CODEC is not set
# CONFIG_PKG_USING_PLAYER is not set
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
#
# Network Utilities
#
# CONFIG_PKG_USING_WICED is not set
# CONFIG_PKG_USING_CLOUDSDK is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_POWER_MANAGER is not set
# CONFIG_PKG_USING_RT_OTA is not set
# CONFIG_PKG_USING_RDBD_SRC is not set
# CONFIG_PKG_USING_RTINSIGHT is not set
# CONFIG_PKG_USING_SMARTCONFIG is not set
CONFIG_SOC_FAMILY_STM32
=
y
CONFIG_SOC_SERIES_STM32F0
=
y
#
# Hardware Drivers Config
#
CONFIG_SOC_STM32F091RC
=
y
#
# Onboard Peripheral Drivers
#
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO
=
y
# CONFIG_BSP_USING_UART1 is not set
CONFIG_BSP_USING_UART2
=
y
# CONFIG_BSP_USING_SPI1 is not set
# CONFIG_BSP_SPI_USING_DMA is not set
# CONFIG_BSP_USING_I2C1 is not set
#
# Board extended module Drivers
#
bsp/stm32/stm32f091-nucleo/.gitignore
0 → 100644
浏览文件 @
78fc9b44
*.pyc
*.map
*.dblite
*.elf
*.bin
*.hex
*.axf
*.exe
*.pdb
*.idb
*.ilk
*.old
build
Debug
documentation/html
packages/
*~
*.o
*.obj
*.out
*.bak
*.dep
*.lib
*.i
*.d
.DS_Stor*
.config 3
.config 4
.config 5
Midea-X1
*.uimg
GPATH
GRTAGS
GTAGS
.vscode
JLinkLog.txt
JLinkSettings.ini
DebugConfig/
RTE/
settings/
*.uvguix*
cconfig.h
bsp/stm32/stm32f091-nucleo/Kconfig
0 → 100644
浏览文件 @
78fc9b44
mainmenu "RT-Thread Configuration"
config $BSP_DIR
string
option env="BSP_ROOT"
default "."
config $RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config $PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "../libraries/Kconfig"
source "board/Kconfig"
bsp/stm32/stm32f091-nucleo/README.md
0 → 100644
浏览文件 @
78fc9b44
# BSP README 模板
## 简介
本文档为 RT-Thread 开发团队为 STM32F091RC-NuCLEO 开发板提供的 BSP (板级支持包) 说明。
主要内容如下:
-
开发板资源介绍
-
BSP 快速上手
-
进阶使用方法
通过阅读快速上手章节开发者可以快速地上手该 BSP,将 RT-Thread 运行在开发板上。在进阶使用指南章节,将会介绍更多高级功能,帮助开发者利用 RT-Thread 驱动更多板载资源。
## 开发板介绍
STM32F091RC-NuCLEO 开发板是 ST 官方推出的一款基于 ARM Cortex-M0 内核的开发板,最高主频为 48Mhz,该开发板具有丰富的扩展接口,可以方便验证 STM32F091 的芯片性能。
开发板外观如下图所示:
![
board
](
figures/board.jpg
)
该开发板常用
**板载资源**
如下:
-
MCU:STM32F091,主频 48MHz,256KB FLASH ,32KB RAM
-
外部 RAM:无
-
外部 FLASH:无
-
常用外设
-
按键:1个,user(兼具唤醒功能,PC13)
-
常用接口:USB 转串口、arduino 接口等
-
调试接口,标准 SWD
开发板更多详细信息请参考 ST 的
[
NUCLEO 开发板介绍
](
https://www.st.com/en/evaluation-tools/stm32-mcu-nucleo.html?querycriteria=productId=LN1847
)
。
## 外设支持
本 BSP 目前对外设的支持情况如下:
|
**板载外设**
|
**支持情况**
|
**备注**
|
| :----------------- | :----------: | :------------------------------------- |
| ST-LINK 虚拟串口 | 支持 | 使用 USART2 |
|
**片上外设**
|
**支持情况**
|
**备注**
|
| GPIO | 支持 | PA0, PA1... PC15 ---> PIN: 0, 1...64 |
| UART | 支持 | USART1/2 |
| SPI | 支持 | SPI1 |
| I2C | 支持 | |
| TIMER | 支持 | |
| ADC | 支持 | |
| RTC | 支持 | |
| PWM | 支持 | |
| FLASH | 支持 | |
| IWG | 支持 | |
## 使用说明
使用说明分为如下两个章节:
-
快速上手
本章节是为刚接触 RT-Thread 的新手准备的使用说明,遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上,看到实验效果 。
-
进阶使用
本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置,可以开启更多板载资源,实现更多高级功能。
### 快速上手
本 BSP 为开发者提供 MDK4、MDK5 和 IAR 工程,并且支持 GCC 开发环境。下面以 MDK5 开发环境为例,介绍如何将系统运行起来。
#### 硬件连接
使用数据线连接开发板到 PC,打开电源开关。
#### 编译下载
双击 project.uvprojx 文件,打开 MDK5 工程,编译并下载程序到开发板。
> 工程默认配置使用 xxx 仿真器下载程序,在通过 xxx 连接开发板的基础上,点击下载按钮即可下载程序到开发板
#### 运行结果
下载程序成功之后,系统会自动运行。
连接开发板对应串口到 PC , 在终端工具里打开相应的串口(115200-8-1-N),复位设备后,可以看到 RT-Thread 的输出信息:
```
bash
\
| /
- RT - Thread Operating System
/ |
\
4.0.0 build Dec 21 2018
2006 - 2018 Copyright by rt-thread team
msh
>
```
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 2 的功能,如果需使用 SPI,I2C 等更多高级功能,需要利用 ENV 工具对BSP 进行配置,步骤如下:
1.
在 bsp 下打开 env 工具。
2.
输入
`menuconfig`
命令配置工程,配置好之后保存退出。
3.
输入
`pkgs --update`
命令更新软件包。
4.
输入
`scons --target=mdk4/mdk5/iar`
命令重新生成工程。
本章节更多详细的介绍请参考
[
BSP 进阶使用指南
](
../docs/BSP进阶使用指南.md
)
。
## 注意事项
-
无
## 联系人信息
维护人:
-
[
zylx
](
https://github.com/qgyhd1234
)
\ No newline at end of file
bsp/stm32/stm32f091-nucleo/SConscript
0 → 100644
浏览文件 @
78fc9b44
# for module compiling
import
os
Import
(
'RTT_ROOT'
)
cwd
=
str
(
Dir
(
'#'
))
objs
=
[]
list
=
os
.
listdir
(
cwd
)
for
d
in
list
:
path
=
os
.
path
.
join
(
cwd
,
d
)
if
os
.
path
.
isfile
(
os
.
path
.
join
(
path
,
'SConscript'
)):
objs
=
objs
+
SConscript
(
os
.
path
.
join
(
d
,
'SConscript'
))
Return
(
'objs'
)
bsp/stm32/stm32f091-nucleo/SConstruct
0 → 100644
浏览文件 @
78fc9b44
import
os
import
sys
import
rtconfig
if
os
.
getenv
(
'RTT_ROOT'
):
RTT_ROOT
=
os
.
getenv
(
'RTT_ROOT'
)
else
:
RTT_ROOT
=
os
.
path
.
normpath
(
os
.
getcwd
()
+
'/../../..'
)
sys
.
path
=
sys
.
path
+
[
os
.
path
.
join
(
RTT_ROOT
,
'tools'
)]
try
:
from
building
import
*
except
:
print
(
'Cannot found RT-Thread root directory, please check RTT_ROOT'
)
print
(
RTT_ROOT
)
exit
(
-
1
)
TARGET
=
'rt-thread.'
+
rtconfig
.
TARGET_EXT
env
=
Environment
(
tools
=
[
'mingw'
],
AS
=
rtconfig
.
AS
,
ASFLAGS
=
rtconfig
.
AFLAGS
,
CC
=
rtconfig
.
CC
,
CCFLAGS
=
rtconfig
.
CFLAGS
,
AR
=
rtconfig
.
AR
,
ARFLAGS
=
'-rc'
,
LINK
=
rtconfig
.
LINK
,
LINKFLAGS
=
rtconfig
.
LFLAGS
)
env
.
PrependENVPath
(
'PATH'
,
rtconfig
.
EXEC_PATH
)
if
rtconfig
.
PLATFORM
==
'iar'
:
env
.
Replace
(
CCCOM
=
[
'$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'
])
env
.
Replace
(
ARFLAGS
=
[
''
])
env
.
Replace
(
LINKCOM
=
[
'$LINK $SOURCES $LINKFLAGS -o $TARGET --map rt-thread.map'
])
Export
(
'RTT_ROOT'
)
Export
(
'rtconfig'
)
SDK_ROOT
=
os
.
path
.
abspath
(
'./'
)
if
os
.
path
.
exists
(
SDK_ROOT
+
'/libraries'
):
libraries_path_prefix
=
SDK_ROOT
+
'/libraries'
else
:
libraries_path_prefix
=
os
.
path
.
dirname
(
SDK_ROOT
)
+
'/libraries'
SDK_LIB
=
libraries_path_prefix
Export
(
'SDK_LIB'
)
# prepare building environment
objs
=
PrepareBuilding
(
env
,
RTT_ROOT
,
has_libcpu
=
False
)
stm32_library
=
'STM32F0xx_HAL'
rtconfig
.
BSP_LIBRARY_TYPE
=
stm32_library
# include libraries
objs
.
extend
(
SConscript
(
os
.
path
.
join
(
libraries_path_prefix
,
stm32_library
,
'SConscript'
)))
# include drivers
objs
.
extend
(
SConscript
(
os
.
path
.
join
(
libraries_path_prefix
,
'HAL_Drivers'
,
'SConscript'
)))
# make a building
DoBuilding
(
TARGET
,
objs
)
bsp/stm32/stm32f091-nucleo/applications/SConscript
0 → 100644
浏览文件 @
78fc9b44
Import
(
'RTT_ROOT'
)
Import
(
'rtconfig'
)
from
building
import
*
cwd
=
GetCurrentDir
()
src
=
Glob
(
'*.c'
)
CPPPATH
=
[
cwd
,
str
(
Dir
(
'#'
))]
group
=
DefineGroup
(
'Applications'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
)
Return
(
'group'
)
bsp/stm32/stm32f091-nucleo/applications/main.c
0 → 100644
浏览文件 @
78fc9b44
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-06 zylx first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
int
main
(
void
)
{
int
count
=
1
;
while
(
count
++
)
{
rt_thread_mdelay
(
500
);
}
return
RT_EOK
;
}
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/.mxproject
0 → 100644
浏览文件 @
78fc9b44
[PreviousGenFiles]
HeaderPath=D:/BspFramework/rt-thread/bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc
HeaderFiles=stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h;stm32f0xx_it.h;stm32f0xx_hal_conf.h;
SourcePath=D:/BspFramework/rt-thread/bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src
SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c;stm32f0xx_it.c;stm32f0xx_hal_msp.c;
[PreviousLibFiles]
LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_iwdg.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rtc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_spi_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_tim_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_usart_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_uart_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h;Drivers/STM32F0xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f091xc.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/core_cmSimd.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;
[PreviousUsedKeilFiles]
SourceFiles=..\Src\main.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../\Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;E:/git_project/BspFramework/rt-thread/bsp/stm32/stm32f10x/board/CubeMX_Config//MDK-ARM/startup_stm32f103xb.s;
HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc;
[]
SourceFiles=;;
[PreviousUsedIarFiles]
SourceFiles=..\Src\main.c;..\Src\stm32f0xx_it.c;..\Src\stm32f0xx_hal_msp.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;../\Src/system_stm32f0xx.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_iwdg.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rtc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_spi_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_usart.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_uart_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c;../Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c;../\Src/system_stm32f0xx.c;../Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;null;
HeaderPath=..\Drivers\STM32F0xx_HAL_Driver\Inc;..\Drivers\STM32F0xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F0xx\Include;..\Drivers\CMSIS\Include;..\Inc;
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/CubeMX_Config.ioc
0 → 100644
浏览文件 @
78fc9b44
#MicroXplorer Configuration settings - do not modify
File.Version=6
KeepUserPlacement=false
Mcu.Family=STM32F0
Mcu.IP0=ADC
Mcu.IP1=IWDG
Mcu.IP10=TIM17
Mcu.IP11=USART1
Mcu.IP12=USART2
Mcu.IP2=NVIC
Mcu.IP3=RCC
Mcu.IP4=RTC
Mcu.IP5=SPI1
Mcu.IP6=SYS
Mcu.IP7=TIM2
Mcu.IP8=TIM14
Mcu.IP9=TIM16
Mcu.IPNb=13
Mcu.Name=STM32F091R(B-C)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PC14OSC32_IN
Mcu.Pin1=PC15OSC32_OUT
Mcu.Pin10=PA9
Mcu.Pin11=PA10
Mcu.Pin12=PA13
Mcu.Pin13=PA14
Mcu.Pin14=VP_IWDG_VS_IWDG
Mcu.Pin15=VP_RTC_VS_RTC_Activate
Mcu.Pin16=VP_SYS_VS_Systick
Mcu.Pin17=VP_TIM2_VS_ClockSourceINT
Mcu.Pin18=VP_TIM14_VS_ClockSourceINT
Mcu.Pin19=VP_TIM16_VS_ClockSourceINT
Mcu.Pin2=PA0
Mcu.Pin20=VP_TIM17_VS_ClockSourceINT
Mcu.Pin3=PA2
Mcu.Pin4=PA3
Mcu.Pin5=PA5
Mcu.Pin6=PA6
Mcu.Pin7=PA7
Mcu.Pin8=PB11
Mcu.Pin9=PA8
Mcu.PinsNb=21
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F091RCTx
MxCube.Version=5.0.0
MxDb.Version=DB.5.0.0
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false
NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false
PA0.Mode=IN0
PA0.Signal=ADC_IN0
PA10.Mode=Synchronous
PA10.Signal=USART1_RX
PA13.Mode=Serial_Wire
PA13.Signal=SYS_SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_SWCLK
PA2.Mode=Asynchronous
PA2.Signal=USART2_TX
PA3.Mode=Asynchronous
PA3.Signal=USART2_RX
PA5.Mode=Full_Duplex_Master
PA5.Signal=SPI1_SCK
PA6.Mode=Full_Duplex_Master
PA6.Signal=SPI1_MISO
PA7.Mode=Full_Duplex_Master
PA7.Signal=SPI1_MOSI
PA8.Mode=Synchronous
PA8.Signal=USART1_CK
PA9.Mode=Synchronous
PA9.Signal=USART1_TX
PB11.Signal=S_TIM2_CH4
PC14OSC32_IN.Mode=LSE-External-Oscillator
PC14OSC32_IN.Signal=RCC_OSC32_IN
PC15OSC32_OUT.Mode=LSE-External-Oscillator
PC15OSC32_OUT.Signal=RCC_OSC32_OUT
PCC.Checker=false
PCC.Line=STM32F0x1
PCC.MCU=STM32F091R(B-C)Tx
PCC.PartNumber=STM32F091RCTx
PCC.Seq0=0
PCC.Series=STM32F0
PCC.Temperature=25
PCC.Vdd=3.6
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F091RCTx
ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.9.0
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=true
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=CubeMX_Config.ioc
ProjectManager.ProjectName=CubeMX_Config
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=EWARM V8
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_Init-USART1-false-HAL-true,4-MX_USART2_UART_Init-USART2-false-HAL-true,5-MX_SPI1_Init-SPI1-false-HAL-true,6-MX_TIM16_Init-TIM16-false-HAL-true,7-MX_TIM17_Init-TIM17-false-HAL-true,8-MX_TIM14_Init-TIM14-false-HAL-true,9-MX_TIM2_Init-TIM2-false-HAL-true,10-MX_ADC_Init-ADC-false-HAL-true,11-MX_RTC_Init-RTC-false-HAL-true,12-MX_IWDG_Init-IWDG-false-HAL-true
RCC.AHBFreq_Value=48000000
RCC.APB1Freq_Value=48000000
RCC.APB1TimFreq_Value=48000000
RCC.CECFreq_Value=32786.88524590164
RCC.FCLKCortexFreq_Value=48000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=48000000
RCC.HSICECFreq_Value=32786.88524590164
RCC.I2SFreq_Value=48000000
RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,CECFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSICECFreq_Value,I2SFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,RTCClockSelection,RTCFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,VCOOutput2Freq_Value
RCC.MCOFreq_Value=48000000
RCC.PLLCLKFreq_Value=48000000
RCC.PLLMCOFreq_Value=48000000
RCC.PLLMUL=RCC_PLL_MUL6
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
RCC.RTCFreq_Value=32768
RCC.SYSCLKFreq_VALUE=48000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.TimSysFreq_Value=48000000
RCC.USART1Freq_Value=48000000
RCC.USART2Freq_Value=48000000
RCC.USART3Freq_Value=48000000
RCC.VCOOutput2Freq_Value=8000000
SH.S_TIM2_CH4.0=TIM2_CH4,PWM Generation4 CH4
SH.S_TIM2_CH4.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
SPI1.CalculateBaudRate=6.0 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualType=VM_MASTER
TIM2.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
TIM2.IPParameters=Channel-PWM Generation4 CH4
USART1.IPParameters=VirtualMode-Synchronous
USART1.VirtualMode-Synchronous=VM_SYNC
USART2.IPParameters=VirtualMode-Asynchronous
USART2.VirtualMode-Asynchronous=VM_ASYNC
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_RTC_VS_RTC_Activate.Mode=RTC_Enabled
VP_RTC_VS_RTC_Activate.Signal=RTC_VS_RTC_Activate
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM14_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM14_VS_ClockSourceINT.Signal=TIM14_VS_ClockSourceINT
VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM16_VS_ClockSourceINT.Signal=TIM16_VS_ClockSourceINT
VP_TIM17_VS_ClockSourceINT.Mode=Enable_Timer
VP_TIM17_VS_ClockSourceINT.Signal=TIM17_VS_ClockSourceINT
VP_TIM2_VS_ClockSourceINT.Mode=Internal
VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
board=custom
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/main.h
0 → 100644
浏览文件 @
78fc9b44
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
** This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* COPYRIGHT(c) 2018 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f0xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
void
HAL_TIM_MspPostInit
(
TIM_HandleTypeDef
*
htim
);
/* Exported functions prototypes ---------------------------------------------*/
void
Error_Handler
(
void
);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif
/* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/stm32f0xx_hal_conf.h
0 → 100644
浏览文件 @
78fc9b44
/**
******************************************************************************
* @file stm32f0xx_hal_conf.h
* @brief HAL configuration file.
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_HAL_CONF_H
#define __STM32F0xx_HAL_CONF_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_CAN_MODULE_ENABLED */
/*#define HAL_CEC_MODULE_ENABLED */
/*#define HAL_COMP_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
/*#define HAL_TSC_MODULE_ENABLED */
/*#define HAL_DAC_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/*#define HAL_LCD_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_EXTI_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/* ########################## HSE/HSI Values adaptation ##################### */
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000)
/*!< Value of the External oscillator in Hz */
#endif
/* HSE_VALUE */
/**
* @brief In the following line adjust the External High Speed oscillator (HSE) Startup
* Timeout value
*/
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100)
/*!< Time out for HSE start up, in ms */
#endif
/* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000)
/*!< Value of the Internal oscillator in Hz*/
#endif
/* HSI_VALUE */
/**
* @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup
* Timeout value
*/
#if !defined (HSI_STARTUP_TIMEOUT)
#define HSI_STARTUP_TIMEOUT ((uint32_t)5000)
/*!< Time out for HSI start up */
#endif
/* HSI_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator for ADC (HSI14) value.
*/
#if !defined (HSI14_VALUE)
#define HSI14_VALUE ((uint32_t)14000000)
/*!< Value of the Internal High Speed oscillator for ADC in Hz.
The real value may vary depending on the variations
in voltage and temperature. */
#endif
/* HSI14_VALUE */
/**
* @brief Internal High Speed oscillator for USB (HSI48) value.
*/
#if !defined (HSI48_VALUE)
#define HSI48_VALUE ((uint32_t)48000000)
/*!< Value of the Internal High Speed oscillator for USB in Hz.
The real value may vary depending on the variations
in voltage and temperature. */
#endif
/* HSI48_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)40000)
#endif
/* LSI_VALUE */
/*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSI) value.
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768)
/*!< Value of the External Low Speed oscillator in Hz */
#endif
/* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000)
/*!< Time out for LSE start up, in ms */
#endif
/* LSE_STARTUP_TIMEOUT */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300)
/*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0)
/*!< tick interrupt priority (lowest by default) */
/* Warning: Must be set to higher priority for HAL_Delay() */
/* and HAL_GetTick() usage under interrupt context */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
#define INSTRUCTION_CACHE_ENABLE 0
#define DATA_CACHE_ENABLE 0
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32f0xx_hal_rcc.h"
#endif
/* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32f0xx_hal_exti.h"
#endif
/* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32f0xx_hal_gpio.h"
#endif
/* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32f0xx_hal_dma.h"
#endif
/* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32f0xx_hal_cortex.h"
#endif
/* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32f0xx_hal_adc.h"
#endif
/* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32f0xx_hal_can.h"
#endif
/* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CEC_MODULE_ENABLED
#include "stm32f0xx_hal_cec.h"
#endif
/* HAL_CEC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32f0xx_hal_comp.h"
#endif
/* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32f0xx_hal_crc.h"
#endif
/* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32f0xx_hal_dac.h"
#endif
/* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32f0xx_hal_flash.h"
#endif
/* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32f0xx_hal_i2c.h"
#endif
/* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32f0xx_hal_i2s.h"
#endif
/* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32f0xx_hal_irda.h"
#endif
/* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32f0xx_hal_iwdg.h"
#endif
/* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32f0xx_hal_pcd.h"
#endif
/* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32f0xx_hal_pwr.h"
#endif
/* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32f0xx_hal_rtc.h"
#endif
/* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32f0xx_hal_smartcard.h"
#endif
/* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32f0xx_hal_smbus.h"
#endif
/* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32f0xx_hal_spi.h"
#endif
/* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32f0xx_hal_tim.h"
#endif
/* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_TSC_MODULE_ENABLED
#include "stm32f0xx_hal_tsc.h"
#endif
/* HAL_TSC_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32f0xx_hal_uart.h"
#endif
/* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32f0xx_hal_usart.h"
#endif
/* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32f0xx_hal_wwdg.h"
#endif
/* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void
assert_failed
(
char
*
file
,
uint32_t
line
);
#else
#define assert_param(expr) ((void)0U)
#endif
/* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif
/* __STM32F0xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Inc/stm32f0xx_it.h
0 → 100644
浏览文件 @
78fc9b44
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f0xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
*
* COPYRIGHT(c) 2018 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F0xx_IT_H
#define __STM32F0xx_IT_H
#ifdef __cplusplus
extern
"C"
{
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void
NMI_Handler
(
void
);
void
HardFault_Handler
(
void
);
void
SVC_Handler
(
void
);
void
PendSV_Handler
(
void
);
void
SysTick_Handler
(
void
);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif
/* __STM32F0xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/main.c
0 → 100644
浏览文件 @
78fc9b44
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
** This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* COPYRIGHT(c) 2018 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef
hadc
;
IWDG_HandleTypeDef
hiwdg
;
RTC_HandleTypeDef
hrtc
;
SPI_HandleTypeDef
hspi1
;
TIM_HandleTypeDef
htim2
;
TIM_HandleTypeDef
htim14
;
TIM_HandleTypeDef
htim16
;
TIM_HandleTypeDef
htim17
;
USART_HandleTypeDef
husart1
;
UART_HandleTypeDef
huart2
;
/* USER CODE BEGIN PV */
/* Private variables ---------------------------------------------------------*/
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void
SystemClock_Config
(
void
);
static
void
MX_GPIO_Init
(
void
);
static
void
MX_USART1_Init
(
void
);
static
void
MX_USART2_UART_Init
(
void
);
static
void
MX_SPI1_Init
(
void
);
static
void
MX_TIM16_Init
(
void
);
static
void
MX_TIM17_Init
(
void
);
static
void
MX_TIM14_Init
(
void
);
static
void
MX_TIM2_Init
(
void
);
static
void
MX_ADC_Init
(
void
);
static
void
MX_RTC_Init
(
void
);
static
void
MX_IWDG_Init
(
void
);
/* USER CODE BEGIN PFP */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int
main
(
void
)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init
();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config
();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init
();
MX_USART1_Init
();
MX_USART2_UART_Init
();
MX_SPI1_Init
();
MX_TIM16_Init
();
MX_TIM17_Init
();
MX_TIM14_Init
();
MX_TIM2_Init
();
MX_ADC_Init
();
MX_RTC_Init
();
MX_IWDG_Init
();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while
(
1
)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void
SystemClock_Config
(
void
)
{
RCC_OscInitTypeDef
RCC_OscInitStruct
=
{
0
};
RCC_ClkInitTypeDef
RCC_ClkInitStruct
=
{
0
};
RCC_PeriphCLKInitTypeDef
PeriphClkInit
=
{
0
};
/**Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess
();
__HAL_RCC_LSEDRIVE_CONFIG
(
RCC_LSEDRIVE_HIGH
);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct
.
OscillatorType
=
RCC_OSCILLATORTYPE_HSI
|
RCC_OSCILLATORTYPE_HSI14
|
RCC_OSCILLATORTYPE_LSI
|
RCC_OSCILLATORTYPE_LSE
;
RCC_OscInitStruct
.
LSEState
=
RCC_LSE_ON
;
RCC_OscInitStruct
.
HSIState
=
RCC_HSI_ON
;
RCC_OscInitStruct
.
HSI14State
=
RCC_HSI14_ON
;
RCC_OscInitStruct
.
HSICalibrationValue
=
RCC_HSICALIBRATION_DEFAULT
;
RCC_OscInitStruct
.
HSI14CalibrationValue
=
16
;
RCC_OscInitStruct
.
LSIState
=
RCC_LSI_ON
;
RCC_OscInitStruct
.
PLL
.
PLLState
=
RCC_PLL_ON
;
RCC_OscInitStruct
.
PLL
.
PLLSource
=
RCC_PLLSOURCE_HSI
;
RCC_OscInitStruct
.
PLL
.
PLLMUL
=
RCC_PLL_MUL6
;
RCC_OscInitStruct
.
PLL
.
PREDIV
=
RCC_PREDIV_DIV1
;
if
(
HAL_RCC_OscConfig
(
&
RCC_OscInitStruct
)
!=
HAL_OK
)
{
Error_Handler
();
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct
.
ClockType
=
RCC_CLOCKTYPE_HCLK
|
RCC_CLOCKTYPE_SYSCLK
|
RCC_CLOCKTYPE_PCLK1
;
RCC_ClkInitStruct
.
SYSCLKSource
=
RCC_SYSCLKSOURCE_PLLCLK
;
RCC_ClkInitStruct
.
AHBCLKDivider
=
RCC_SYSCLK_DIV1
;
RCC_ClkInitStruct
.
APB1CLKDivider
=
RCC_HCLK_DIV1
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_1
)
!=
HAL_OK
)
{
Error_Handler
();
}
PeriphClkInit
.
PeriphClockSelection
=
RCC_PERIPHCLK_USART1
|
RCC_PERIPHCLK_USART2
|
RCC_PERIPHCLK_RTC
;
PeriphClkInit
.
Usart1ClockSelection
=
RCC_USART1CLKSOURCE_PCLK1
;
PeriphClkInit
.
Usart2ClockSelection
=
RCC_USART2CLKSOURCE_PCLK1
;
PeriphClkInit
.
RTCClockSelection
=
RCC_RTCCLKSOURCE_LSE
;
if
(
HAL_RCCEx_PeriphCLKConfig
(
&
PeriphClkInit
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
/**
* @brief ADC Initialization Function
* @param None
* @retval None
*/
static
void
MX_ADC_Init
(
void
)
{
/* USER CODE BEGIN ADC_Init 0 */
/* USER CODE END ADC_Init 0 */
ADC_ChannelConfTypeDef
sConfig
=
{
0
};
/* USER CODE BEGIN ADC_Init 1 */
/* USER CODE END ADC_Init 1 */
/**Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
*/
hadc
.
Instance
=
ADC1
;
hadc
.
Init
.
ClockPrescaler
=
ADC_CLOCK_ASYNC_DIV1
;
hadc
.
Init
.
Resolution
=
ADC_RESOLUTION_12B
;
hadc
.
Init
.
DataAlign
=
ADC_DATAALIGN_RIGHT
;
hadc
.
Init
.
ScanConvMode
=
ADC_SCAN_DIRECTION_FORWARD
;
hadc
.
Init
.
EOCSelection
=
ADC_EOC_SINGLE_CONV
;
hadc
.
Init
.
LowPowerAutoWait
=
DISABLE
;
hadc
.
Init
.
LowPowerAutoPowerOff
=
DISABLE
;
hadc
.
Init
.
ContinuousConvMode
=
DISABLE
;
hadc
.
Init
.
DiscontinuousConvMode
=
DISABLE
;
hadc
.
Init
.
ExternalTrigConv
=
ADC_SOFTWARE_START
;
hadc
.
Init
.
ExternalTrigConvEdge
=
ADC_EXTERNALTRIGCONVEDGE_NONE
;
hadc
.
Init
.
DMAContinuousRequests
=
DISABLE
;
hadc
.
Init
.
Overrun
=
ADC_OVR_DATA_PRESERVED
;
if
(
HAL_ADC_Init
(
&
hadc
)
!=
HAL_OK
)
{
Error_Handler
();
}
/**Configure for the selected ADC regular channel to be converted.
*/
sConfig
.
Channel
=
ADC_CHANNEL_0
;
sConfig
.
Rank
=
ADC_RANK_CHANNEL_NUMBER
;
sConfig
.
SamplingTime
=
ADC_SAMPLETIME_1CYCLE_5
;
if
(
HAL_ADC_ConfigChannel
(
&
hadc
,
&
sConfig
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN ADC_Init 2 */
/* USER CODE END ADC_Init 2 */
}
/**
* @brief IWDG Initialization Function
* @param None
* @retval None
*/
static
void
MX_IWDG_Init
(
void
)
{
/* USER CODE BEGIN IWDG_Init 0 */
/* USER CODE END IWDG_Init 0 */
/* USER CODE BEGIN IWDG_Init 1 */
/* USER CODE END IWDG_Init 1 */
hiwdg
.
Instance
=
IWDG
;
hiwdg
.
Init
.
Prescaler
=
IWDG_PRESCALER_4
;
hiwdg
.
Init
.
Window
=
4095
;
hiwdg
.
Init
.
Reload
=
4095
;
if
(
HAL_IWDG_Init
(
&
hiwdg
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN IWDG_Init 2 */
/* USER CODE END IWDG_Init 2 */
}
/**
* @brief RTC Initialization Function
* @param None
* @retval None
*/
static
void
MX_RTC_Init
(
void
)
{
/* USER CODE BEGIN RTC_Init 0 */
/* USER CODE END RTC_Init 0 */
/* USER CODE BEGIN RTC_Init 1 */
/* USER CODE END RTC_Init 1 */
/**Initialize RTC Only
*/
hrtc
.
Instance
=
RTC
;
hrtc
.
Init
.
HourFormat
=
RTC_HOURFORMAT_24
;
hrtc
.
Init
.
AsynchPrediv
=
127
;
hrtc
.
Init
.
SynchPrediv
=
255
;
hrtc
.
Init
.
OutPut
=
RTC_OUTPUT_DISABLE
;
hrtc
.
Init
.
OutPutPolarity
=
RTC_OUTPUT_POLARITY_HIGH
;
hrtc
.
Init
.
OutPutType
=
RTC_OUTPUT_TYPE_OPENDRAIN
;
if
(
HAL_RTC_Init
(
&
hrtc
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN RTC_Init 2 */
/* USER CODE END RTC_Init 2 */
}
/**
* @brief SPI1 Initialization Function
* @param None
* @retval None
*/
static
void
MX_SPI1_Init
(
void
)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
/* SPI1 parameter configuration*/
hspi1
.
Instance
=
SPI1
;
hspi1
.
Init
.
Mode
=
SPI_MODE_MASTER
;
hspi1
.
Init
.
Direction
=
SPI_DIRECTION_2LINES
;
hspi1
.
Init
.
DataSize
=
SPI_DATASIZE_4BIT
;
hspi1
.
Init
.
CLKPolarity
=
SPI_POLARITY_LOW
;
hspi1
.
Init
.
CLKPhase
=
SPI_PHASE_1EDGE
;
hspi1
.
Init
.
NSS
=
SPI_NSS_SOFT
;
hspi1
.
Init
.
BaudRatePrescaler
=
SPI_BAUDRATEPRESCALER_8
;
hspi1
.
Init
.
FirstBit
=
SPI_FIRSTBIT_MSB
;
hspi1
.
Init
.
TIMode
=
SPI_TIMODE_DISABLE
;
hspi1
.
Init
.
CRCCalculation
=
SPI_CRCCALCULATION_DISABLE
;
hspi1
.
Init
.
CRCPolynomial
=
7
;
hspi1
.
Init
.
CRCLength
=
SPI_CRC_LENGTH_DATASIZE
;
hspi1
.
Init
.
NSSPMode
=
SPI_NSS_PULSE_ENABLE
;
if
(
HAL_SPI_Init
(
&
hspi1
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static
void
MX_TIM2_Init
(
void
)
{
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef
sClockSourceConfig
=
{
0
};
TIM_MasterConfigTypeDef
sMasterConfig
=
{
0
};
TIM_OC_InitTypeDef
sConfigOC
=
{
0
};
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2
.
Instance
=
TIM2
;
htim2
.
Init
.
Prescaler
=
0
;
htim2
.
Init
.
CounterMode
=
TIM_COUNTERMODE_UP
;
htim2
.
Init
.
Period
=
0
;
htim2
.
Init
.
ClockDivision
=
TIM_CLOCKDIVISION_DIV1
;
htim2
.
Init
.
AutoReloadPreload
=
TIM_AUTORELOAD_PRELOAD_DISABLE
;
if
(
HAL_TIM_Base_Init
(
&
htim2
)
!=
HAL_OK
)
{
Error_Handler
();
}
sClockSourceConfig
.
ClockSource
=
TIM_CLOCKSOURCE_INTERNAL
;
if
(
HAL_TIM_ConfigClockSource
(
&
htim2
,
&
sClockSourceConfig
)
!=
HAL_OK
)
{
Error_Handler
();
}
if
(
HAL_TIM_PWM_Init
(
&
htim2
)
!=
HAL_OK
)
{
Error_Handler
();
}
sMasterConfig
.
MasterOutputTrigger
=
TIM_TRGO_RESET
;
sMasterConfig
.
MasterSlaveMode
=
TIM_MASTERSLAVEMODE_DISABLE
;
if
(
HAL_TIMEx_MasterConfigSynchronization
(
&
htim2
,
&
sMasterConfig
)
!=
HAL_OK
)
{
Error_Handler
();
}
sConfigOC
.
OCMode
=
TIM_OCMODE_PWM1
;
sConfigOC
.
Pulse
=
0
;
sConfigOC
.
OCPolarity
=
TIM_OCPOLARITY_HIGH
;
sConfigOC
.
OCFastMode
=
TIM_OCFAST_DISABLE
;
if
(
HAL_TIM_PWM_ConfigChannel
(
&
htim2
,
&
sConfigOC
,
TIM_CHANNEL_4
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit
(
&
htim2
);
}
/**
* @brief TIM14 Initialization Function
* @param None
* @retval None
*/
static
void
MX_TIM14_Init
(
void
)
{
/* USER CODE BEGIN TIM14_Init 0 */
/* USER CODE END TIM14_Init 0 */
/* USER CODE BEGIN TIM14_Init 1 */
/* USER CODE END TIM14_Init 1 */
htim14
.
Instance
=
TIM14
;
htim14
.
Init
.
Prescaler
=
0
;
htim14
.
Init
.
CounterMode
=
TIM_COUNTERMODE_UP
;
htim14
.
Init
.
Period
=
0
;
htim14
.
Init
.
ClockDivision
=
TIM_CLOCKDIVISION_DIV1
;
htim14
.
Init
.
AutoReloadPreload
=
TIM_AUTORELOAD_PRELOAD_DISABLE
;
if
(
HAL_TIM_Base_Init
(
&
htim14
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN TIM14_Init 2 */
/* USER CODE END TIM14_Init 2 */
}
/**
* @brief TIM16 Initialization Function
* @param None
* @retval None
*/
static
void
MX_TIM16_Init
(
void
)
{
/* USER CODE BEGIN TIM16_Init 0 */
/* USER CODE END TIM16_Init 0 */
/* USER CODE BEGIN TIM16_Init 1 */
/* USER CODE END TIM16_Init 1 */
htim16
.
Instance
=
TIM16
;
htim16
.
Init
.
Prescaler
=
0
;
htim16
.
Init
.
CounterMode
=
TIM_COUNTERMODE_UP
;
htim16
.
Init
.
Period
=
0
;
htim16
.
Init
.
ClockDivision
=
TIM_CLOCKDIVISION_DIV1
;
htim16
.
Init
.
RepetitionCounter
=
0
;
htim16
.
Init
.
AutoReloadPreload
=
TIM_AUTORELOAD_PRELOAD_DISABLE
;
if
(
HAL_TIM_Base_Init
(
&
htim16
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN TIM16_Init 2 */
/* USER CODE END TIM16_Init 2 */
}
/**
* @brief TIM17 Initialization Function
* @param None
* @retval None
*/
static
void
MX_TIM17_Init
(
void
)
{
/* USER CODE BEGIN TIM17_Init 0 */
/* USER CODE END TIM17_Init 0 */
/* USER CODE BEGIN TIM17_Init 1 */
/* USER CODE END TIM17_Init 1 */
htim17
.
Instance
=
TIM17
;
htim17
.
Init
.
Prescaler
=
0
;
htim17
.
Init
.
CounterMode
=
TIM_COUNTERMODE_UP
;
htim17
.
Init
.
Period
=
0
;
htim17
.
Init
.
ClockDivision
=
TIM_CLOCKDIVISION_DIV1
;
htim17
.
Init
.
RepetitionCounter
=
0
;
htim17
.
Init
.
AutoReloadPreload
=
TIM_AUTORELOAD_PRELOAD_DISABLE
;
if
(
HAL_TIM_Base_Init
(
&
htim17
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN TIM17_Init 2 */
/* USER CODE END TIM17_Init 2 */
}
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static
void
MX_USART1_Init
(
void
)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
husart1
.
Instance
=
USART1
;
husart1
.
Init
.
BaudRate
=
115200
;
husart1
.
Init
.
WordLength
=
USART_WORDLENGTH_8B
;
husart1
.
Init
.
StopBits
=
USART_STOPBITS_1
;
husart1
.
Init
.
Parity
=
USART_PARITY_NONE
;
husart1
.
Init
.
Mode
=
USART_MODE_TX_RX
;
husart1
.
Init
.
CLKPolarity
=
USART_POLARITY_LOW
;
husart1
.
Init
.
CLKPhase
=
USART_PHASE_1EDGE
;
husart1
.
Init
.
CLKLastBit
=
USART_LASTBIT_DISABLE
;
if
(
HAL_USART_Init
(
&
husart1
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
/**
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static
void
MX_USART2_UART_Init
(
void
)
{
/* USER CODE BEGIN USART2_Init 0 */
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2
.
Instance
=
USART2
;
huart2
.
Init
.
BaudRate
=
115200
;
huart2
.
Init
.
WordLength
=
UART_WORDLENGTH_8B
;
huart2
.
Init
.
StopBits
=
UART_STOPBITS_1
;
huart2
.
Init
.
Parity
=
UART_PARITY_NONE
;
huart2
.
Init
.
Mode
=
UART_MODE_TX_RX
;
huart2
.
Init
.
HwFlowCtl
=
UART_HWCONTROL_NONE
;
huart2
.
Init
.
OverSampling
=
UART_OVERSAMPLING_16
;
huart2
.
Init
.
OneBitSampling
=
UART_ONE_BIT_SAMPLE_DISABLE
;
huart2
.
AdvancedInit
.
AdvFeatureInit
=
UART_ADVFEATURE_NO_INIT
;
if
(
HAL_UART_Init
(
&
huart2
)
!=
HAL_OK
)
{
Error_Handler
();
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static
void
MX_GPIO_Init
(
void
)
{
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
__HAL_RCC_GPIOB_CLK_ENABLE
();
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void
Error_Handler
(
void
)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
while
(
1
)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void
assert_failed
(
char
*
file
,
uint32_t
line
)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif
/* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/stm32f0xx_hal_msp.c
0 → 100644
浏览文件 @
78fc9b44
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : stm32f0xx_hal_msp.c
* Description : This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
** This notice applies to any and all portions of this file
* that are not between comment pairs USER CODE BEGIN and
* USER CODE END. Other portions of this file, whether
* inserted by the user or by software development tools
* are owned by their respective copyright owners.
*
* COPYRIGHT(c) 2018 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
void
HAL_TIM_MspPostInit
(
TIM_HandleTypeDef
*
htim
);
/**
* Initializes the Global MSP.
*/
void
HAL_MspInit
(
void
)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE
();
__HAL_RCC_PWR_CLK_ENABLE
();
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief ADC MSP Initialization
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void
HAL_ADC_MspInit
(
ADC_HandleTypeDef
*
hadc
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
hadc
->
Instance
==
ADC1
)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**ADC GPIO Configuration
PA0 ------> ADC_IN0
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_0
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_ANALOG
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
/**
* @brief ADC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void
HAL_ADC_MspDeInit
(
ADC_HandleTypeDef
*
hadc
)
{
if
(
hadc
->
Instance
==
ADC1
)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC1_CLK_DISABLE
();
/**ADC GPIO Configuration
PA0 ------> ADC_IN0
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_0
);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
}
/**
* @brief RTC MSP Initialization
* This function configures the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void
HAL_RTC_MspInit
(
RTC_HandleTypeDef
*
hrtc
)
{
if
(
hrtc
->
Instance
==
RTC
)
{
/* USER CODE BEGIN RTC_MspInit 0 */
/* USER CODE END RTC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_RTC_ENABLE
();
/* USER CODE BEGIN RTC_MspInit 1 */
/* USER CODE END RTC_MspInit 1 */
}
}
/**
* @brief RTC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hrtc: RTC handle pointer
* @retval None
*/
void
HAL_RTC_MspDeInit
(
RTC_HandleTypeDef
*
hrtc
)
{
if
(
hrtc
->
Instance
==
RTC
)
{
/* USER CODE BEGIN RTC_MspDeInit 0 */
/* USER CODE END RTC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_RTC_DISABLE
();
/* USER CODE BEGIN RTC_MspDeInit 1 */
/* USER CODE END RTC_MspDeInit 1 */
}
}
/**
* @brief SPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void
HAL_SPI_MspInit
(
SPI_HandleTypeDef
*
hspi
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
hspi
->
Instance
==
SPI1
)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_SPI1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF0_SPI1
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
/**
* @brief SPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hspi: SPI handle pointer
* @retval None
*/
void
HAL_SPI_MspDeInit
(
SPI_HandleTypeDef
*
hspi
)
{
if
(
hspi
->
Instance
==
SPI1
)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */
/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE
();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
/* USER CODE END SPI1_MspDeInit 1 */
}
}
/**
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void
HAL_TIM_Base_MspInit
(
TIM_HandleTypeDef
*
htim_base
)
{
if
(
htim_base
->
Instance
==
TIM2
)
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE
();
/* USER CODE BEGIN TIM2_MspInit 1 */
/* USER CODE END TIM2_MspInit 1 */
}
else
if
(
htim_base
->
Instance
==
TIM14
)
{
/* USER CODE BEGIN TIM14_MspInit 0 */
/* USER CODE END TIM14_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM14_CLK_ENABLE
();
/* USER CODE BEGIN TIM14_MspInit 1 */
/* USER CODE END TIM14_MspInit 1 */
}
else
if
(
htim_base
->
Instance
==
TIM16
)
{
/* USER CODE BEGIN TIM16_MspInit 0 */
/* USER CODE END TIM16_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM16_CLK_ENABLE
();
/* USER CODE BEGIN TIM16_MspInit 1 */
/* USER CODE END TIM16_MspInit 1 */
}
else
if
(
htim_base
->
Instance
==
TIM17
)
{
/* USER CODE BEGIN TIM17_MspInit 0 */
/* USER CODE END TIM17_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM17_CLK_ENABLE
();
/* USER CODE BEGIN TIM17_MspInit 1 */
/* USER CODE END TIM17_MspInit 1 */
}
}
void
HAL_TIM_MspPostInit
(
TIM_HandleTypeDef
*
htim
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
htim
->
Instance
==
TIM2
)
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE
();
/**TIM2 GPIO Configuration
PB11 ------> TIM2_CH4
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_11
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_LOW
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF2_TIM2
;
HAL_GPIO_Init
(
GPIOB
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN TIM2_MspPostInit 1 */
/* USER CODE END TIM2_MspPostInit 1 */
}
}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void
HAL_TIM_Base_MspDeInit
(
TIM_HandleTypeDef
*
htim_base
)
{
if
(
htim_base
->
Instance
==
TIM2
)
{
/* USER CODE BEGIN TIM2_MspDeInit 0 */
/* USER CODE END TIM2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM2_CLK_DISABLE
();
/* USER CODE BEGIN TIM2_MspDeInit 1 */
/* USER CODE END TIM2_MspDeInit 1 */
}
else
if
(
htim_base
->
Instance
==
TIM14
)
{
/* USER CODE BEGIN TIM14_MspDeInit 0 */
/* USER CODE END TIM14_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM14_CLK_DISABLE
();
/* USER CODE BEGIN TIM14_MspDeInit 1 */
/* USER CODE END TIM14_MspDeInit 1 */
}
else
if
(
htim_base
->
Instance
==
TIM16
)
{
/* USER CODE BEGIN TIM16_MspDeInit 0 */
/* USER CODE END TIM16_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM16_CLK_DISABLE
();
/* USER CODE BEGIN TIM16_MspDeInit 1 */
/* USER CODE END TIM16_MspDeInit 1 */
}
else
if
(
htim_base
->
Instance
==
TIM17
)
{
/* USER CODE BEGIN TIM17_MspDeInit 0 */
/* USER CODE END TIM17_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM17_CLK_DISABLE
();
/* USER CODE BEGIN TIM17_MspDeInit 1 */
/* USER CODE END TIM17_MspDeInit 1 */
}
}
/**
* @brief USART MSP Initialization
* This function configures the hardware resources used in this example
* @param husart: USART handle pointer
* @retval None
*/
void
HAL_USART_MspInit
(
USART_HandleTypeDef
*
husart
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
husart
->
Instance
==
USART1
)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART1 GPIO Configuration
PA8 ------> USART1_CK
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_8
|
GPIO_PIN_9
|
GPIO_PIN_10
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF1_USART1
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void
HAL_UART_MspInit
(
UART_HandleTypeDef
*
huart
)
{
GPIO_InitTypeDef
GPIO_InitStruct
=
{
0
};
if
(
huart
->
Instance
==
USART2
)
{
/* USER CODE BEGIN USART2_MspInit 0 */
/* USER CODE END USART2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART2_CLK_ENABLE
();
__HAL_RCC_GPIOA_CLK_ENABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
GPIO_InitStruct
.
Pin
=
GPIO_PIN_2
|
GPIO_PIN_3
;
GPIO_InitStruct
.
Mode
=
GPIO_MODE_AF_PP
;
GPIO_InitStruct
.
Pull
=
GPIO_NOPULL
;
GPIO_InitStruct
.
Speed
=
GPIO_SPEED_FREQ_HIGH
;
GPIO_InitStruct
.
Alternate
=
GPIO_AF1_USART2
;
HAL_GPIO_Init
(
GPIOA
,
&
GPIO_InitStruct
);
/* USER CODE BEGIN USART2_MspInit 1 */
/* USER CODE END USART2_MspInit 1 */
}
}
/**
* @brief USART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param husart: USART handle pointer
* @retval None
*/
void
HAL_USART_MspDeInit
(
USART_HandleTypeDef
*
husart
)
{
if
(
husart
->
Instance
==
USART1
)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE
();
/**USART1 GPIO Configuration
PA8 ------> USART1_CK
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_8
|
GPIO_PIN_9
|
GPIO_PIN_10
);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void
HAL_UART_MspDeInit
(
UART_HandleTypeDef
*
huart
)
{
if
(
huart
->
Instance
==
USART2
)
{
/* USER CODE BEGIN USART2_MspDeInit 0 */
/* USER CODE END USART2_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART2_CLK_DISABLE
();
/**USART2 GPIO Configuration
PA2 ------> USART2_TX
PA3 ------> USART2_RX
*/
HAL_GPIO_DeInit
(
GPIOA
,
GPIO_PIN_2
|
GPIO_PIN_3
);
/* USER CODE BEGIN USART2_MspDeInit 1 */
/* USER CODE END USART2_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/stm32f0xx_it.c
0 → 100644
浏览文件 @
78fc9b44
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f0xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
*
* COPYRIGHT(c) 2018 STMicroelectronics
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f0xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M0 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void
NMI_Handler
(
void
)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void
HardFault_Handler
(
void
)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while
(
1
)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void
SVC_Handler
(
void
)
{
/* USER CODE BEGIN SVC_IRQn 0 */
/* USER CODE END SVC_IRQn 0 */
/* USER CODE BEGIN SVC_IRQn 1 */
/* USER CODE END SVC_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void
PendSV_Handler
(
void
)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void
SysTick_Handler
(
void
)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick
();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F0xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f0xx.s). */
/******************************************************************************/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/CubeMX_Config/Src/system_stm32f1xx.c
0 → 100644
浏览文件 @
78fc9b44
/**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @version V4.2.0
* @date 31-March-2017
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U
/*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif
/* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U
/*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif
/* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif
/* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U
/*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/*******************************************************************************
* Clock Definitions
*******************************************************************************/
#if defined(STM32F100xB) ||defined(STM32F100xE)
uint32_t
SystemCoreClock
=
24000000U
;
/*!< System Clock Frequency (Core Clock) */
#else
/*!< HSI Selected as System Clock source */
uint32_t
SystemCoreClock
=
72000000U
;
/*!< System Clock Frequency (Core Clock) */
#endif
const
uint8_t
AHBPrescTable
[
16U
]
=
{
0
,
0
,
0
,
0
,
0
,
0
,
0
,
0
,
1
,
2
,
3
,
4
,
6
,
7
,
8
,
9
};
const
uint8_t
APBPrescTable
[
8U
]
=
{
0
,
0
,
0
,
0
,
1
,
2
,
3
,
4
};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static
void
SystemInit_ExtMemCtl
(
void
);
#endif
/* DATA_IN_ExtSRAM */
#endif
/* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void
SystemInit
(
void
)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC
->
CR
|=
0x00000001U
;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC
->
CFGR
&=
0xF8FF0000U
;
#else
RCC
->
CFGR
&=
0xF0FF0000U
;
#endif
/* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC
->
CR
&=
0xFEF6FFFFU
;
/* Reset HSEBYP bit */
RCC
->
CR
&=
0xFFFBFFFFU
;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC
->
CFGR
&=
0xFF80FFFFU
;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC
->
CR
&=
0xEBFFFFFFU
;
/* Disable all interrupts and clear pending bits */
RCC
->
CIR
=
0x00FF0000U
;
/* Reset CFGR2 register */
RCC
->
CFGR2
=
0x00000000U
;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC
->
CIR
=
0x009F0000U
;
/* Reset CFGR2 register */
RCC
->
CFGR2
=
0x00000000U
;
#else
/* Disable all interrupts and clear pending bits */
RCC
->
CIR
=
0x009F0000U
;
#endif
/* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl
();
#endif
/* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB
->
VTOR
=
SRAM_BASE
|
VECT_TAB_OFFSET
;
/* Vector Table Relocation in Internal SRAM. */
#else
SCB
->
VTOR
=
FLASH_BASE
|
VECT_TAB_OFFSET
;
/* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void
SystemCoreClockUpdate
(
void
)
{
uint32_t
tmp
=
0U
,
pllmull
=
0U
,
pllsource
=
0U
;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t
prediv1source
=
0U
,
prediv1factor
=
0U
,
prediv2factor
=
0U
,
pll2mull
=
0U
;
#endif
/* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t
prediv1factor
=
0U
;
#endif
/* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp
=
RCC
->
CFGR
&
RCC_CFGR_SWS
;
switch
(
tmp
)
{
case
0x00U
:
/* HSI used as system clock */
SystemCoreClock
=
HSI_VALUE
;
break
;
case
0x04U
:
/* HSE used as system clock */
SystemCoreClock
=
HSE_VALUE
;
break
;
case
0x08U
:
/* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull
=
RCC
->
CFGR
&
RCC_CFGR_PLLMULL
;
pllsource
=
RCC
->
CFGR
&
RCC_CFGR_PLLSRC
;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull
=
(
pllmull
>>
18U
)
+
2U
;
if
(
pllsource
==
0x00U
)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock
=
(
HSI_VALUE
>>
1U
)
*
pllmull
;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor
=
(
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV1
)
+
1U
;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock
=
(
HSE_VALUE
/
prediv1factor
)
*
pllmull
;
#else
/* HSE selected as PLL clock entry */
if
((
RCC
->
CFGR
&
RCC_CFGR_PLLXTPRE
)
!=
(
uint32_t
)
RESET
)
{
/* HSE oscillator clock divided by 2 */
SystemCoreClock
=
(
HSE_VALUE
>>
1U
)
*
pllmull
;
}
else
{
SystemCoreClock
=
HSE_VALUE
*
pllmull
;
}
#endif
}
#else
pllmull
=
pllmull
>>
18U
;
if
(
pllmull
!=
0x0DU
)
{
pllmull
+=
2U
;
}
else
{
/* PLL multiplication factor = PLL input clock * 6.5 */
pllmull
=
13U
/
2U
;
}
if
(
pllsource
==
0x00U
)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock
=
(
HSI_VALUE
>>
1U
)
*
pllmull
;
}
else
{
/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source
=
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV1SRC
;
prediv1factor
=
(
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV1
)
+
1U
;
if
(
prediv1source
==
0U
)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock
=
(
HSE_VALUE
/
prediv1factor
)
*
pllmull
;
}
else
{
/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor
=
((
RCC
->
CFGR2
&
RCC_CFGR2_PREDIV2
)
>>
4U
)
+
1U
;
pll2mull
=
((
RCC
->
CFGR2
&
RCC_CFGR2_PLL2MUL
)
>>
8U
)
+
2U
;
SystemCoreClock
=
(((
HSE_VALUE
/
prediv2factor
)
*
pll2mull
)
/
prediv1factor
)
*
pllmull
;
}
}
#endif
/* STM32F105xC */
break
;
default:
SystemCoreClock
=
HSI_VALUE
;
break
;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp
=
AHBPrescTable
[((
RCC
->
CFGR
&
RCC_CFGR_HPRE
)
>>
4U
)];
/* HCLK clock frequency */
SystemCoreClock
>>=
tmp
;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void
SystemInit_ExtMemCtl
(
void
)
{
__IO
uint32_t
tmpreg
;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC
->
AHBENR
=
0x00000114U
;
/* Delay after an RCC peripheral clock enabling */
tmpreg
=
READ_BIT
(
RCC
->
AHBENR
,
RCC_AHBENR_FSMCEN
);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC
->
APB2ENR
=
0x000001E0U
;
/* Delay after an RCC peripheral clock enabling */
tmpreg
=
READ_BIT
(
RCC
->
APB2ENR
,
RCC_APB2ENR_IOPDEN
);
(
void
)(
tmpreg
);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD
->
CRL
=
0x44BB44BBU
;
GPIOD
->
CRH
=
0xBBBBBBBBU
;
GPIOE
->
CRL
=
0xB44444BBU
;
GPIOE
->
CRH
=
0xBBBBBBBBU
;
GPIOF
->
CRL
=
0x44BBBBBBU
;
GPIOF
->
CRH
=
0xBBBB4444U
;
GPIOG
->
CRL
=
0x44BBBBBBU
;
GPIOG
->
CRH
=
0x444B4B44U
;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1
->
BTCR
[
4U
]
=
0x00001091U
;
FSMC_Bank1
->
BTCR
[
5U
]
=
0x00110212U
;
}
#endif
/* DATA_IN_ExtSRAM */
#endif
/* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bsp/stm32/stm32f091-nucleo/board/Kconfig
0 → 100644
浏览文件 @
78fc9b44
menu "Hardware Drivers Config"
config SOC_STM32F091RC
bool
select SOC_SERIES_STM32F0
default y
menu "Onboard Peripheral Drivers"
config BSP_USING_USB_TO_USART
bool "Enable USB TO USART (uart2)"
select BSP_USING_UART2
default y
endmenu
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
config BSP_USING_UART1
bool "Enable UART1"
select RT_USING_SERIAL
default n
config BSP_USING_UART2
bool "Enable UART2"
select RT_USING_SERIAL
default y
config BSP_USING_SPI1
bool "Enable SPI1 BUS"
select RT_USING_SPI
default n
menuconfig BSP_USING_I2C1
bool "Enable I2C1 BUS (software simulation)"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
if BSP_USING_I2C1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 1 216
default 34
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 1 216
default 35
endif
menuconfig BSP_USING_TIM
bool "Enable timer"
default n
select RT_USING_HWTIMER
if BSP_USING_TIM
config BSP_USING_TIM14
bool "Enable TIM14"
default n
config BSP_USING_TIM16
bool "Enable TIM16"
default n
config BSP_USING_TIM17
bool "Enable TIM17"
default n
endif
menuconfig BSP_USING_PWM
bool "Enable pwm"
default n
select RT_USING_PWM
if BSP_USING_PWM
menuconfig BSP_USING_PWM2
bool "Enable timer2 output pwm"
default n
if BSP_USING_PWM2
config BSP_USING_PWM2_CH4
bool "Enable PWM2 channel4"
default n
endif
endif
menuconfig BSP_USING_ADC
bool "Enable ADC"
default n
select RT_USING_ADC
if BSP_USING_ADC
config BSP_USING_ADC1
bool "Enable ADC1"
default n
endif
config BSP_USING_ON_CHIP_FLASH
bool "Enable on-chip FLASH"
default n
config BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC
select RT_USING_LIBC
default n
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
endmenu
menu "Board extended module Drivers"
endmenu
endmenu
bsp/stm32/stm32f091-nucleo/board/SConscript
0 → 100644
浏览文件 @
78fc9b44
import
os
import
rtconfig
from
building
import
*
Import
(
'SDK_LIB'
)
cwd
=
GetCurrentDir
()
# add general drivers
src
=
Split
(
'''
board.c
CubeMX_Config/Src/stm32f0xx_hal_msp.c
'''
)
path
=
[
cwd
]
path
+=
[
cwd
+
'/ports'
]
path
+=
[
cwd
+
'/CubeMX_Config/Inc'
]
startup_path_prefix
=
SDK_LIB
if
rtconfig
.
CROSS_TOOL
==
'gcc'
:
src
+=
[
startup_path_prefix
+
'/STM32F0xx_HAL/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc/startup_stm32f091xc.s'
]
elif
rtconfig
.
CROSS_TOOL
==
'keil'
:
src
+=
[
startup_path_prefix
+
'/STM32F0xx_HAL/CMSIS/Device/ST/STM32F0xx/Source/Templates/arm/startup_stm32f091xc.s'
]
elif
rtconfig
.
CROSS_TOOL
==
'iar'
:
src
+=
[
startup_path_prefix
+
'/STM32F0xx_HAL/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/startup_stm32f091xc.s'
]
CPPDEFINES
=
[
'STM32F091xC'
]
group
=
DefineGroup
(
'Drivers'
,
src
,
depend
=
[
''
],
CPPPATH
=
path
,
CPPDEFINES
=
CPPDEFINES
)
Return
(
'group'
)
bsp/stm32/stm32f091-nucleo/board/board.c
0 → 100644
浏览文件 @
78fc9b44
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-21 zylx first version
*/
#include "board.h"
void
SystemClock_Config
(
void
)
{
RCC_OscInitTypeDef
RCC_OscInitStruct
=
{
0
};
RCC_ClkInitTypeDef
RCC_ClkInitStruct
=
{
0
};
RCC_PeriphCLKInitTypeDef
PeriphClkInit
=
{
0
};
/**Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess
();
__HAL_RCC_LSEDRIVE_CONFIG
(
RCC_LSEDRIVE_HIGH
);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct
.
OscillatorType
=
RCC_OSCILLATORTYPE_HSI
|
RCC_OSCILLATORTYPE_HSI14
|
RCC_OSCILLATORTYPE_LSI
|
RCC_OSCILLATORTYPE_LSE
;
RCC_OscInitStruct
.
LSEState
=
RCC_LSE_ON
;
RCC_OscInitStruct
.
HSIState
=
RCC_HSI_ON
;
RCC_OscInitStruct
.
HSI14State
=
RCC_HSI14_ON
;
RCC_OscInitStruct
.
HSICalibrationValue
=
RCC_HSICALIBRATION_DEFAULT
;
RCC_OscInitStruct
.
HSI14CalibrationValue
=
16
;
RCC_OscInitStruct
.
LSIState
=
RCC_LSI_ON
;
RCC_OscInitStruct
.
PLL
.
PLLState
=
RCC_PLL_ON
;
RCC_OscInitStruct
.
PLL
.
PLLSource
=
RCC_PLLSOURCE_HSI
;
RCC_OscInitStruct
.
PLL
.
PLLMUL
=
RCC_PLL_MUL6
;
RCC_OscInitStruct
.
PLL
.
PREDIV
=
RCC_PREDIV_DIV1
;
if
(
HAL_RCC_OscConfig
(
&
RCC_OscInitStruct
)
!=
HAL_OK
)
{
Error_Handler
();
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct
.
ClockType
=
RCC_CLOCKTYPE_HCLK
|
RCC_CLOCKTYPE_SYSCLK
|
RCC_CLOCKTYPE_PCLK1
;
RCC_ClkInitStruct
.
SYSCLKSource
=
RCC_SYSCLKSOURCE_PLLCLK
;
RCC_ClkInitStruct
.
AHBCLKDivider
=
RCC_SYSCLK_DIV1
;
RCC_ClkInitStruct
.
APB1CLKDivider
=
RCC_HCLK_DIV1
;
if
(
HAL_RCC_ClockConfig
(
&
RCC_ClkInitStruct
,
FLASH_LATENCY_1
)
!=
HAL_OK
)
{
Error_Handler
();
}
PeriphClkInit
.
PeriphClockSelection
=
RCC_PERIPHCLK_USART1
|
RCC_PERIPHCLK_USART2
|
RCC_PERIPHCLK_RTC
;
PeriphClkInit
.
Usart1ClockSelection
=
RCC_USART1CLKSOURCE_PCLK1
;
PeriphClkInit
.
Usart2ClockSelection
=
RCC_USART2CLKSOURCE_PCLK1
;
PeriphClkInit
.
RTCClockSelection
=
RCC_RTCCLKSOURCE_LSE
;
if
(
HAL_RCCEx_PeriphCLKConfig
(
&
PeriphClkInit
)
!=
HAL_OK
)
{
Error_Handler
();
}
}
bsp/stm32/stm32f091-nucleo/board/board.h
0 → 100644
浏览文件 @
78fc9b44
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-5 SummerGift change to new framework
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <rtthread.h>
#include <stm32f0xx.h>
#include "drv_common.h"
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
#define STM32_FLASH_SIZE (256 * 1024)
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
/* Internal SRAM memory size[Kbytes] <16-256>, Default: 64*/
#define STM32_SRAM_SIZE 32
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
#ifdef __CC_ARM
extern
int
Image
$$
RW_IRAM1
$$
ZI
$$
Limit
;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern
int
__bss_end
;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END STM32_SRAM_END
void
SystemClock_Config
(
void
);
#endif
/* __BOARD_H__ */
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.icf
0 → 100644
浏览文件 @
78fc9b44
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x08040000;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20008000;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x0400;
define symbol __ICFEDIT_size_heap__ = 0x0000;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite, last block CSTACK};
\ No newline at end of file
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.lds
0 → 100644
浏览文件 @
78fc9b44
/*
* linker script for STM32F10x with GNU ld
*/
/* Program Entry, set to mark it as "used" and avoid gc */
MEMORY
{
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 256k /* 256kB flash */
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 32k /* 32K sram */
}
ENTRY(Reset_Handler)
_system_stack_size = 0x200;
SECTIONS
{
.text :
{
. = ALIGN(4);
_stext = .;
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
*(.text) /* remaining code */
*(.text.*) /* remaining code */
*(.rodata) /* read-only data (constants) */
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.gnu.linkonce.t*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* section information for initial. */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
. = ALIGN(4);
_etext = .;
} > ROM = 0
/* .ARM.exidx is sorted, so has to go in its own output section. */
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
/* This is used by the startup in order to initialize the .data secion */
_sidata = .;
} > ROM
__exidx_end = .;
/* .data section which is used for initialized data */
.data : AT (_sidata)
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_sdata = . ;
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM
.stack :
{
. = ALIGN(4);
_sstack = .;
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM
__bss_start = .;
.bss :
{
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_sbss = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
/* This is used by the startup in order to initialize the .bss secion */
_ebss = . ;
*(.bss.init)
} > RAM
__bss_end = .;
_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
* Symbols in the DWARF debugging sections are relative to the beginning
* of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
}
bsp/stm32/stm32f091-nucleo/board/linker_scripts/link.sct
0 → 100644
浏览文件 @
78fc9b44
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x08000000 0x00040000 { ; load region size_region
ER_IROM1 0x08000000 0x00040000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x00008000 { ; RW data
.ANY (+RW +ZI)
}
}
bsp/stm32/stm32f091-nucleo/board/ports/fal_cfg.h
0 → 100644
浏览文件 @
78fc9b44
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-8 zylx first version
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtthread.h>
#include <board.h>
extern
const
struct
fal_flash_dev
stm32_onchip_flash
;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&stm32_onchip_flash, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash", 0, 240 * 1024, 0}, \
{FAL_PART_MAGIC_WROD, "param", "onchip_flash", 240* 1024 , 16 * 1024, 0}, \
}
#endif
/* FAL_PART_HAS_TABLE_CFG */
#endif
/* _FAL_CFG_H_ */
bsp/stm32/stm32f091-nucleo/figures/board.jpg
0 → 100644
浏览文件 @
78fc9b44
132.1 KB
bsp/stm32/stm32f091-nucleo/project.ewd
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/project.ewp
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/project.eww
0 → 100644
浏览文件 @
78fc9b44
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>
$WS_DIR$\project.ewp
</path>
</project>
<batchBuild/>
</workspace>
bsp/stm32/stm32f091-nucleo/project.uvopt
0 → 100644
浏览文件 @
78fc9b44
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt
xmlns:xsi=
"http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation=
"project_opt.xsd"
>
<SchemaVersion>
1.0
</SchemaVersion>
<Header>
### uVision Project, (C) Keil Software
</Header>
<Extensions>
<cExt>
*.c
</cExt>
<aExt>
*.s*; *.src; *.a*
</aExt>
<oExt>
*.obj
</oExt>
<lExt>
*.lib
</lExt>
<tExt>
*.txt; *.h; *.inc
</tExt>
<pExt>
*.plm
</pExt>
<CppX>
*.cpp
</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>
0
</dwLowDateTime>
<dwHighDateTime>
0
</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>
rt-thread
</TargetName>
<ToolsetNumber>
0x4
</ToolsetNumber>
<ToolsetName>
ARM-ADS
</ToolsetName>
<TargetOption>
<CLKADS>
8000000
</CLKADS>
<OPTTT>
<gFlags>
1
</gFlags>
<BeepAtEnd>
1
</BeepAtEnd>
<RunSim>
1
</RunSim>
<RunTarget>
0
</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>
1
</HexSelection>
<FlashByte>
65535
</FlashByte>
<HexRangeLowAddress>
0
</HexRangeLowAddress>
<HexRangeHighAddress>
0
</HexRangeHighAddress>
<HexOffset>
0
</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>
79
</PageWidth>
<PageLength>
66
</PageLength>
<TabStop>
8
</TabStop>
<ListingPath>
.\build\keil\List\
</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>
1
</CreateCListing>
<CreateAListing>
1
</CreateAListing>
<CreateLListing>
1
</CreateLListing>
<CreateIListing>
0
</CreateIListing>
<AsmCond>
1
</AsmCond>
<AsmSymb>
1
</AsmSymb>
<AsmXref>
0
</AsmXref>
<CCond>
1
</CCond>
<CCode>
0
</CCode>
<CListInc>
0
</CListInc>
<CSymb>
0
</CSymb>
<LinkerCodeListing>
0
</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>
1
</LMap>
<LComments>
1
</LComments>
<LGenerateSymbols>
1
</LGenerateSymbols>
<LLibSym>
1
</LLibSym>
<LLines>
1
</LLines>
<LLocSym>
1
</LLocSym>
<LPubSym>
1
</LPubSym>
<LXref>
0
</LXref>
<LExpSel>
0
</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>
0
</tvExp>
<tvExpOptDlg>
0
</tvExpOptDlg>
<IsCurrentTarget>
1
</IsCurrentTarget>
</OPTFL>
<CpuCode>
0
</CpuCode>
<DebugOpt>
<uSim>
0
</uSim>
<uTrg>
1
</uTrg>
<sLdApp>
1
</sLdApp>
<sGomain>
1
</sGomain>
<sRbreak>
1
</sRbreak>
<sRwatch>
1
</sRwatch>
<sRmem>
1
</sRmem>
<sRfunc>
1
</sRfunc>
<sRbox>
1
</sRbox>
<tLdApp>
1
</tLdApp>
<tGomain>
1
</tGomain>
<tRbreak>
1
</tRbreak>
<tRwatch>
1
</tRwatch>
<tRmem>
1
</tRmem>
<tRfunc>
0
</tRfunc>
<tRbox>
1
</tRbox>
<tRtrace>
0
</tRtrace>
<sRSysVw>
1
</sRSysVw>
<tRSysVw>
1
</tRSysVw>
<tPdscDbg>
0
</tPdscDbg>
<sRunDeb>
0
</sRunDeb>
<sLrtime>
0
</sLrtime>
<nTsel>
6
</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>
Segger\JL2CM3.dll
</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>
0
</Number>
<Key>
JL2CM3
</Key>
<Name>
-U30000299 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000
</Name>
</SetRegEntry>
<SetRegEntry>
<Number>
0
</Number>
<Key>
UL2CM3
</Key>
<Name>
UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)
</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>
0
</THDelay>
</Tracepoint>
<DebugFlag>
<trace>
0
</trace>
<periodic>
0
</periodic>
<aLwin>
0
</aLwin>
<aCover>
0
</aCover>
<aSer1>
0
</aSer1>
<aSer2>
0
</aSer2>
<aPa>
0
</aPa>
<viewmode>
0
</viewmode>
<vrSel>
0
</vrSel>
<aSym>
0
</aSym>
<aTbox>
0
</aTbox>
<AscS1>
0
</AscS1>
<AscS2>
0
</AscS2>
<AscS3>
0
</AscS3>
<aSer3>
0
</aSer3>
<eProf>
0
</eProf>
<aLa>
0
</aLa>
<aPa1>
0
</aPa1>
<AscS4>
0
</AscS4>
<aSer4>
0
</aSer4>
<StkLoc>
0
</StkLoc>
<TrcWin>
0
</TrcWin>
<newCpu>
0
</newCpu>
<uProt>
0
</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>
bsp/stm32/stm32f091-nucleo/project.uvoptx
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/project.uvprojx
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/rtconfig.h
0 → 100644
浏览文件 @
78fc9b44
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDEL_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
#define RT_DEBUG
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart2"
#define RT_VER_NUM 0x40000
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M0
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define FINSH_USING_MSH_ONLY
#define FINSH_ARG_MAX 10
/* Device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
#define RT_USING_PIN
/* Using WiFi */
/* Using USB */
/* POSIX layer and C standard library */
/* Network */
/* Socket abstraction layer */
/* light weight TCP/IP stack */
/* Modbus master and slave stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
/* ARM CMSIS */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* tools packages */
/* system packages */
/* peripheral libraries and drivers */
/* miscellaneous packages */
/* sample package */
/* samples: kernel and components samples */
/* example package: hello */
/* Privated Packages of RealThread */
/* Network Utilities */
#define SOC_FAMILY_STM32
#define SOC_SERIES_STM32F0
/* Hardware Drivers Config */
#define SOC_STM32F091RC
/* Onboard Peripheral Drivers */
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define BSP_USING_UART2
/* Board extended module Drivers */
#endif
bsp/stm32/stm32f091-nucleo/rtconfig.py
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/template.ewd
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/template.ewp
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/template.eww
0 → 100644
浏览文件 @
78fc9b44
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>
$WS_DIR$\template.ewp
</path>
</project>
<batchBuild/>
</workspace>
bsp/stm32/stm32f091-nucleo/template.uvgui.zylx
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/template.uvoptx
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
bsp/stm32/stm32f091-nucleo/template.uvprojx
0 → 100644
浏览文件 @
78fc9b44
此差异已折叠。
点击以展开。
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录