* Add a new test case for conv operator (#329)

This new test case is based on issue #329 to increase
coverage on optimized kernel's data precision for conv operator.
In this test, input, output and filter are all 8 bits and filter
tensor is of dimension 8x3x3x3 with different scales per output channel.

TESTED= local test with x86 and HiFi4.

* Move large test data variable into its own folder
and use one flat top namespace instead of nested namespace.

BUG=195779890

* REF_CODE_REFACTOR: hard_swish
Refactoring the reference code for hard_swish operator.

BUG=refactoring existing code.

* Remove uint8 support.

* fix formatting.
Co-authored-by: NAdvait Jain <advaitjain@google.com>

* REF_CODE_REFACTOR: logicalAND and logicalOR
Refactoring the reference code for logicalAND and logicalOR operators.

BUG=refactoring existing code.

* Fix formatting.

* fix bad merge (copyright year).
Co-authored-by: NAdvait Jain <advaitjain@google.com>
Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>

* REF_CODE_REFACTOR: logistic
Refactoring the reference code for logistic operator.

BUG=refactoring existing code.

* Fix formatting
Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>
Co-authored-by: NAdvait Jain <advaitjain@google.com>

* REF_CODE_REFACTOR: activations.cc

Refactoring the reference code for activations operators.

BUG=refactoring existing code.

* Remove uint8 support.

* Ran `test_code_style.sh --fix_formatting`

* Fix the build.
Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>
Co-authored-by: NAdvait Jain <advaitjain@google.com>

- Save ~4KB of RAM by implementing a lightweight version of the vector, which only accesses integer values, without implicit conversion.
- Change Micro kernels to access flexbuffers as vectors instead of maps, which is recommended by the flexbuffers doc for efficiency. Since the values in the vector are ordered alphabetically by their keys, the kernels can access them by index instead.
- Revert detection_postprocess to the native flexbuffers API. The
LiteVector API doesn't support IsNull() and I prefer not to support two
custom flexbuffer APIs.
Co-authored-by: NNat Jeffries <natmjeffries@gmail.com>

* Remove MICROLITE_CC_KERNELS_SRCS from the MICROLITE_CC_SRCS list.

Stop the kernel sources from being compiled into both the core
objects and kernel objects.

* Add kernel sources to list_library_sources

* Fix project generation presubmit
Co-authored-by: NNat Jeffries <natmjeffries@gmail.com>

Previously, some sources were built before THIRD_PARTY_TARGETS was downloaded, meaning dependencies in those sources on flatbuffers, gemmlowp, etc could be missed. An alternative to this "dependency for every source" approach could be to add $(THIRD_PARTY_TARGETS) as the first dependency in $(MICROLITE_LIB_PATH), but this relies on Make dependency ordering which is ill-advised

Background: https://stackoverflow.com/questions/9159960/order-of-processing-components-in-makefile

- Add external lib references to Hexagon FFT functions

* share code with the cmsis implementation
 * groundwork needed to add in Xtensa implementation

BUG=https://github.com/tensorflow/tflite-micro/issues/205

* Remove lite-specific code from copy of SPACE_TO_DEPTH

Remove the bulk of lite-specific code from the micro
implementation of operator SPACE_TO_DEPTH.

-  Flatten namespace
-  Don't resize output tensors
-  Remove type other than int8 and float32
-  Don't use gtest

* Port operator SPACE_TO_DEPTH from lite

Port the SPACE_TO_DEPTH operator from lite to micro. Add the
operator and test to the build.
Co-authored-by: NPete Warden <pete@petewarden.com>

* Put location variables before target .inc's are included

They can be useful in the target .inc

Change-Id: I0ee3f77f79be272f4dc3502fb4a38017d8162fa1

* Add ARMC6 compiler support for Corstone-300 target

  * Use fromelf instead of objcopy for armclang toolchain when
    generating a binary
  * Add ARMC6 linker and build flags to the Corstone-330 target
  * Add RETARGET macro in patch script to avoid undefined symbol
    build error for ARMC6.
  * Use a reduced set of Cortex-M CPU's for easier maintenance.

Change-Id: Id9a20d57fa4fa0f1339f44523417e2dabfe7e152

* Review comment - Override exit symbol only for GCC

Change-Id: I93628c92ee352f36c7e7dd99351e4a73c29a8d30

* Review comment - Change how to pass linker options for ARMC6

Change-Id: Iacec5a6df6902bc8a14f460d63ae917039f982cc

* Review comment - correct the upmerge

Change-Id: I9a250f6a444336f9b95428a126a94a18f40060dc
Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>

For the Xtensa docker container, we were getting an error message along the lines of python not found. And the result was that the specialization was happening incorrectly (i.e. the specialization for the kernels was failing since it relies on python since #160).

#182 is likely the reason why this error passed the CI for #160 but started failing after.

* Separate core, kernel and third party objects.

Add a second optimization level in the Makefile to enable different
levels between kernels and the rest of the TFLM code. This results in a
smaller binary with minimal performance impact compared with using a
single optimization level.

Allows the use of implicit patterns to compile all sources, choosing
different flags for core, kernel and third party sources.

The following measurements are taken using the hexagon toolchain +
hexagon-size and hexagon-sim.

For the keyword benchmark using -O2:
   text    data     bss     dec
  58140   37639   46612  142391

  Cycles: 1700364

For the keyword benchmark using -O2 for kernels and -Oz for framework:
   text    data     bss     dec
  52796   37623   46612  137031

  Cycles: 1759664

* Make the optimization level log an error.

Remove OPTIMIZATION_LEVEL setting for bluepill since core framework now automatically is compiled with -Os.

* Remove section that builds bluepill with -Os since default uses -Os.

* Disable -Werror=vla in order to pass stm32 bare lib presubmit.

* Chnage order so that -Wno-vla takes priority over -Wvla
Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>

* Add Hexagon optimized kernels.

 * Hexagon optimized kernels copied from https://source.codeaurora.org/quic/embedded_ai/tensorflow at 2d052806c211144875c89315a4fc6f1393064cf6
 * Changed the include paths and directory structure a bit.
 * Modified Makefile to allow optimized kernels to be in a separate directory
 * Path to the Hexagon lib is now specified on the command line.

Verified that the optimized kernels are properly built and linked with:

```
make -f tensorflow/lite/micro/tools/make/Makefile TARGET=hexagon OPTIMIZED_KERNEL_DIR=hexagon OPTIMIZED_KERNEL_DIR_PREFIX=third_party HEXAGON_TFLM_LIB=~/Qualcomm/tflm_google/hexagon_tflm_core.a  -j8 run_keyword_benchmark
```

Gives:
```
KeywordRunNIerations(1) took 52608 ticks (52 ms)
```

Whereas reference kernels with:
```
make -f tensorflow/lite/micro/tools/make/Makefile TARGET=hexagon  -j8 run_keyword_benchmark
```

Gives:
```
KeywordRunNIerations(1) took 110248 ticks (110 ms)
```

BUG=http://b/190754463

* enable code style checks for third_party as well.

* clang-formatted the hexagon kernels.

* Rename to keep scope focused on what we currently need.

* The TFLM Makefile globs all the shared TFL/TFLM code.
 * This allows us to move the explicit list of sources and headers to the
   sync script since that is where we determine what code needs to be
   sync'd from upstream TF.

With this change, we are ready to have the tflite_micro repository be
the source of truth for all TFLM code and sync only the shared TFL/TFLM
code from the tensorflow repo.

Bug: http://b/182914089

* Port TFL kernel Gather to TFL Micro

* Remove TODO comment in micro/kernel/gather.cc
Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>

Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>

Co-authored-by: NAdvait Jain <advaitjain@users.noreply.github.com>

Confirmed that the following command passes:
```
./tensorflow/lite/micro/tools/ci_build/test_all_new.sh GITHUB_PRESUBMIT
```