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Current end-to-end example test align flatbuffer to 16 byte.
We should do the same for unit test as well.

BUG=observe micro_allocator_test due to memory misalignment
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

* Minor update to `CONTRIBUTING.md` on cpplint installation.

`cpplint` can be installed via `pip` as well as getting a local copy.
Improving documentation to include the `pip` alternative.

* Minor update to `CONTRIBUTING.md` on cpplint installation.

`cpplint` can be installed via `pip` as well as getting a local copy.
Improving documentation to include the `pip` alternative.

BUG=

* Change pip3 to pip
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

Add missing include header that is causing a internal compilation
issue. This is a backport of patch in cl/439828828.

BUG=observe compilation issue when importing
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Importing third_party/hexagon from codelinario at commit:
5bee22654219b89efdd35e447cc89d50369ad168

This is generated by running ci/import_third_party_hexagon.sh

BUG=https://b/227665919

Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

* MicroAllocator interacts with SimpleMemoryAllocator via defined buffer interface.

This PR abstract out the interface of SimpleMemoryAllocator into two
interface class. MicroAllocator interacts with SimpleMemoryAllocator
through these two interface classes.
This decouple will enable us to replace SimpleMemoryAllocator with other
arena buffer manager.

BUG=http://b/226971240

* Update based on comments

* Fix format warning and microprint compiler error in xtensa/svdf

Sync to tip of repo leads to these errors.
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

* Add int8 and float SVDF for non-HiFi Xtensa

The Xtensa accelerated SVDF implementation is only supported on HiFi, so
it falls back to the reference implementation on VP6. This was hardcoded
to an int16 implementation in xtensa/svdf.cc, as the HiFi accelerated
implementation only supports int16. This PR enables float and int8
support when falling back on the reference implementation. This is only
impacts non-HiFi Xtensa cores, such as the VP6

BUG=b/225235693

* Replace TF_LITE_KERNEL_LOG with MicroPrintf
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

Some model validation tests are failing when the conv.cc optimization is
enabled. Exclude the conv.cc optimization so that other optimizations
may by used while the issue with conv.cc is debugged.

* Add support in Xtensa variant of Quantize op for int8 to int16
quantization

BUG=209926304

* Format to please the code style checker.
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

BUG=https://b/227665919

Bias vector can be nullptr in tranpose_conv; hence
should do a check before deallocate.

BUG=#993
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

* Added depthwise conv support on Vision P6

* replace tabs with spaces and adjust indentation

* Remove unnecessary tab

* Format change using clang-format

* Update xtensa_download.sh
Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>
Co-authored-by: NTing Yan <tingyan@google.com>

Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>

* Quantization specific registration for CMSIS-NN

Adds int8 and int16x8 specific registrations for conv kernel.

Person detect example is updated with int8 specific
registration for conv. It will result in a smaller memory footprint
for kernels that support this. For kernels that not support it the
default registration will be used.

Also 16x8 conv unit tests are updated with specific 16x8
registration. For kernels that do not have this it will default to
default registration.

Change-Id: I412cc472e56a0835ed662525dfd7768a920590bb

* Address review comments
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* Add u65 option for building Ethos-U core drivers

Change-Id: Ibf1d83d87af20a9c6533bbaaf71bb0c21a4c8710

* Clean up Ethos-U CC flags

Change-Id: I37f052800125988eb28135eec23939c00b7177b9

* Bump downloaded Ethos-U version to 22.02 release

Change-Id: I9febf7a67492fd7f9f58b833e561fa3cf645dda5
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Porting the changes from http://cl/436387753 to GitHub

BUG=cleanup

tflite_micro does not directly use schema.fbs to generate header file,
but it provides good documentation value and is required by some
projects.

BUG=https://b/226974950

* Add Xtensa kernels for PAD, SUB and STRIDED SLICE

* Change CRLF end-of-line to LF

* Correct copyright year from 2019 to 2022

* Improve readability of #ifdef branches

* More corrections to copyright year

* Remove obsolete common.c

As noted in PR #935,  upstream rename common.cc to common.c.
PR #935 import common.cc, but did not remove common.c.
This PR removes common.c from tflite_micro repo.

BUG=offline observation

* Update BUILD

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Co-authored-by: NTing Yan <94130036+tingyan19@users.noreply.github.com>