[imxrt1170]update sdk files (#6405)

* update sdk files * add dcd config * format files * formating file

[imxrt1170]update sdk files (#6405)
* update sdk files * add dcd config * format files * formating file
8317b905 · o777788 · GitHub · ba4ffc20 · 8317b905 · 8317b905
5 changed file
--- a/bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/MCUX_Config.mex
+++ b/bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/MCUX_Config.mex
 <?xml version="1.0" encoding= "UTF-8" ?>
-<configuration name="" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9 http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9.xsd" uuid="2789973b-4e08-461b-a604-ca74c2c2a2cf" version="1.9" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_1.9" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+<configuration name="" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_12 http://mcuxpresso.nxp.com/XSD/mex_configuration_12.xsd" uuid="2789973b-4e08-461b-a604-ca74c2c2a2cf" version="12" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_12" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
   <common>
      <processor>MIMXRT1176xxxxx</processor>
      <package>MIMXRT1176DVMAA</package>
@@ -14,11 +14,13 @@
      <validate_boot_init_only>true</validate_boot_init_only>
      <generate_extended_information>false</generate_extended_information>
      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <update_include_paths>true</update_include_paths>
+      <generate_registers_defines>false</generate_registers_defines>
   </preferences>
   <tools>
-      <pins name="Pins" version="9.0" enabled="true" update_project_code="true">
+      <pins name="Pins" version="12.0" enabled="true" update_project_code="true">
         <pins_profile>
-            <processor_version>0.9.2</processor_version>
+            <processor_version>12.0.0</processor_version>
            <power_domains/>
         </pins_profile>
         <functions_list>
@@ -35,6 +37,11 @@
                        <data>true</data>
                     </feature>
                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="ARM" description="Peripheral ARM is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
                     <feature name="enabled" evaluation="equal" configuration="cm7">
                        <data>true</data>
@@ -81,15 +88,106 @@
            </function>
         </functions_list>
      </pins>
-      <clocks name="Clocks" version="7.0" enabled="true" update_project_code="true">
+      <clocks name="Clocks" version="10.0" enabled="true" update_project_code="true">
         <clocks_profile>
-            <processor_version>0.8.1</processor_version>
+            <processor_version>12.0.0</processor_version>
         </clocks_profile>
         <clock_configurations>
-            <clock_configuration name="BOARD_BootClockRUN">
+            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
               <description></description>
               <options/>
-               <dependencies/>
+               <dependencies>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.xtali" description="&apos;XTALI&apos; (Pins tool id: ANADIG.xtali, Clocks tool id: ANADIG_OSC.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.xtali" description="&apos;XTALI&apos; (Pins tool id: ANADIG.xtali, Clocks tool id: ANADIG_OSC.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.xtalo" description="&apos;XTALO&apos; (Pins tool id: ANADIG.xtalo, Clocks tool id: ANADIG_OSC.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.xtalo" description="&apos;XTALO&apos; (Pins tool id: ANADIG.xtalo, Clocks tool id: ANADIG_OSC.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: ANADIG.rtc_xtali, Clocks tool id: ANADIG_OSC.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: ANADIG.rtc_xtali, Clocks tool id: ANADIG_OSC.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: ANADIG.rtc_xtalo, Clocks tool id: ANADIG_OSC.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="ANADIG.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: ANADIG.rtc_xtalo, Clocks tool id: ANADIG_OSC.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm4">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm7">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm4">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm7">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.dcdc_soc" description="Clocks initialization requires the DCDC_SOC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm4">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.dcdc_soc" description="Clocks initialization requires the DCDC_SOC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm7">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.pmu_1" description="Clocks initialization requires the PMU_1 Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm4">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.pmu_1" description="Clocks initialization requires the PMU_1 Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm7">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm4">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
+                     <feature name="enabled" evaluation="equal" configuration="cm7">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
               <clock_sources/>
               <clock_outputs>
                  <clock_output id="ACMP_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
@@ -123,7 +221,6 @@
                  <clock_output id="ENET_TIMER1_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="ENET_TIMER2_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="ENET_TIMER3_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
-                  <clock_output id="ENET_TX_CLK.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXIO2_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
                  <clock_output id="FLEXSPI1_CLK_ROOT.outFreq" value="24 MHz" locked="false" accuracy=""/>
@@ -259,7 +356,7 @@
      </clocks>
      <dcdx name="DCDx" version="3.0" enabled="true" update_project_code="true">
         <dcdx_profile>
-            <processor_version>0.9.2</processor_version>
+            <processor_version>12.0.0</processor_version>
            <output_format>c_array</output_format>
         </dcdx_profile>
         <dcdx_configurations>
@@ -444,16 +541,23 @@
            </dcdx_configuration>
         </dcdx_configurations>
      </dcdx>
-      <periphs name="Peripherals" version="9.0" enabled="true" update_project_code="true">
+      <periphs name="Peripherals" version="11.0" enabled="true" update_project_code="true">
         <peripherals_profile>
-            <processor_version>0.9.2</processor_version>
+            <processor_version>12.0.0</processor_version>
         </peripherals_profile>
         <functional_groups>
            <functional_group name="BOARD_InitPeripherals" uuid="7ee8fc36-68c9-403c-a923-44701e1362da" called_from_default_init="true" id_prefix="" core="cm7">
               <description></description>
               <options/>
               <dependencies/>
-               <instances/>
+               <instances>
+                  <instance name="NVIC" uuid="d4faf8dc-cf39-4bc4-9458-32aa9a8abad5" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
            </functional_group>
         </functional_groups>
         <components>
@@ -472,14 +576,21 @@
            <component name="generic_can" uuid="72d70388-6163-458b-9bd7-e49b1b8c0e60" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
               <config_set_global name="global_can"/>
            </component>
+            <component name="uart_cmsis_common" uuid="7caa4732-5e54-4482-8d2b-2648eb52adab" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="c2f350f4-c700-4bc8-8fb1-aa56fd3533d1" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+            <component name="generic_enet" uuid="77d2c2b6-f8f5-4d79-9870-5662fd323401" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
+               <config_set_global name="global_enet"/>
+            </component>
         </components>
      </periphs>
      <tee name="TEE" version="3.0" enabled="false" update_project_code="true">
         <tee_profile>
            <processor_version>N/A</processor_version>
         </tee_profile>
-         <global_options/>
-         <user_memory_regions/>
      </tee>
   </tools>
-</configuration>
+</configuration>
\ No newline at end of file
--- a/bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/clock_config.c
+++ b/bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/clock_config.c
 /*
- * Copyright 2020-2021 NXP
+ * Copyright 2020-2022 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
@@ -18,12 +18,11 @@

 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Clocks v8.0
+product: Clocks v10.0
 processor: MIMXRT1176xxxxx
 package_id: MIMXRT1176DVMAA
 mcu_data: ksdk2_0
-processor_version: 0.8.1
-board: MIMXRT1170-EVK
+processor_version: 12.0.0
 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/

 #include "clock_config.h"
@@ -39,8 +38,6 @@ board: MIMXRT1170-EVK
 /*******************************************************************************
 * Variables
 ******************************************************************************/
-/* System clock frequency. */
-extern uint32_t SystemCoreClock;

 /*******************************************************************************
 ************************ BOARD_InitBootClocks function ************************
@@ -154,7 +151,7 @@ outputs:
 - {id: LPUART7_CLK_ROOT.outFreq, value: 24 MHz}
 - {id: LPUART8_CLK_ROOT.outFreq, value: 24 MHz}
 - {id: LPUART9_CLK_ROOT.outFreq, value: 24 MHz}
- {id: M4_CLK_ROOT.outFreq, value: 4320/11 MHz}
+- {id: M4_CLK_ROOT.outFreq, value: 240 MHz}
 - {id: M4_SYSTICK_CLK_ROOT.outFreq, value: 24 MHz}
 - {id: M7_CLK_ROOT.outFreq, value: 996 MHz}
 - {id: M7_SYSTICK_CLK_ROOT.outFreq, value: 100 kHz}
@@ -222,7 +219,8 @@ settings:
 - {id: ANADIG_PLL_SYS_PLL3_CTRL_POWERUP_CFG, value: Enabled}
 - {id: ANADIG_PLL_SYS_PLL3_CTRL_SYS_PLL3_DIV2_CFG, value: Enabled}
 - {id: CCM.CLOCK_ROOT0.MUX.sel, value: ANADIG_PLL.ARM_PLL_CLK}
- {id: CCM.CLOCK_ROOT1.MUX.sel, value: ANADIG_PLL.SYS_PLL3_PFD3_CLK}
+- {id: CCM.CLOCK_ROOT1.DIV.scale, value: '2', locked: true}
+- {id: CCM.CLOCK_ROOT1.MUX.sel, value: ANADIG_PLL.SYS_PLL3_CLK}
 - {id: CCM.CLOCK_ROOT2.DIV.scale, value: '2'}
 - {id: CCM.CLOCK_ROOT2.MUX.sel, value: ANADIG_PLL.SYS_PLL3_CLK}
 - {id: CCM.CLOCK_ROOT25.DIV.scale, value: '22'}
@@ -233,7 +231,7 @@ settings:
 - {id: CCM.CLOCK_ROOT3.MUX.sel, value: ANADIG_PLL.SYS_PLL3_CLK}
 - {id: CCM.CLOCK_ROOT4.DIV.scale, value: '3'}
 - {id: CCM.CLOCK_ROOT4.MUX.sel, value: ANADIG_PLL.SYS_PLL2_PFD1_CLK}
- {id: CCM.CLOCK_ROOT6.DIV.scale, value: '4'}
+- {id: CCM.CLOCK_ROOT6.DIV.scale, value: '4', locked: true}
 - {id: CCM.CLOCK_ROOT6.MUX.sel, value: ANADIG_PLL.SYS_PLL2_CLK}
 - {id: CCM.CLOCK_ROOT68.DIV.scale, value: '2'}
 - {id: CCM.CLOCK_ROOT68.MUX.sel, value: ANADIG_PLL.PLL_VIDEO_CLK}
@@ -366,6 +364,7 @@ void BOARD_BootClockRUN(void)
    rootCfg.div = 1;
    CLOCK_SetRootClock(kCLOCK_Root_M7_Systick, &rootCfg);
 #endif
+
 #if __CORTEX_M == 4
    rootCfg.mux = kCLOCK_M4_ClockRoot_MuxOscRc48MDiv2;
    rootCfg.div = 1;
@@ -435,26 +434,22 @@ void BOARD_BootClockRUN(void)
    CLOCK_SetRootClock(kCLOCK_Root_M7, &rootCfg);
 #endif

-    /* Configure M4 using SYS_PLL3_PFD3_CLK */
+    /* Configure M4 using SYS_PLL3_CLK */
 #if __CORTEX_M == 4
-    rootCfg.mux = kCLOCK_M4_ClockRoot_MuxSysPll3Pfd3;
-    rootCfg.div = 1;
+    rootCfg.mux = kCLOCK_M4_ClockRoot_MuxSysPll3Out;
+    rootCfg.div = 2;
    CLOCK_SetRootClock(kCLOCK_Root_M4, &rootCfg);
 #endif

    /* Configure BUS using SYS_PLL3_CLK */
-#if __CORTEX_M == 7
    rootCfg.mux = kCLOCK_BUS_ClockRoot_MuxSysPll3Out;
    rootCfg.div = 2;
    CLOCK_SetRootClock(kCLOCK_Root_Bus, &rootCfg);
-#endif

    /* Configure BUS_LPSR using SYS_PLL3_CLK */
-#if __CORTEX_M == 4
    rootCfg.mux = kCLOCK_BUS_LPSR_ClockRoot_MuxSysPll3Out;
    rootCfg.div = 3;
    CLOCK_SetRootClock(kCLOCK_Root_Bus_Lpsr, &rootCfg);
-#endif

    /* Configure SEMC using SYS_PLL2_PFD1_CLK */
 #ifndef SKIP_SEMC_INIT

--- a/bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/clock_config.h
+++ b/bsp/imxrt/imxrt1170-nxp-evk/board/MCUX_Config/clock_config.h
-/*
- * Copyright 2020-2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
 #ifndef _CLOCK_CONFIG_H_
 #define _CLOCK_CONFIG_H_

@@ -45,7 +38,7 @@ void BOARD_InitBootClocks(void);
 #if __CORTEX_M == 7
    #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 996000000UL /*!< CM7 Core clock frequency: 996000000Hz */
 #else
-    #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 392727272UL /*!< CM4 Core clock frequency: 392727272Hz */
+    #define BOARD_BOOTCLOCKRUN_CORE_CLOCK 240000000UL /*!< CM4 Core clock frequency: 240000000Hz */
 #endif

 /* Clock outputs (values are in Hz): */
@@ -127,7 +120,7 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_LPUART7_CLK_ROOT           24000000UL
 #define BOARD_BOOTCLOCKRUN_LPUART8_CLK_ROOT           24000000UL
 #define BOARD_BOOTCLOCKRUN_LPUART9_CLK_ROOT           24000000UL
-#define BOARD_BOOTCLOCKRUN_M4_CLK_ROOT                392727272UL
+#define BOARD_BOOTCLOCKRUN_M4_CLK_ROOT                240000000UL
 #define BOARD_BOOTCLOCKRUN_M4_SYSTICK_CLK_ROOT        24000000UL
 #define BOARD_BOOTCLOCKRUN_M7_CLK_ROOT                996000000UL
 #define BOARD_BOOTCLOCKRUN_M7_SYSTICK_CLK_ROOT        100000UL

--- a/bsp/imxrt/imxrt1170-nxp-evk/board/dcd.c
+++ b/bsp/imxrt/imxrt1170-nxp-evk/board/dcd.c
@@ -27,11 +27,11 @@ __attribute__((section(".boot_hdr.dcd_data"), used))

 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: DCDx V2.0
+product: DCDx v3.0
 processor: MIMXRT1176xxxxx
 package_id: MIMXRT1176DVMAA
 mcu_data: ksdk2_0
-processor_version: 0.0.0
+processor_version: 12.0.0
 output_format: c_array
 * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
 /* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */
@@ -40,7 +40,7 @@ const uint8_t dcd_data[] = {
    /* Tag */
    0xD2,
    /* Image Length */
-    0x05, 0x08,
+    0x05, 0x10,
    /* Version */
    0x41,

@@ -49,8 +49,8 @@ const uint8_t dcd_data[] = {
    /* group: 'Imported Commands' */
    /* #1.1-139, command header bytes for merged 'Write - value' command */
    0xCC, 0x04, 0x5C, 0x04,
-    /* #1.1, command: write_value, address: CCM_CLOCK_ROOT4_CONTROL, value: 0x703, size: 4 */
-    0x40, 0xCC, 0x02, 0x00, 0x00, 0x00, 0x07, 0x03,
+    /* #1.1, command: write_value, address: CCM_CLOCK_ROOT4_CONTROL, value: 0x602, size: 4 */
+    0x40, 0xCC, 0x02, 0x00, 0x00, 0x00, 0x06, 0x02,
    /* #1.2, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_00, value: 0x00, size: 4 */
    0x40, 0x0E, 0x80, 0x10, 0x00, 0x00, 0x00, 0x00,
    /* #1.3, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_B1_01, value: 0x00, size: 4 */
@@ -387,13 +387,12 @@ const uint8_t dcd_data[] = {
    0xC0, 0x00, 0x04, 0x00,
    /* #24, command: nop */
    0xC0, 0x00, 0x04, 0x00,
-    /* #25.1-2, command header bytes for merged 'Write - value' command */
-    0xCC, 0x00, 0x14, 0x04,
-    /* #25.1, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */
-    0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03,
-    /* #25.2, command: write_value, address: SEMC_SDRAMCR3, value: 0x21210409, size: 4 */
-    0x40, 0x0D, 0x40, 0x4C, 0x21, 0x21, 0x04, 0x09
-    };
+    /* #25, command: write_value, address: SEMC_INTR, value: 0x03, size: 4 */
+    0xCC, 0x00, 0x0C, 0x04, 0x40, 0x0D, 0x40, 0x3C, 0x00, 0x00, 0x00, 0x03,
+    /* #26, command: nop */
+    0xC0, 0x00, 0x04, 0x00,
+    /* #27, command: write_value, address: SEMC_SDRAMCR3, value: 0x21210409, size: 4 */
+    0xCC, 0x00, 0x0C, 0x04, 0x40, 0x0D, 0x40, 0x4C, 0x21, 0x21, 0x04, 0x09};
 /* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */

 #else

--- a/bsp/imxrt/imxrt1170-nxp-evk/board/dcd.h
+++ b/bsp/imxrt/imxrt1170-nxp-evk/board/dcd.h
@@ -17,8 +17,8 @@

 /*! @name Driver version */
 /*@{*/
-/*! @brief XIP_BOARD driver version 2.0.1. */
-#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
+/*! @brief XIP_BOARD driver version 2.0.0. */
+#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
 /*@}*/

 /*************************************