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49ef3cdc
编写于
3月 29, 2021
作者:
mysterywolf
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
[fh8620] auto formatted
上级
1ba020f3
变更
75
展开全部
隐藏空白更改
内联
并排
Showing
75 changed file
with
7944 addition
and
7944 deletion
+7944
-7944
bsp/fh8620/applications/main.c
bsp/fh8620/applications/main.c
+10
-10
bsp/fh8620/drivers/acw.c
bsp/fh8620/drivers/acw.c
+68
-68
bsp/fh8620/drivers/acw.h
bsp/fh8620/drivers/acw.h
+124
-124
bsp/fh8620/drivers/dma.c
bsp/fh8620/drivers/dma.c
+8
-8
bsp/fh8620/drivers/dma.h
bsp/fh8620/drivers/dma.h
+18
-18
bsp/fh8620/drivers/dma_mem.c
bsp/fh8620/drivers/dma_mem.c
+13
-13
bsp/fh8620/drivers/dma_mem.h
bsp/fh8620/drivers/dma_mem.h
+8
-8
bsp/fh8620/drivers/fh_dma.c
bsp/fh8620/drivers/fh_dma.c
+968
-968
bsp/fh8620/drivers/fh_dma.h
bsp/fh8620/drivers/fh_dma.h
+139
-139
bsp/fh8620/drivers/gpio.c
bsp/fh8620/drivers/gpio.c
+5
-5
bsp/fh8620/drivers/gpio.h
bsp/fh8620/drivers/gpio.h
+4
-4
bsp/fh8620/drivers/i2c.c
bsp/fh8620/drivers/i2c.c
+293
-293
bsp/fh8620/drivers/i2c.h
bsp/fh8620/drivers/i2c.h
+3
-3
bsp/fh8620/drivers/interrupt.c
bsp/fh8620/drivers/interrupt.c
+19
-19
bsp/fh8620/drivers/interrupt.h
bsp/fh8620/drivers/interrupt.h
+4
-4
bsp/fh8620/drivers/mem_process.c
bsp/fh8620/drivers/mem_process.c
+33
-33
bsp/fh8620/drivers/mmc.c
bsp/fh8620/drivers/mmc.c
+3
-3
bsp/fh8620/drivers/mmc.h
bsp/fh8620/drivers/mmc.h
+3
-3
bsp/fh8620/drivers/pwm.c
bsp/fh8620/drivers/pwm.c
+4
-4
bsp/fh8620/drivers/pwm.h
bsp/fh8620/drivers/pwm.h
+4
-4
bsp/fh8620/drivers/sadc.c
bsp/fh8620/drivers/sadc.c
+170
-170
bsp/fh8620/drivers/sadc.h
bsp/fh8620/drivers/sadc.h
+43
-43
bsp/fh8620/drivers/spi_fh_adapt.c
bsp/fh8620/drivers/spi_fh_adapt.c
+69
-69
bsp/fh8620/drivers/spi_fh_adapt.h
bsp/fh8620/drivers/spi_fh_adapt.h
+4
-4
bsp/fh8620/drivers/ssi.c
bsp/fh8620/drivers/ssi.c
+473
-473
bsp/fh8620/drivers/ssi.h
bsp/fh8620/drivers/ssi.h
+52
-52
bsp/fh8620/drivers/trap.c
bsp/fh8620/drivers/trap.c
+63
-63
bsp/fh8620/drivers/uart.c
bsp/fh8620/drivers/uart.c
+159
-159
bsp/fh8620/drivers/uart.h
bsp/fh8620/drivers/uart.h
+4
-4
bsp/fh8620/drivers/wdt.c
bsp/fh8620/drivers/wdt.c
+4
-4
bsp/fh8620/drivers/wdt.h
bsp/fh8620/drivers/wdt.h
+4
-4
bsp/fh8620/libraries/driverlib/fh_gpio.c
bsp/fh8620/libraries/driverlib/fh_gpio.c
+5
-5
bsp/fh8620/libraries/driverlib/fh_i2c.c
bsp/fh8620/libraries/driverlib/fh_i2c.c
+4
-4
bsp/fh8620/libraries/driverlib/fh_ictl.c
bsp/fh8620/libraries/driverlib/fh_ictl.c
+24
-24
bsp/fh8620/libraries/driverlib/fh_mmc.c
bsp/fh8620/libraries/driverlib/fh_mmc.c
+3
-3
bsp/fh8620/libraries/driverlib/fh_pwm.c
bsp/fh8620/libraries/driverlib/fh_pwm.c
+3
-3
bsp/fh8620/libraries/driverlib/fh_sdio.c
bsp/fh8620/libraries/driverlib/fh_sdio.c
+1694
-1694
bsp/fh8620/libraries/driverlib/fh_spi.c
bsp/fh8620/libraries/driverlib/fh_spi.c
+3
-3
bsp/fh8620/libraries/driverlib/fh_timer.c
bsp/fh8620/libraries/driverlib/fh_timer.c
+28
-28
bsp/fh8620/libraries/driverlib/fh_uart.c
bsp/fh8620/libraries/driverlib/fh_uart.c
+122
-122
bsp/fh8620/libraries/driverlib/fh_wdt.c
bsp/fh8620/libraries/driverlib/fh_wdt.c
+3
-3
bsp/fh8620/libraries/inc/fh_driverlib.h
bsp/fh8620/libraries/inc/fh_driverlib.h
+4
-4
bsp/fh8620/libraries/inc/fh_gpio.h
bsp/fh8620/libraries/inc/fh_gpio.h
+4
-4
bsp/fh8620/libraries/inc/fh_i2c.h
bsp/fh8620/libraries/inc/fh_i2c.h
+4
-4
bsp/fh8620/libraries/inc/fh_ictl.h
bsp/fh8620/libraries/inc/fh_ictl.h
+18
-18
bsp/fh8620/libraries/inc/fh_mmc.h
bsp/fh8620/libraries/inc/fh_mmc.h
+3
-3
bsp/fh8620/libraries/inc/fh_pwm.h
bsp/fh8620/libraries/inc/fh_pwm.h
+3
-3
bsp/fh8620/libraries/inc/fh_sdio.h
bsp/fh8620/libraries/inc/fh_sdio.h
+166
-166
bsp/fh8620/libraries/inc/fh_spi.h
bsp/fh8620/libraries/inc/fh_spi.h
+6
-6
bsp/fh8620/libraries/inc/fh_timer.h
bsp/fh8620/libraries/inc/fh_timer.h
+14
-14
bsp/fh8620/libraries/inc/fh_uart.h
bsp/fh8620/libraries/inc/fh_uart.h
+57
-57
bsp/fh8620/libraries/inc/fh_wdt.h
bsp/fh8620/libraries/inc/fh_wdt.h
+4
-4
bsp/fh8620/platform/board.h
bsp/fh8620/platform/board.h
+4
-4
bsp/fh8620/platform/board_info.h
bsp/fh8620/platform/board_info.h
+14
-14
bsp/fh8620/platform/common/board_info.c
bsp/fh8620/platform/common/board_info.c
+114
-114
bsp/fh8620/platform/common/chkenv.c
bsp/fh8620/platform/common/chkenv.c
+6
-6
bsp/fh8620/platform/fh8620/arch.h
bsp/fh8620/platform/fh8620/arch.h
+34
-34
bsp/fh8620/platform/fh8620/iot_cam/board.c
bsp/fh8620/platform/fh8620/iot_cam/board.c
+169
-169
bsp/fh8620/platform/fh8620/iot_cam/board_def.h
bsp/fh8620/platform/fh8620/iot_cam/board_def.h
+16
-16
bsp/fh8620/platform/fh8620/iot_cam/iomux.c
bsp/fh8620/platform/fh8620/iot_cam/iomux.c
+635
-635
bsp/fh8620/platform/fh8620/iot_cam/startup.c
bsp/fh8620/platform/fh8620/iot_cam/startup.c
+37
-37
bsp/fh8620/platform/fh_arch.h
bsp/fh8620/platform/fh_arch.h
+4
-4
bsp/fh8620/platform/fh_def.h
bsp/fh8620/platform/fh_def.h
+25
-25
bsp/fh8620/platform/plat-v2/arch.h
bsp/fh8620/platform/plat-v2/arch.h
+34
-34
bsp/fh8620/platform/plat-v2/clock.c
bsp/fh8620/platform/plat-v2/clock.c
+1506
-1506
bsp/fh8620/platform/plat-v2/clock.h
bsp/fh8620/platform/plat-v2/clock.h
+10
-10
bsp/fh8620/platform/plat-v2/fh_pmu.c
bsp/fh8620/platform/plat-v2/fh_pmu.c
+18
-18
bsp/fh8620/platform/plat-v2/fh_pmu.h
bsp/fh8620/platform/plat-v2/fh_pmu.h
+5
-5
bsp/fh8620/platform/plat-v2/iomux.c
bsp/fh8620/platform/plat-v2/iomux.c
+177
-177
bsp/fh8620/platform/plat-v2/iomux.h
bsp/fh8620/platform/plat-v2/iomux.h
+107
-107
bsp/fh8620/platform/plat-v2/reset.c
bsp/fh8620/platform/plat-v2/reset.c
+7
-7
bsp/fh8620/platform/plat-v2/timer.c
bsp/fh8620/platform/plat-v2/timer.c
+42
-42
bsp/fh8620/platform/plat-v2/timer.h
bsp/fh8620/platform/plat-v2/timer.h
+4
-4
bsp/fh8620/platform/platform_def.h
bsp/fh8620/platform/platform_def.h
+4
-4
bsp/fh8620/rtconfig.h
bsp/fh8620/rtconfig.h
+24
-24
未找到文件。
bsp/fh8620/applications/main.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -27,18 +27,18 @@
void
init_thread
(
void
*
parameter
)
{
rt_components_init
();
rt_components_init
();
return
;
return
;
}
int
rt_application_init
(
void
)
{
rt_thread_t
tid
;
rt_thread_t
tid
;
tid
=
rt_thread_create
(
"init"
,
init_thread
,
RT_NULL
,
4096
,
RT_THREAD_PRIORITY_MAX
/
3
,
20
);
if
(
tid
)
rt_thread_startup
(
tid
);
tid
=
rt_thread_create
(
"init"
,
init_thread
,
RT_NULL
,
4096
,
RT_THREAD_PRIORITY_MAX
/
3
,
20
);
if
(
tid
)
rt_thread_startup
(
tid
);
return
0
;
return
0
;
}
bsp/fh8620/drivers/acw.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -30,12 +30,12 @@
#include "dma.h"
#ifdef RT_USING_FH_ACW
#if 1
typedef
struct
typedef
struct
{
unsigned
int
base
;
void
*
vbase
;
unsigned
int
size
;
unsigned
int
align
;
unsigned
int
base
;
void
*
vbase
;
unsigned
int
size
;
unsigned
int
align
;
}
MEM_DESC
;
#define ACW_SELFTEST 0
int
buffer_malloc_withname
(
MEM_DESC
*
mem
,
int
size
,
int
align
,
char
*
name
);
...
...
@@ -222,9 +222,9 @@ void fh_acw_stop_playback(struct fh_audio_cfg *audio_config)
audio_config
->
playback
.
state
=
stopping
;
writel
(
0
,
audio_dev
.
reg_base
+
ACW_TXFIFO_CTRL
);
//tx fifo disable
if
(
audio_config
->
plauback_trans
->
channel_number
!=
ACW_PLY_DMA_CHAN
)
goto
free_mem
;
goto
free_mem
;
if
(
!
audio_config
->
plauback_trans
->
first_lli
)
goto
free_channel
;
goto
free_channel
;
audio_config
->
playback_dma
->
ops
->
control
(
audio_config
->
playback_dma
,
RT_DEVICE_CTRL_DMA_CYCLIC_STOP
,
audio_config
->
plauback_trans
);
audio_config
->
playback_dma
->
ops
->
control
(
audio_config
->
playback_dma
,
RT_DEVICE_CTRL_DMA_CYCLIC_FREE
,
audio_config
->
plauback_trans
);
free_channel:
...
...
@@ -259,9 +259,9 @@ void fh_acw_stop_capture(struct fh_audio_cfg *audio_config)
writel
(
0
,
audio_dev
.
reg_base
+
8
);
//rx fifo disable
if
(
audio_config
->
capture_trans
->
channel_number
!=
ACW_CAP_DMA_CHAN
)
goto
free_mem
;
goto
free_mem
;
if
(
!
audio_config
->
capture_trans
->
first_lli
)
goto
free_channel
;
goto
free_channel
;
audio_config
->
capture_dma
->
ops
->
control
(
audio_config
->
capture_dma
,
RT_DEVICE_CTRL_DMA_CYCLIC_STOP
,
audio_config
->
capture_trans
);
audio_config
->
capture_dma
->
ops
->
control
(
audio_config
->
capture_dma
,
RT_DEVICE_CTRL_DMA_CYCLIC_FREE
,
audio_config
->
capture_trans
);
...
...
@@ -286,10 +286,10 @@ void switch_io_type(enum audio_type type, enum io_select io_type)
{
rt_kprintf
(
"audio input changed to mic_in
\n
"
);
writel
(
reg
&
(
~
(
1
<<
1
)),
audio_dev
.
reg_base
+
ACW_ADC_PATH_CTRL
);
reg
=
readl
(
audio_dev
.
reg_base
+
ACW_ADC_PATH_CTRL
);
reg
=
reg
&
(
~
(
1
<<
3
));
reg
|=
(
0x1
<<
3
);
writel
(
reg
,
audio_dev
.
reg_base
+
ACW_ADC_PATH_CTRL
);
reg
=
readl
(
audio_dev
.
reg_base
+
ACW_ADC_PATH_CTRL
);
reg
=
reg
&
(
~
(
1
<<
3
));
reg
|=
(
0x1
<<
3
);
writel
(
reg
,
audio_dev
.
reg_base
+
ACW_ADC_PATH_CTRL
);
}
else
if
(
line_in
==
io_type
)
{
...
...
@@ -397,7 +397,7 @@ void switch_input_volume(int volume)
param
=
get_param_from_volume
(
volume
);
if
(
param
<
0
)
{
rt_kprintf
(
"capture volume error
\n
"
);
rt_kprintf
(
"capture volume error
\n
"
);
return
;
}
...
...
@@ -511,25 +511,25 @@ int register_tx_dma(struct fh_audio_cfg *audio_config)
if
(
playback_trans
->
channel_number
==
ACW_PLY_DMA_CHAN
){
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE
,
playback_trans
);
if
(
ret
){
rt_kprintf
(
"can't playback cyclic prepare
\n
"
);
return
RT_ERROR
;
}
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_START
,
playback_trans
);
if
(
ret
){
rt_kprintf
(
"can't playback cyclic start
\n
"
);
return
RT_ERROR
;
}
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE
,
playback_trans
);
if
(
ret
){
rt_kprintf
(
"can't playback cyclic prepare
\n
"
);
return
RT_ERROR
;
}
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_START
,
playback_trans
);
if
(
ret
){
rt_kprintf
(
"can't playback cyclic start
\n
"
);
return
RT_ERROR
;
}
}
else
return
RT_ERROR
;
return
RT_ERROR
;
return
0
;
}
int
register_rx_dma
(
struct
fh_audio_cfg
*
audio_config
)
{
int
ret
;
int
ret
;
struct
dma_transfer
*
capture_slave
;
capture_slave
=
audio_config
->
capture_trans
;
struct
rt_dma_device
*
rt_dma_dev
;
...
...
@@ -546,19 +546,19 @@ int register_rx_dma( struct fh_audio_cfg *audio_config)
return
RT_ERROR
;
}
if
(
capture_slave
->
channel_number
==
ACW_CAP_DMA_CHAN
){
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE
,
capture_slave
);
if
(
ret
){
rt_kprintf
(
"can't capture cyclic prepare
\n
"
);
return
RT_ERROR
;
}
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_START
,
capture_slave
);
if
(
ret
){
rt_kprintf
(
"can't capture cyclic start
\n
"
);
return
RT_ERROR
;
}
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE
,
capture_slave
);
if
(
ret
){
rt_kprintf
(
"can't capture cyclic prepare
\n
"
);
return
RT_ERROR
;
}
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_CYCLIC_START
,
capture_slave
);
if
(
ret
){
rt_kprintf
(
"can't capture cyclic start
\n
"
);
return
RT_ERROR
;
}
}
else
return
RT_ERROR
;
return
RT_ERROR
;
writel
(
0x11
,
audio_dev
.
reg_base
+
ACW_RXFIFO_CTRL
);
//clear rx fifo
writel
(
0x30029
,
audio_dev
.
reg_base
+
ACW_RXFIFO_CTRL
);
/*enable rx fifo*/
...
...
@@ -614,13 +614,13 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config)
audio_config
->
playback
.
state
=
running
;
ret
=
audio_request_playback_channel
(
audio_config
);
if
(
ret
){
rt_kprintf
(
"can't request playback channel
\n
"
);
return
ret
;
rt_kprintf
(
"can't request playback channel
\n
"
);
return
ret
;
}
ret
=
register_tx_dma
(
audio_config
);
if
(
ret
<
0
)
{
rt_kprintf
(
"can't register tx dma
\n
"
);
rt_kprintf
(
"can't register tx dma
\n
"
);
return
ret
;
}
rt_list_init
(
&
(
playback_wq
.
list
));
...
...
@@ -638,7 +638,7 @@ int fh_acw_start_playback(struct fh_audio_cfg *audio_config)
int
fh_acw_start_capture
(
struct
fh_audio_cfg
*
audio_config
)
{
int
ret
;
int
ret
;
if
(
audio_config
->
capture
.
state
==
running
)
{
return
0
;
...
...
@@ -654,8 +654,8 @@ int fh_acw_start_capture(struct fh_audio_cfg *audio_config)
audio_config
->
capture
.
state
=
running
;
ret
=
audio_request_capture_channel
(
audio_config
);
if
(
ret
){
rt_kprintf
(
"can't request capture channel
\n
"
);
return
ret
;
rt_kprintf
(
"can't request capture channel
\n
"
);
return
ret
;
}
return
register_rx_dma
(
audio_config
);
...
...
@@ -698,12 +698,12 @@ static void fh_acw_tx_dma_done(void *arg)
audio_config
->
playback
.
hw_ptr
=
audio_config
->
playback
.
hw_ptr
-
audio_config
->
playback
.
size
;
}
int
avail
=
avail_data_len
(
playback
,
audio_config
);
if
(
avail
>
audio_config
->
playback
.
cfg
.
period_bytes
)
{
int
avail
=
avail_data_len
(
playback
,
audio_config
);
if
(
avail
>
audio_config
->
playback
.
cfg
.
period_bytes
)
{
rt_sem_release
(
&
audio_config
->
sem_playback
);
}
rt_sem_release
(
&
audio_config
->
sem_playback
);
}
#endif
}
...
...
@@ -719,12 +719,12 @@ int arg_config_support(struct fh_audio_cfg_arg * cfg)
ret
=
get_param_from_volume
(
cfg
->
volume
);
if
(
ret
<
0
)
{
rt_kprintf
(
"invalid volume
\n
"
);
rt_kprintf
(
"invalid volume
\n
"
);
return
-
EINVAL
;
}
ret
=
get_factor_from_table
(
cfg
->
rate
);
if
(
ret
<
0
)
{
rt_kprintf
(
"invalid rate
\n
"
);
rt_kprintf
(
"invalid rate
\n
"
);
return
-
EINVAL
;
}
return
0
;
...
...
@@ -1084,7 +1084,7 @@ static void fh_audio_interrupt(int irq, void *param)
void
audio_prealloc_dma_buffer
(
int
aiaotype
,
struct
fh_audio_cfg
*
audio_config
)
{
if
(
aiaotype
==
mic_in
||
aiaotype
==
line_in
){
if
(
aiaotype
==
mic_in
||
aiaotype
==
line_in
){
audio_config
->
capture
.
area
=
(
void
*
)
fh_dma_mem_malloc
(
audio_config
->
capture
.
cfg
.
buffer_bytes
\
+
audio_config
->
capture
.
cfg
.
period_bytes
);
...
...
@@ -1093,8 +1093,8 @@ void audio_prealloc_dma_buffer(int aiaotype,struct fh_audio_cfg *audio_config)
rt_kprintf
(
"no enough mem for capture buffer alloc
\n
"
);
return
;
}
}
if
(
aiaotype
==
speaker_out
||
aiaotype
==
line_out
){
}
if
(
aiaotype
==
speaker_out
||
aiaotype
==
line_out
){
audio_config
->
playback
.
area
=
(
void
*
)
fh_dma_mem_malloc
(
audio_config
->
playback
.
cfg
.
buffer_bytes
\
+
audio_config
->
playback
.
cfg
.
period_bytes
);
...
...
@@ -1169,9 +1169,9 @@ int audio_request_capture_channel(struct fh_audio_cfg *audio_config){
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_OPEN
,
dma_rx_transfer
);
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL
,
dma_rx_transfer
);
if
(
ret
){
rt_kprintf
(
"can't request capture channel
\n
"
);
dma_rx_transfer
->
channel_number
=
0xff
;
return
-
ret
;
rt_kprintf
(
"can't request capture channel
\n
"
);
dma_rx_transfer
->
channel_number
=
0xff
;
return
-
ret
;
}
}
...
...
@@ -1219,9 +1219,9 @@ int audio_request_playback_channel(struct fh_audio_cfg *audio_config)
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_OPEN
,
dma_tx_transfer
);
ret
=
rt_dma_dev
->
ops
->
control
(
rt_dma_dev
,
RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL
,
dma_tx_transfer
);
if
(
ret
){
rt_kprintf
(
"can't request playbak channel
\n
"
);
dma_tx_transfer
->
channel_number
=
0xff
;
return
-
ret
;
rt_kprintf
(
"can't request playbak channel
\n
"
);
dma_tx_transfer
->
channel_number
=
0xff
;
return
-
ret
;
}
return
0
;
...
...
@@ -1320,7 +1320,7 @@ void fh_acw_test(){
cfg
.
frame_bit
=
16
;
cfg
.
io_type
=
mic_in
;
cfg
.
period_size
=
BUFF_SIZE
/
8
;
cfg
.
rate
=
8000
;
cfg
.
volume
=
80
;
...
...
@@ -1344,18 +1344,18 @@ void fh_acw_test(){
ret
=
acw_dev
->
control
(
acw_dev
,
AC_AI_EN
,
&
cfg
);
if
(
ret
)
acw_dev
->
control
(
acw_dev
,
AC_AI_DISABLE
,
&
cfg
);
acw_dev
->
control
(
acw_dev
,
AC_AI_DISABLE
,
&
cfg
);
cfg
.
io_type
=
line_out
;
acw_dev
->
control
(
acw_dev
,
AC_INIT_PLAYBACK_MEM
,
&
cfg
);
ret
=
acw_dev
->
control
(
acw_dev
,
AC_AO_EN
,
&
cfg
);
if
(
ret
){
acw_dev
->
control
(
acw_dev
,
AC_AO_DISABLE
,
&
cfg
);
acw_dev
->
control
(
acw_dev
,
AC_AO_DISABLE
,
&
cfg
);
// acw_dev->control(acw_dev,AC_SET_OUTPUT_MODE,&output);
return
;
return
;
}
for
(
i
=
0
;
i
<
100
;
i
++
)
for
(
i
=
0
;
i
<
100
;
i
++
)
{
rx:
...
...
@@ -1374,7 +1374,7 @@ tx:
acw_dev
->
write
(
acw_dev
,
0
,
&
rx_buff
[
0
],
1024
*
8
);
}
acw_dev
->
close
(
acw_dev
);
acw_dev
->
close
(
acw_dev
);
}
#ifdef RT_USING_FINSH
...
...
bsp/fh8620/drivers/acw.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef ACW_H_
#define ACW_H_
#include <rtthread.h>
...
...
@@ -37,86 +37,86 @@
typedef
unsigned
long
long
dma_addr_t
;
struct
scatterlist
{
#ifdef CONFIG_DEBUG_SG
unsigned
long
sg_magic
;
unsigned
long
sg_magic
;
#endif
unsigned
long
page_link
;
unsigned
int
offset
;
unsigned
int
length
;
dma_addr_t
dma_address
;
unsigned
long
page_link
;
unsigned
int
offset
;
unsigned
int
length
;
dma_addr_t
dma_address
;
#ifdef CONFIG_NEED_SG_DMA_LENGTH
unsigned
int
dma_length
;
unsigned
int
dma_length
;
#endif
};
#define readl(a) (*(volatile rt_uint32_t *)(a))
#define rkqueue_struct
rt_workqueue
#define work_struct
rt_work
#define INIT_WORK(work,func)
rt_work_init(work,func,RT_NULL);
#define queue_work
rt_workqueue_dowork
#define rkqueue_struct
rt_workqueue
#define work_struct
rt_work
#define INIT_WORK(work,func)
rt_work_init(work,func,RT_NULL);
#define queue_work
rt_workqueue_dowork
//timer
#define timer_list
rt_timer
#define wait_queue_head_t
struct rt_event
#define init_waitqueue_head(event_t)
rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO)
#define timer_list
rt_timer
#define wait_queue_head_t
struct rt_event
#define init_waitqueue_head(event_t)
rt_event_init(event_t, "audio_event", RT_IPC_FLAG_FIFO)
typedef
enum
{
AC_SR_8K
=
8000
,
AC_SR_16K
=
16000
,
AC_SR_32K
=
32000
,
AC_SR_441K
=
44100
,
AC_SR_48K
=
48000
,
AC_SR_8K
=
8000
,
AC_SR_16K
=
16000
,
AC_SR_32K
=
32000
,
AC_SR_441K
=
44100
,
AC_SR_48K
=
48000
,
}
FH_AC_SAMPLE_RATE_E
;
typedef
enum
{
AC_BW_8
=
8
,
AC_BW_16
=
16
,
AC_BW_24
=
24
,
AC_BW_8
=
8
,
AC_BW_16
=
16
,
AC_BW_24
=
24
,
}
FH_AC_BIT_WIDTH_E
;
enum
io_select
{
mic_in
=
0
,
line_in
=
1
,
speaker_out
=
2
,
line_out
=
3
,
mic_in
=
0
,
line_in
=
1
,
speaker_out
=
2
,
line_out
=
3
,
};
struct
fh_audio_cfg_arg
{
enum
io_select
io_type
;
int
volume
;
int
rate
;
int
frame_bit
;
int
channels
;
int
buffer_size
;
int
period_size
;
enum
io_select
io_type
;
int
volume
;
int
rate
;
int
frame_bit
;
int
channels
;
int
buffer_size
;
int
period_size
;
};
typedef
struct
{
unsigned
int
len
;
unsigned
char
*
data
;
unsigned
int
len
;
unsigned
char
*
data
;
}
FH_AC_FRAME_S
;
typedef
enum
{
FH_AC_MIC_IN
=
0
,
FH_AC_LINE_IN
=
1
,
FH_AC_SPK_OUT
=
2
,
FH_AC_LINE_OUT
=
3
FH_AC_MIC_IN
=
0
,
FH_AC_LINE_IN
=
1
,
FH_AC_SPK_OUT
=
2
,
FH_AC_LINE_OUT
=
3
}
FH_AC_IO_TYPE_E
;
typedef
struct
{
FH_AC_IO_TYPE_E
io_type
;
FH_AC_SAMPLE_RATE_E
sample_rate
;
FH_AC_BIT_WIDTH_E
bit_width
;
unsigned
int
channels
;
unsigned
int
period_size
;
unsigned
int
volume
;
FH_AC_IO_TYPE_E
io_type
;
FH_AC_SAMPLE_RATE_E
sample_rate
;
FH_AC_BIT_WIDTH_E
bit_width
;
unsigned
int
channels
;
unsigned
int
period_size
;
unsigned
int
volume
;
}
FH_AC_CONFIG
;
struct
device_dma_parameters
{
/*
* a low level driver may set these to teach IOMMU code about
* sg limitations.
*/
unsigned
int
max_segment_size
;
unsigned
long
segment_boundary_mask
;
/*
* a low level driver may set these to teach IOMMU code about
* sg limitations.
*/
unsigned
int
max_segment_size
;
unsigned
long
segment_boundary_mask
;
};
struct
list_head
{
...
...
@@ -124,32 +124,32 @@ struct list_head {
struct
list_head
*
prev
;
};
struct
dma_coherent_mem
{
void
*
virt_base
;
dma_addr_t
device_base
;
int
size
;
int
flags
;
unsigned
long
*
bitmap
;
void
*
virt_base
;
dma_addr_t
device_base
;
int
size
;
int
flags
;
unsigned
long
*
bitmap
;
};
struct
device_acw
{
unsigned
long
long
*
dma_mask
;
/* dma mask (if dma'able device) */
unsigned
long
long
coherent_dma_mask
;
/* Like dma_mask, but for
alloc_coherent mappings as
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
struct
device_dma_parameters
*
dma_parms
;
unsigned
long
long
*
dma_mask
;
/* dma mask (if dma'able device) */
unsigned
long
long
coherent_dma_mask
;
/* Like dma_mask, but for
alloc_coherent mappings as
not all hardware supports
64 bit addresses for consistent
allocations such descriptors. */
struct
device_dma_parameters
*
dma_parms
;
struct
list_head
dma_pools
;
struct
list_head
dma_pools
;
struct
dma_coherent_mem
*
dma_mem
;
struct
dma_coherent_mem
*
dma_mem
;
};
#define false 0
#define true 1
#define
AC_INIT_CAPTURE_MEM
0x10
#define
AC_INIT_PLAYBACK_MEM 0x11
#define
AC_INIT_CAPTURE_MEM
0x10
#define
AC_INIT_PLAYBACK_MEM 0x11
#define AC_SET_VOL 0x12
...
...
@@ -160,73 +160,73 @@ struct device_acw{
#define AC_AI_EN 0x15
#define AC_AO_EN 0x16
#define AC_AI_DISABLE 0x17
#define AC_AO_DISABLE
0x18
#define AC_AI_PAUSE
0x19
#define AC_AI_RESUME
0x1a
#define AC_AO_PAUSE
0x1b
#define AC_AO_RESUME
0x1c
#define AC_MIC_BOOST
0x1d
#define AC_AO_DISABLE
0x18
#define AC_AI_PAUSE
0x19
#define AC_AI_RESUME
0x1a
#define AC_AO_PAUSE
0x1b
#define AC_AO_RESUME
0x1c
#define AC_MIC_BOOST
0x1d
#define POLLIN
0x001
/* There is data to read. */
#define POLLPRI
0x002
/* There is urgent data to read. */
#define POLLOUT
0x004
/* Writing now will not block. */
#define POLLIN
0x001
/* There is data to read. */
#define POLLPRI
0x002
/* There is urgent data to read. */
#define POLLOUT
0x004
/* Writing now will not block. */
/* These values are defined in XPG4.2. */
# define POLLRDNORM
0x040
/* Normal data may be read. */
# define POLLRDBAND
0x080
/* Priority data may be read. */
# define POLLWRNORM
0x100
/* Writing now will not block. */
# define POLLWRBAND
0x200
/* Priority data may be written. */
# define POLLRDNORM
0x040
/* Normal data may be read. */
# define POLLRDBAND
0x080
/* Priority data may be read. */
# define POLLWRNORM
0x100
/* Writing now will not block. */
# define POLLWRBAND
0x200
/* Priority data may be written. */
/* These are extensions for Linux. */
# define POLLMSG
0x400
# define POLLREMOVE
0x1000
# define POLLRDHUP
0x2000
# define POLLMSG
0x400
# define POLLREMOVE
0x1000
# define POLLRDHUP
0x2000
/* Event types always implicitly polled for. These bits need not be set in
`events', but they will appear in `revents' to indicate the status of
the file descriptor. */
#define POLLERR
0x008
/* Error condition. */
#define POLLHUP
0x010
/* Hung up. */
#define POLLNVAL
0x020
/* Invalid polling request. */
#define
EPERM 1
/* Operation not permitted */
#define
ENOENT 2
/* No such file or directory */
#define
ESRCH 3
/* No such process */
#define
EINTR 4
/* Interrupted system call */
#define
EIO 5
/* I/O error */
#define
ENXIO 6
/* No such device or address */
#define
E2BIG 7
/* Argument list too long */
#define
ENOEXEC 8
/* Exec format error */
#define
EBADF 9
/* Bad file number */
#define
ECHILD 10
/* No child processes */
#define
EAGAIN 11
/* Try again */
#define
ENOMEM 12
/* Out of memory */
#define
EACCES 13
/* Permission denied */
#define
EFAULT 14
/* Bad address */
#define
ENOTBLK 15
/* Block device required */
#define
EBUSY 16
/* Device or resource busy */
#define
EEXIST 17
/* File exists */
#define
EXDEV 18
/* Cross-device link */
#define
ENODEV 19
/* No such device */
#define
ENOTDIR 20
/* Not a directory */
#define
EISDIR 21
/* Is a directory */
#define
EINVAL 22
/* Invalid argument */
#define
ENFILE 23
/* File table overflow */
#define
EMFILE 24
/* Too many open files */
#define
ENOTTY 25
/* Not a typewriter */
#define
ETXTBSY 26
/* Text file busy */
#define
EFBIG 27
/* File too large */
#define
ENOSPC 28
/* No space left on device */
#define
ESPIPE 29
/* Illegal seek */
#define
EROFS 30
/* Read-only file system */
#define
EMLINK 31
/* Too many links */
#define
EPIPE 32
/* Broken pipe */
#define
EDOM 33
/* Math argument out of domain of func */
#define
ERANGE 34
/* Math result not representable */
#define POLLERR
0x008
/* Error condition. */
#define POLLHUP
0x010
/* Hung up. */
#define POLLNVAL
0x020
/* Invalid polling request. */
#define
EPERM 1
/* Operation not permitted */
#define
ENOENT 2
/* No such file or directory */
#define
ESRCH 3
/* No such process */
#define
EINTR 4
/* Interrupted system call */
#define
EIO 5
/* I/O error */
#define
ENXIO 6
/* No such device or address */
#define
E2BIG 7
/* Argument list too long */
#define
ENOEXEC 8
/* Exec format error */
#define
EBADF 9
/* Bad file number */
#define
ECHILD 10
/* No child processes */
#define
EAGAIN 11
/* Try again */
#define
ENOMEM 12
/* Out of memory */
#define
EACCES 13
/* Permission denied */
#define
EFAULT 14
/* Bad address */
#define
ENOTBLK 15
/* Block device required */
#define
EBUSY 16
/* Device or resource busy */
#define
EEXIST 17
/* File exists */
#define
EXDEV 18
/* Cross-device link */
#define
ENODEV 19
/* No such device */
#define
ENOTDIR 20
/* Not a directory */
#define
EISDIR 21
/* Is a directory */
#define
EINVAL 22
/* Invalid argument */
#define
ENFILE 23
/* File table overflow */
#define
EMFILE 24
/* Too many open files */
#define
ENOTTY 25
/* Not a typewriter */
#define
ETXTBSY 26
/* Text file busy */
#define
EFBIG 27
/* File too large */
#define
ENOSPC 28
/* No space left on device */
#define
ESPIPE 29
/* Illegal seek */
#define
EROFS 30
/* Read-only file system */
#define
EMLINK 31
/* Too many links */
#define
EPIPE 32
/* Broken pipe */
#define
EDOM 33
/* Math argument out of domain of func */
#define
ERANGE 34
/* Math result not representable */
extern
void
fh_audio_init
(
void
);
extern
void
fh_acw_test
();
#endif
bsp/fh8620/drivers/dma.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
...
...
@@ -88,7 +88,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev,
*****************************************************************************/
static
rt_err_t
rt_dma_init
(
struct
rt_device
*
dev
)
{
struct
rt_dma_device
*
dma
;
struct
rt_dma_device
*
dma
;
RT_ASSERT
(
dev
!=
RT_NULL
);
dma
=
(
struct
rt_dma_device
*
)
dev
;
...
...
@@ -107,7 +107,7 @@ static rt_err_t rt_dma_open(struct rt_device *dev, rt_uint16_t oflag)
static
rt_err_t
rt_dma_close
(
struct
rt_device
*
dev
)
{
struct
rt_dma_device
*
dma
;
struct
rt_dma_device
*
dma
;
RT_ASSERT
(
dev
!=
RT_NULL
);
dma
=
(
struct
rt_dma_device
*
)
dev
;
...
...
@@ -124,7 +124,7 @@ static rt_err_t rt_dma_control(struct rt_device *dev,
rt_uint8_t
cmd
,
void
*
args
)
{
struct
rt_dma_device
*
dma
;
struct
rt_dma_device
*
dma
;
RT_ASSERT
(
dev
!=
RT_NULL
);
dma
=
(
struct
rt_dma_device
*
)
dev
;
...
...
@@ -141,7 +141,7 @@ rt_err_t rt_hw_dma_register(struct rt_dma_device *dma,
rt_uint32_t
flag
,
void
*
data
)
{
rt_uint32_t
ret
;
rt_uint32_t
ret
;
struct
rt_device
*
device
;
RT_ASSERT
(
dma
!=
RT_NULL
);
...
...
bsp/fh8620/drivers/dma.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -29,31 +29,31 @@
#include <rtthread.h>
/****************************************************************************
* #include section
*
add #include here if any
*
add #include here if any
***************************************************************************/
/****************************************************************************
* #define section
*
add constant #define here if any
*
add constant #define here if any
***************************************************************************/
#define RT_DEVICE_CTRL_DMA_OPEN
(1)
#define RT_DEVICE_CTRL_DMA_CLOSE
(2)
#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL
(3)
#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL
(4)
#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER
(5)
#define RT_DEVICE_CTRL_DMA_OPEN
(1)
#define RT_DEVICE_CTRL_DMA_CLOSE
(2)
#define RT_DEVICE_CTRL_DMA_REQUEST_CHANNEL
(3)
#define RT_DEVICE_CTRL_DMA_RELEASE_CHANNEL
(4)
#define RT_DEVICE_CTRL_DMA_SINGLE_TRANSFER
(5)
//cyclic add func below....
#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE
(6)
#define RT_DEVICE_CTRL_DMA_CYCLIC_START
(7)
#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP
(8)
#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE
(9)
#define RT_DEVICE_CTRL_DMA_CYCLIC_PREPARE
(6)
#define RT_DEVICE_CTRL_DMA_CYCLIC_START
(7)
#define RT_DEVICE_CTRL_DMA_CYCLIC_STOP
(8)
#define RT_DEVICE_CTRL_DMA_CYCLIC_FREE
(9)
//#define RT_DEVICE_CTRL_
(3) /* get the left time before reboot(in seconds) */
//#define RT_DEVICE_CTRL_
(3) /* get the left time before reboot(in seconds) */
//#define RT_DEVICE_CTRL_ (4) /* refresh watchdog */
//#define RT_DEVICE_CTRL_ (5) /* start watchdog */
//#define RT_DEVICE_CTRL_ (6) /* stop watchdog */
...
...
@@ -64,13 +64,13 @@
/****************************************************************************
* ADT section
*
add Abstract Data Type definition here
*
add Abstract Data Type definition here
***************************************************************************/
struct
rt_dma_ops
;
struct
rt_dma_device
{
// the parent must be the fitst para..
// the parent must be the fitst para..
struct
rt_device
parent
;
struct
rt_dma_ops
*
ops
;
};
...
...
@@ -91,7 +91,7 @@ struct rt_dma_ops
/****************************************************************************
* section
*
add function prototype here if any
*
add function prototype here if any
***************************************************************************/
rt_err_t
rt_hw_dma_register
(
struct
rt_dma_device
*
dma
,
const
char
*
name
,
...
...
bsp/fh8620/drivers/dma_mem.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*****************************************************************************
* Include Section
* add all #include here
...
...
@@ -86,27 +86,27 @@ static struct rt_memheap dma_heap = {0};
* what does this function returned?
*****************************************************************************/
rt_err_t
fh_dma_mem_init
(
rt_uint32_t
*
mem_start
,
rt_uint32_t
size
){
return
rt_memheap_init
(
&
dma_heap
,
"dma_heap"
,
mem_start
,
size
);
return
rt_memheap_init
(
&
dma_heap
,
"dma_heap"
,
mem_start
,
size
);
}
void
*
fh_dma_mem_malloc
(
rt_uint32_t
size
){
return
rt_memheap_alloc
(
&
dma_heap
,
size
);
return
rt_memheap_alloc
(
&
dma_heap
,
size
);
}
void
fh_dma_mem_free
(
void
*
ptr
){
rt_memheap_free
(
ptr
);
rt_memheap_free
(
ptr
);
}
#ifdef FH_TEST_DMA_MEM
int
dma_mem_debug
(
void
*
ptr
){
//rt_memheap_free(ptr);
rt_kprintf
(
"dma mem start 0x%08x
\n
"
,(
rt_uint32_t
)
dma_heap
.
start_addr
);
rt_kprintf
(
"dma mem total size 0x%08x
\n
"
,
dma_heap
.
pool_size
);
rt_kprintf
(
"dma mem left size 0x%08x
\n
"
,
dma_heap
.
available_size
);
rt_kprintf
(
"dma mem max use size 0x%08x
\n
"
,
dma_heap
.
max_used_size
);
return
0
;
//rt_memheap_free(ptr);
rt_kprintf
(
"dma mem start 0x%08x
\n
"
,(
rt_uint32_t
)
dma_heap
.
start_addr
);
rt_kprintf
(
"dma mem total size 0x%08x
\n
"
,
dma_heap
.
pool_size
);
rt_kprintf
(
"dma mem left size 0x%08x
\n
"
,
dma_heap
.
available_size
);
rt_kprintf
(
"dma mem max use size 0x%08x
\n
"
,
dma_heap
.
max_used_size
);
return
0
;
}
#endif
...
...
bsp/fh8620/drivers/dma_mem.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef DMA_MEM_H_
#define DMA_MEM_H_
...
...
@@ -36,20 +36,20 @@
#include <rtthread.h>
/****************************************************************************
* #include section
*
add #include here if any
*
add #include here if any
***************************************************************************/
/****************************************************************************
* #define section
*
add constant #define here if any
*
add constant #define here if any
***************************************************************************/
/****************************************************************************
* ADT section
*
add Abstract Data Type definition here
*
add Abstract Data Type definition here
***************************************************************************/
...
...
@@ -61,7 +61,7 @@
/****************************************************************************
* section
*
add function prototype here if any
*
add function prototype here if any
***************************************************************************/
#ifdef RT_USING_DMA_MEM
rt_err_t
fh_dma_mem_init
(
rt_uint32_t
*
mem_start
,
rt_uint32_t
size
);
...
...
bsp/fh8620/drivers/fh_dma.c
浏览文件 @
49ef3cdc
此差异已折叠。
点击以展开。
bsp/fh8620/drivers/fh_dma.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,19 +18,19 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef FH_DMA_H_
#define FH_DMA_H_
/****************************************************************************
* #include section
*
add #include here if any
*
add #include here if any
***************************************************************************/
#include <rtthread.h>
...
...
@@ -43,24 +43,24 @@
*********************************/
#define FH81_MAX_CHANNEL
(4)
#define FH81_CHANNEL_MAX_TRANSFER_SIZE
(4095)
#define FH81_MAX_CHANNEL
(4)
#define FH81_CHANNEL_MAX_TRANSFER_SIZE
(4095)
enum
DMA_HW_HS_MAP
{
ACODEC_RX
=
0
,
ACODEC_TX
,
SPI0_RX
,
SPI0_TX
,
SPI1_RX
,
SPI1_TX
,
UART0_RX
,
UART0_TX
,
UART1_RX
,
UART1_TX
,
DMA_HW_HS_END
,
ACODEC_RX
=
0
,
ACODEC_TX
,
SPI0_RX
,
SPI0_TX
,
SPI1_RX
,
SPI1_TX
,
UART0_RX
,
UART0_TX
,
UART1_RX
,
UART1_TX
,
DMA_HW_HS_END
,
};
/*********************************
...
...
@@ -76,7 +76,7 @@ typedef void (*user_prepare)(void *prepare_para);
/****************************
i'm cut-off line
************************************/
/****************************
i'm cut-off line
************************************/
...
...
@@ -88,128 +88,128 @@ struct fh81_dma;
struct
dw_lli
{
/* values that are not changed by hardware */
rt_uint32_t
sar
;
rt_uint32_t
dar
;
rt_uint32_t
llp
;
/* chain to next lli */
rt_uint32_t
ctllo
;
/* values that may get written back: */
rt_uint32_t
ctlhi
;
/* sstat and dstat can snapshot peripheral register state.
* silicon config may discard either or both...
*/
rt_uint32_t
sstat
;
rt_uint32_t
dstat
;
rt_uint32_t
reserve
;
/* values that are not changed by hardware */
rt_uint32_t
sar
;
rt_uint32_t
dar
;
rt_uint32_t
llp
;
/* chain to next lli */
rt_uint32_t
ctllo
;
/* values that may get written back: */
rt_uint32_t
ctlhi
;
/* sstat and dstat can snapshot peripheral register state.
* silicon config may discard either or both...
*/
rt_uint32_t
sstat
;
rt_uint32_t
dstat
;
rt_uint32_t
reserve
;
};
//transfer use below
struct
dma_transfer
{
//this is private for the dma drive....app don't touch it,the driver will manger it
//link interface for more transfer to the controller...
rt_list_t
transfer_list
;
struct
fh81_dma
*
dma_controller
;
//this the mem add....the dma controller will load the setting to move data ....
//user don't touch it
struct
dw_lli
*
first_lli
;
rt_uint32_t
lli_size
;
//new add for allign get desc...
rt_uint32_t
actual_lli_size
;
//user could set paras below~~~
#define AUTO_FIND_CHANNEL
(0xff)
//transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel.
rt_uint32_t
channel_number
;
//which dma you want to use...for fh81....only 0!!!
rt_uint32_t
dma_number
;
//user should set the para below
#define
DMA_M2M (0) //
MEM <=> MEM
#define
DMA_M2P (1) //
MEM => peripheral A
#define
DMA_P2M (2) //
MEM <= peripheral A
#define
DMA_P2P (3) //
peripheral A <=> peripheral B
rt_uint32_t
fc_mode
;
//ip->mem. mem->mem. mem->ip
#define DMA_HW_HANDSHAKING
(0)
#define DMA_SW_HANDSHAKING
(1)
rt_uint32_t
src_hs
;
//src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t
src_per
;
//src hw handshake number
//rt_uint32_t
irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr)
#define
DW_DMA_SLAVE_WIDTH_8BIT
(0)
#define
DW_DMA_SLAVE_WIDTH_16BIT
(1)
#define
DW_DMA_SLAVE_WIDTH_32BIT
(2)
rt_uint32_t
src_width
;
//the user should reference the hw handshaking watermark..
#define DW_DMA_SLAVE_MSIZE_1
(0)
#define DW_DMA_SLAVE_MSIZE_4
(1)
#define DW_DMA_SLAVE_MSIZE_8
(2)
#define DW_DMA_SLAVE_MSIZE_16
(3)
#define DW_DMA_SLAVE_MSIZE_32
(4)
#define DW_DMA_SLAVE_MSIZE_64
(5)
#define DW_DMA_SLAVE_MSIZE_128
(6)
#define DW_DMA_SLAVE_MSIZE_256
(7)
rt_uint32_t
src_msize
;
rt_uint32_t
src_add
;
#define DW_DMA_SLAVE_INC
(0)
#define DW_DMA_SLAVE_DEC
(1)
#define DW_DMA_SLAVE_FIX
(2)
rt_uint32_t
src_inc_mode
;
//increase mode: increase or not change
//#define DMA_DST_HW_HANDSHAKING
(0)
//#define DMA_DST_SW_HANDSHAKING
(1)
rt_uint32_t
dst_hs
;
//src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t
dst_per
;
//dst hw handshake number
//#define
DW_DMA_SLAVE_WIDTH_8BIT
(0)
//#define
DW_DMA_SLAVE_WIDTH_16BIT
(1)
//#define
DW_DMA_SLAVE_WIDTH_32BIT
(2)
rt_uint32_t
dst_width
;
//#define DW_DMA_SLAVE_MSIZE_1
(0)
//#define DW_DMA_SLAVE_MSIZE_4
(1)
//#define DW_DMA_SLAVE_MSIZE_8
(2)
//#define DW_DMA_SLAVE_MSIZE_16
(3)
//#define DW_DMA_SLAVE_MSIZE_32
(4)
//#define DW_DMA_SLAVE_MSIZE_64
(5)
//#define DW_DMA_SLAVE_MSIZE_128
(6)
//#define DW_DMA_SLAVE_MSIZE_256
(7)
rt_uint32_t
dst_msize
;
rt_uint32_t
dst_add
;
//#define DW_DMA_SLAVE_INC
(0)
//#define DW_DMA_SLAVE_DEC
(1)
//#define DW_DMA_SLAVE_FIX
(2)
rt_uint32_t
dst_inc_mode
;
//increase mode: increase or not change
//total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT...
//exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes..
//exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes..
rt_uint32_t
trans_len
;
//this is used when dma finish transfer job
dma_complete_callback
complete_callback
;
void
*
complete_para
;
//for the driver data use the dma driver.
//this is used when dma before work..the user maybe need to set his own private para..
user_prepare
prepare_callback
;
void
*
prepare_para
;
//add cyclic para...
//period len..
rt_uint32_t
period_len
;
//this is private for the dma drive....app don't touch it,the driver will manger it
//link interface for more transfer to the controller...
rt_list_t
transfer_list
;
struct
fh81_dma
*
dma_controller
;
//this the mem add....the dma controller will load the setting to move data ....
//user don't touch it
struct
dw_lli
*
first_lli
;
rt_uint32_t
lli_size
;
//new add for allign get desc...
rt_uint32_t
actual_lli_size
;
//user could set paras below~~~
#define AUTO_FIND_CHANNEL
(0xff)
//transfer with which dma channel...if the data is 0xff, the driver will auto find a free channel.
rt_uint32_t
channel_number
;
//which dma you want to use...for fh81....only 0!!!
rt_uint32_t
dma_number
;
//user should set the para below
#define
DMA_M2M (0) //
MEM <=> MEM
#define
DMA_M2P (1) //
MEM => peripheral A
#define
DMA_P2M (2) //
MEM <= peripheral A
#define
DMA_P2P (3) //
peripheral A <=> peripheral B
rt_uint32_t
fc_mode
;
//ip->mem. mem->mem. mem->ip
#define DMA_HW_HANDSHAKING
(0)
#define DMA_SW_HANDSHAKING
(1)
rt_uint32_t
src_hs
;
//src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t
src_per
;
//src hw handshake number
//rt_uint32_t
irq_mode;//for each transfer,irq maybe not same. suggest for the default(transfer isr)
#define
DW_DMA_SLAVE_WIDTH_8BIT
(0)
#define
DW_DMA_SLAVE_WIDTH_16BIT
(1)
#define
DW_DMA_SLAVE_WIDTH_32BIT
(2)
rt_uint32_t
src_width
;
//the user should reference the hw handshaking watermark..
#define DW_DMA_SLAVE_MSIZE_1
(0)
#define DW_DMA_SLAVE_MSIZE_4
(1)
#define DW_DMA_SLAVE_MSIZE_8
(2)
#define DW_DMA_SLAVE_MSIZE_16
(3)
#define DW_DMA_SLAVE_MSIZE_32
(4)
#define DW_DMA_SLAVE_MSIZE_64
(5)
#define DW_DMA_SLAVE_MSIZE_128
(6)
#define DW_DMA_SLAVE_MSIZE_256
(7)
rt_uint32_t
src_msize
;
rt_uint32_t
src_add
;
#define DW_DMA_SLAVE_INC
(0)
#define DW_DMA_SLAVE_DEC
(1)
#define DW_DMA_SLAVE_FIX
(2)
rt_uint32_t
src_inc_mode
;
//increase mode: increase or not change
//#define DMA_DST_HW_HANDSHAKING
(0)
//#define DMA_DST_SW_HANDSHAKING
(1)
rt_uint32_t
dst_hs
;
//src
//if use hw handshaking ,you need to set the hw handshaking number, this SOC defined
rt_uint32_t
dst_per
;
//dst hw handshake number
//#define
DW_DMA_SLAVE_WIDTH_8BIT
(0)
//#define
DW_DMA_SLAVE_WIDTH_16BIT
(1)
//#define
DW_DMA_SLAVE_WIDTH_32BIT
(2)
rt_uint32_t
dst_width
;
//#define DW_DMA_SLAVE_MSIZE_1
(0)
//#define DW_DMA_SLAVE_MSIZE_4
(1)
//#define DW_DMA_SLAVE_MSIZE_8
(2)
//#define DW_DMA_SLAVE_MSIZE_16
(3)
//#define DW_DMA_SLAVE_MSIZE_32
(4)
//#define DW_DMA_SLAVE_MSIZE_64
(5)
//#define DW_DMA_SLAVE_MSIZE_128
(6)
//#define DW_DMA_SLAVE_MSIZE_256
(7)
rt_uint32_t
dst_msize
;
rt_uint32_t
dst_add
;
//#define DW_DMA_SLAVE_INC
(0)
//#define DW_DMA_SLAVE_DEC
(1)
//#define DW_DMA_SLAVE_FIX
(2)
rt_uint32_t
dst_inc_mode
;
//increase mode: increase or not change
//total sizes, unit: src_width/DW_DMA_SLAVE_WIDTH_8BIT...
//exg: src_width = DW_DMA_SLAVE_WIDTH_32BIT. trans_len = 2...means that: the dma will transfer 2*4 bytes..
//exg: src_width = DW_DMA_SLAVE_WIDTH_8BIT. trans_len = 6...means that: the dma will transfer 1*6 bytes..
rt_uint32_t
trans_len
;
//this is used when dma finish transfer job
dma_complete_callback
complete_callback
;
void
*
complete_para
;
//for the driver data use the dma driver.
//this is used when dma before work..the user maybe need to set his own private para..
user_prepare
prepare_callback
;
void
*
prepare_para
;
//add cyclic para...
//period len..
rt_uint32_t
period_len
;
};
...
...
@@ -223,13 +223,13 @@ struct dma_transfer{
/****************************************************************************
* #define section
*
add constant #define here if any
*
add constant #define here if any
***************************************************************************/
/****************************************************************************
* ADT section
*
add Abstract Data Type definition here
*
add Abstract Data Type definition here
***************************************************************************/
...
...
@@ -240,7 +240,7 @@ struct dma_transfer{
/****************************************************************************
* section
*
add function prototype here if any
*
add function prototype here if any
***************************************************************************/
rt_err_t
fh81_dma_register
(
struct
fh81_dma
*
fh81_dma_p
,
char
*
dma_name
);
...
...
bsp/fh8620/drivers/gpio.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -410,10 +410,10 @@ int fh_gpio_probe(void *priv_data)
int
i
;
if
(
gpio_obj
->
id
==
0
){
rt_hw_interrupt_install
(
gpio_obj
->
irq
,
fh_gpio_interrupt
,
(
void
*
)
gpio_obj
,
"gpio_0"
);
rt_hw_interrupt_install
(
gpio_obj
->
irq
,
fh_gpio_interrupt
,
(
void
*
)
gpio_obj
,
"gpio_0"
);
}
else
if
(
gpio_obj
->
id
==
1
){
rt_hw_interrupt_install
(
gpio_obj
->
irq
,
fh_gpio_interrupt
,
(
void
*
)
gpio_obj
,
"gpio_1"
);
rt_hw_interrupt_install
(
gpio_obj
->
irq
,
fh_gpio_interrupt
,
(
void
*
)
gpio_obj
,
"gpio_1"
);
}
...
...
bsp/fh8620/drivers/gpio.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef GPIO_H_
#define GPIO_H_
...
...
bsp/fh8620/drivers/i2c.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include <rtdevice.h>
#include <rthw.h>
#include "i2c.h"
...
...
@@ -50,25 +50,25 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms
{
struct
i2c_driver
*
i2c_drv
=
(
struct
i2c_driver
*
)
dev
->
priv
;
struct
fh_i2c_obj
*
i2c_obj
=
(
struct
fh_i2c_obj
*
)
i2c_drv
->
priv
;
rt_uint32_t
ic_con
;
rt_uint32_t
ic_con
;
/* if the slave address is ten bit address, ERROR*/
/* if the slave address is ten bit address, ERROR*/
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
flags
&
I2C_M_TEN
)
{
rt_kprintf
(
"ERROR: %s, ten bit address is NOT supported
\n
"
,
__func__
);
return
;
}
/* Disable the adapter */
I2C_WaitMasterIdle
(
i2c_obj
);
/* Disable the adapter */
I2C_WaitMasterIdle
(
i2c_obj
);
I2C_Enable
(
i2c_obj
,
RT_FALSE
);
I2C_Enable
(
i2c_obj
,
RT_FALSE
);
/* set the slave (target) address */
I2C_SetSlaveAddress
(
i2c_obj
,
msgs
[
i2c_drv
->
msg_write_idx
].
addr
);
/* set the slave (target) address */
I2C_SetSlaveAddress
(
i2c_obj
,
msgs
[
i2c_drv
->
msg_write_idx
].
addr
);
/* Enable interrupts */
I2C_SetInterruptMask
(
i2c_obj
,
DW_IC_INTR_DEFAULT_MASK
);
/* Enable interrupts */
I2C_SetInterruptMask
(
i2c_obj
,
DW_IC_INTR_DEFAULT_MASK
);
/* Enable the adapter */
I2C_Enable
(
i2c_obj
,
RT_TRUE
);
...
...
@@ -76,30 +76,30 @@ static void fh_i2c_xfer_init(struct rt_i2c_bus_device *dev, struct rt_i2c_msg ms
static
rt_size_t
fh_i2c_xfer
(
struct
rt_i2c_bus_device
*
dev
,
struct
rt_i2c_msg
msgs
[],
rt_uint32_t
num
)
struct
rt_i2c_msg
msgs
[],
rt_uint32_t
num
)
{
struct
i2c_driver
*
i2c_drv
=
(
struct
i2c_driver
*
)
dev
->
priv
;
struct
fh_i2c_obj
*
i2c_obj
=
(
struct
fh_i2c_obj
*
)
i2c_drv
->
priv
;
int
ret
;
struct
rt_i2c_msg
*
pmsg
=
RT_NULL
;
struct
rt_i2c_msg
*
pmsg
=
RT_NULL
;
PRINT_I2C_DBG
(
">>>>>>>>>>>>>%s start
\n
"
,
__func__
);
PRINT_I2C_DBG
(
">>>>>>>>>>>>>%s start
\n
"
,
__func__
);
rt_completion_init
(
&
i2c_drv
->
transfer_completion
);
ret
=
rt_mutex_take
(
i2c_drv
->
lock
,
RT_WAITING_FOREVER
);
if
(
ret
!=
RT_EOK
)
{
goto
done
;
}
i2c_drv
->
msgs
=
msgs
;
i2c_drv
->
msgs_num
=
num
;
i2c_drv
->
msg_read_idx
=
0
;
i2c_drv
->
msg_write_idx
=
0
;
i2c_drv
->
cmd_err
=
0
;
i2c_drv
->
msg_err
=
0
;
i2c_drv
->
status
=
STATUS_IDLE
;
i2c_obj
->
abort_source
=
0
;
if
(
ret
!=
RT_EOK
)
{
goto
done
;
}
i2c_drv
->
msgs
=
msgs
;
i2c_drv
->
msgs_num
=
num
;
i2c_drv
->
msg_read_idx
=
0
;
i2c_drv
->
msg_write_idx
=
0
;
i2c_drv
->
cmd_err
=
0
;
i2c_drv
->
msg_err
=
0
;
i2c_drv
->
status
=
STATUS_IDLE
;
i2c_obj
->
abort_source
=
0
;
ret
=
I2C_WaitDeviceIdle
(
i2c_obj
);
if
(
ret
<
0
)
...
...
@@ -108,51 +108,51 @@ static rt_size_t fh_i2c_xfer(struct rt_i2c_bus_device *dev,
//goto done;
}
fh_i2c_xfer_init
(
dev
,
msgs
,
num
);
fh_i2c_xfer_init
(
dev
,
msgs
,
num
);
ret
=
rt_completion_wait
(
&
i2c_drv
->
transfer_completion
,
RT_TICK_PER_SECOND
);
PRINT_I2C_DBG
(
"%s transfer finished
\n
"
,
"rt_completion_wait"
);
ret
=
rt_completion_wait
(
&
i2c_drv
->
transfer_completion
,
RT_TICK_PER_SECOND
);
PRINT_I2C_DBG
(
"%s transfer finished
\n
"
,
"rt_completion_wait"
);
if
(
ret
)
{
{
rt_kprintf
(
"ERROR: %s, transfer timeout
\n
"
,
__func__
);
I2C_SetDataCmd
(
i2c_obj
,
0x200
);
I2C_Init
(
i2c_obj
);
ret
=
-
RT_ETIMEOUT
;
goto
done
;
}
if
(
i2c_drv
->
msg_err
)
{
rt_kprintf
(
"i2c_priv->msg_err: %d
\n
"
,
i2c_drv
->
msg_err
);
ret
=
i2c_drv
->
msg_err
;
goto
done
;
}
/* no error */
if
(
!
i2c_drv
->
cmd_err
)
{
/* Disable the adapter */
I2C_WaitMasterIdle
(
i2c_obj
);
I2C_Enable
(
i2c_obj
,
RT_FALSE
);
ret
=
num
;
goto
done
;
}
/* We have an error */
if
(
i2c_drv
->
cmd_err
==
DW_IC_ERR_TX_ABRT
)
{
rt_kprintf
(
"ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT
\n
"
,
__func__
);
ret
=
I2C_HandleTxAbort
(
i2c_obj
);
goto
done
;
}
ret
=
1
;
ret
=
-
RT_ETIMEOUT
;
goto
done
;
}
if
(
i2c_drv
->
msg_err
)
{
rt_kprintf
(
"i2c_priv->msg_err: %d
\n
"
,
i2c_drv
->
msg_err
);
ret
=
i2c_drv
->
msg_err
;
goto
done
;
}
/* no error */
if
(
!
i2c_drv
->
cmd_err
)
{
/* Disable the adapter */
I2C_WaitMasterIdle
(
i2c_obj
);
I2C_Enable
(
i2c_obj
,
RT_FALSE
);
ret
=
num
;
goto
done
;
}
/* We have an error */
if
(
i2c_drv
->
cmd_err
==
DW_IC_ERR_TX_ABRT
)
{
rt_kprintf
(
"ERROR: %s, i2c_priv>cmd_err == DW_IC_ERR_TX_ABRT
\n
"
,
__func__
);
ret
=
I2C_HandleTxAbort
(
i2c_obj
);
goto
done
;
}
ret
=
1
;
done:
I2C_Enable
(
i2c_obj
,
RT_FALSE
);
rt_mutex_release
(
i2c_drv
->
lock
);
PRINT_I2C_DBG
(
">>>>>>>>>>>>>%s end
\n
"
,
__func__
);
return
ret
;
return
ret
;
}
...
...
@@ -167,164 +167,164 @@ static void i2c_fh_xfer_msg(struct rt_i2c_bus_device *dev)
{
struct
i2c_driver
*
i2c_drv
=
(
struct
i2c_driver
*
)
dev
->
priv
;
struct
fh_i2c_obj
*
i2c_obj
=
(
struct
fh_i2c_obj
*
)
i2c_drv
->
priv
;
struct
rt_i2c_msg
*
msgs
=
i2c_drv
->
msgs
;
rt_uint32_t
intr_mask
,
cmd
;
int
tx_limit
,
rx_limit
;
rt_uint32_t
addr
=
msgs
[
i2c_drv
->
msg_write_idx
].
addr
;
rt_uint32_t
buf_len
=
i2c_drv
->
tx_buf_len
;
rt_uint8_t
*
buf
=
i2c_drv
->
tx_buf
;
PRINT_I2C_DBG
(
"%s start, msgs_num: %d, write_idx: %d
\n
"
,
__func__
,
i2c_drv
->
msgs_num
,
i2c_drv
->
msg_write_idx
);
intr_mask
=
DW_IC_INTR_DEFAULT_MASK
;
for
(;
i2c_drv
->
msg_write_idx
<
i2c_drv
->
msgs_num
;
i2c_drv
->
msg_write_idx
++
)
{
/*
* if target address has changed, we need to
* reprogram the target address in the i2c
* adapter when we are done with this transfer
*/
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
addr
!=
addr
)
{
rt_kprintf
(
"ERROR: %s, invalid target address
\n
"
,
__func__
);
i2c_drv
->
msg_err
=
1
;
break
;
}
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
len
==
0
)
{
rt_kprintf
(
"ERROR: %s, invalid message length
\n
"
,
__func__
);
i2c_drv
->
msg_err
=
1
;
break
;
}
if
(
!
(
i2c_drv
->
status
&
STATUS_WRITE_IN_PROGRESS
))
{
/* new i2c_msg */
buf
=
msgs
[
i2c_drv
->
msg_write_idx
].
buf
;
buf_len
=
msgs
[
i2c_drv
->
msg_write_idx
].
len
;
PRINT_I2C_DBG
(
"new msg: len: %d, buf: 0x%x
\n
"
,
buf_len
,
buf
[
0
]);
}
tx_limit
=
i2c_obj
->
config
.
tx_fifo_depth
-
I2C_GetTransmitFifoLevel
(
i2c_obj
);
rx_limit
=
i2c_obj
->
config
.
rx_fifo_depth
-
I2C_GetReceiveFifoLevel
(
i2c_obj
);
while
(
buf_len
>
0
&&
tx_limit
>
0
&&
rx_limit
>
0
)
{
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
flags
&
RT_I2C_RD
)
{
cmd
=
0x100
;
rx_limit
--
;
}
else
{
cmd
=
*
buf
++
;
}
tx_limit
--
;
buf_len
--
;
if
(
!
buf_len
)
{
//2015-11-8 ar0130 bug fixed
while
(
I2C_GetTransmitFifoLevel
(
i2c_obj
));
cmd
|=
0x200
;
}
I2C_SetDataCmd
(
i2c_obj
,
cmd
);
}
i2c_drv
->
tx_buf
=
buf
;
i2c_drv
->
tx_buf_len
=
buf_len
;
if
(
buf_len
>
0
)
{
/* more bytes to be written */
i2c_drv
->
status
|=
STATUS_WRITE_IN_PROGRESS
;
break
;
}
else
{
i2c_drv
->
status
&=
~
STATUS_WRITE_IN_PROGRESS
;
}
}
/*
* If i2c_msg index search is completed, we don't need TX_EMPTY
* interrupt any more.
*/
if
(
i2c_drv
->
msg_write_idx
==
i2c_drv
->
msgs_num
)
intr_mask
&=
~
DW_IC_INTR_TX_EMPTY
;
if
(
i2c_drv
->
msg_err
)
{
rt_kprintf
(
"ERROR: %s, msg_err: %d
\n
"
,
__func__
,
i2c_drv
->
msg_err
);
intr_mask
=
0
;
}
I2C_SetInterruptMask
(
i2c_obj
,
intr_mask
);
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
struct
rt_i2c_msg
*
msgs
=
i2c_drv
->
msgs
;
rt_uint32_t
intr_mask
,
cmd
;
int
tx_limit
,
rx_limit
;
rt_uint32_t
addr
=
msgs
[
i2c_drv
->
msg_write_idx
].
addr
;
rt_uint32_t
buf_len
=
i2c_drv
->
tx_buf_len
;
rt_uint8_t
*
buf
=
i2c_drv
->
tx_buf
;
PRINT_I2C_DBG
(
"%s start, msgs_num: %d, write_idx: %d
\n
"
,
__func__
,
i2c_drv
->
msgs_num
,
i2c_drv
->
msg_write_idx
);
intr_mask
=
DW_IC_INTR_DEFAULT_MASK
;
for
(;
i2c_drv
->
msg_write_idx
<
i2c_drv
->
msgs_num
;
i2c_drv
->
msg_write_idx
++
)
{
/*
* if target address has changed, we need to
* reprogram the target address in the i2c
* adapter when we are done with this transfer
*/
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
addr
!=
addr
)
{
rt_kprintf
(
"ERROR: %s, invalid target address
\n
"
,
__func__
);
i2c_drv
->
msg_err
=
1
;
break
;
}
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
len
==
0
)
{
rt_kprintf
(
"ERROR: %s, invalid message length
\n
"
,
__func__
);
i2c_drv
->
msg_err
=
1
;
break
;
}
if
(
!
(
i2c_drv
->
status
&
STATUS_WRITE_IN_PROGRESS
))
{
/* new i2c_msg */
buf
=
msgs
[
i2c_drv
->
msg_write_idx
].
buf
;
buf_len
=
msgs
[
i2c_drv
->
msg_write_idx
].
len
;
PRINT_I2C_DBG
(
"new msg: len: %d, buf: 0x%x
\n
"
,
buf_len
,
buf
[
0
]);
}
tx_limit
=
i2c_obj
->
config
.
tx_fifo_depth
-
I2C_GetTransmitFifoLevel
(
i2c_obj
);
rx_limit
=
i2c_obj
->
config
.
rx_fifo_depth
-
I2C_GetReceiveFifoLevel
(
i2c_obj
);
while
(
buf_len
>
0
&&
tx_limit
>
0
&&
rx_limit
>
0
)
{
if
(
msgs
[
i2c_drv
->
msg_write_idx
].
flags
&
RT_I2C_RD
)
{
cmd
=
0x100
;
rx_limit
--
;
}
else
{
cmd
=
*
buf
++
;
}
tx_limit
--
;
buf_len
--
;
if
(
!
buf_len
)
{
//2015-11-8 ar0130 bug fixed
while
(
I2C_GetTransmitFifoLevel
(
i2c_obj
));
cmd
|=
0x200
;
}
I2C_SetDataCmd
(
i2c_obj
,
cmd
);
}
i2c_drv
->
tx_buf
=
buf
;
i2c_drv
->
tx_buf_len
=
buf_len
;
if
(
buf_len
>
0
)
{
/* more bytes to be written */
i2c_drv
->
status
|=
STATUS_WRITE_IN_PROGRESS
;
break
;
}
else
{
i2c_drv
->
status
&=
~
STATUS_WRITE_IN_PROGRESS
;
}
}
/*
* If i2c_msg index search is completed, we don't need TX_EMPTY
* interrupt any more.
*/
if
(
i2c_drv
->
msg_write_idx
==
i2c_drv
->
msgs_num
)
intr_mask
&=
~
DW_IC_INTR_TX_EMPTY
;
if
(
i2c_drv
->
msg_err
)
{
rt_kprintf
(
"ERROR: %s, msg_err: %d
\n
"
,
__func__
,
i2c_drv
->
msg_err
);
intr_mask
=
0
;
}
I2C_SetInterruptMask
(
i2c_obj
,
intr_mask
);
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
}
static
void
i2c_fh_read
(
struct
rt_i2c_bus_device
*
dev
)
{
struct
i2c_driver
*
i2c_drv
=
(
struct
i2c_driver
*
)
dev
->
priv
;
struct
fh_i2c_obj
*
i2c_obj
=
(
struct
fh_i2c_obj
*
)
i2c_drv
->
priv
;
struct
rt_i2c_msg
*
msgs
=
i2c_drv
->
msgs
;
int
rx_valid
;
PRINT_I2C_DBG
(
"%s start, msgs_num: %d, read_idx: %d
\n
"
,
__func__
,
i2c_drv
->
msgs_num
,
i2c_drv
->
msg_read_idx
);
for
(;
i2c_drv
->
msg_read_idx
<
i2c_drv
->
msgs_num
;
i2c_drv
->
msg_read_idx
++
)
{
rt_uint32_t
len
;
rt_uint8_t
*
buf
;
if
(
!
(
msgs
[
i2c_drv
->
msg_read_idx
].
flags
&
RT_I2C_RD
))
continue
;
if
(
!
(
i2c_drv
->
status
&
STATUS_READ_IN_PROGRESS
))
{
len
=
msgs
[
i2c_drv
->
msg_read_idx
].
len
;
buf
=
msgs
[
i2c_drv
->
msg_read_idx
].
buf
;
}
else
{
PRINT_I2C_DBG
(
"STATUS_READ_IN_PROGRESS
\n
"
);
len
=
i2c_drv
->
rx_buf_len
;
buf
=
i2c_drv
->
rx_buf
;
}
rx_valid
=
I2C_GetReceiveFifoLevel
(
i2c_obj
);
if
(
rx_valid
==
0
)
{
rt_kprintf
(
"ERROR: %s, rx_valid == 0
\n
"
,
__func__
);
}
PRINT_I2C_DBG
(
"%s, len=%d, rx_valid=%d
\n
"
,
__func__
,
len
,
rx_valid
);
for
(;
len
>
0
&&
rx_valid
>
0
;
len
--
,
rx_valid
--
)
{
*
buf
++
=
I2C_GetData
(
i2c_obj
);
}
PRINT_I2C_DBG
(
"i2c_fh_read, len: %d, buf[0]: 0x%x
\n
"
,
msgs
[
i2c_drv
->
msg_read_idx
].
len
,
msgs
[
i2c_drv
->
msg_read_idx
].
buf
[
0
]);
if
(
len
>
0
)
{
PRINT_I2C_DBG
(
"len > 0
\n
"
);
i2c_drv
->
status
|=
STATUS_READ_IN_PROGRESS
;
i2c_drv
->
rx_buf_len
=
len
;
i2c_drv
->
rx_buf
=
buf
;
return
;
}
else
i2c_drv
->
status
&=
~
STATUS_READ_IN_PROGRESS
;
}
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
struct
i2c_driver
*
i2c_drv
=
(
struct
i2c_driver
*
)
dev
->
priv
;
struct
fh_i2c_obj
*
i2c_obj
=
(
struct
fh_i2c_obj
*
)
i2c_drv
->
priv
;
struct
rt_i2c_msg
*
msgs
=
i2c_drv
->
msgs
;
int
rx_valid
;
PRINT_I2C_DBG
(
"%s start, msgs_num: %d, read_idx: %d
\n
"
,
__func__
,
i2c_drv
->
msgs_num
,
i2c_drv
->
msg_read_idx
);
for
(;
i2c_drv
->
msg_read_idx
<
i2c_drv
->
msgs_num
;
i2c_drv
->
msg_read_idx
++
)
{
rt_uint32_t
len
;
rt_uint8_t
*
buf
;
if
(
!
(
msgs
[
i2c_drv
->
msg_read_idx
].
flags
&
RT_I2C_RD
))
continue
;
if
(
!
(
i2c_drv
->
status
&
STATUS_READ_IN_PROGRESS
))
{
len
=
msgs
[
i2c_drv
->
msg_read_idx
].
len
;
buf
=
msgs
[
i2c_drv
->
msg_read_idx
].
buf
;
}
else
{
PRINT_I2C_DBG
(
"STATUS_READ_IN_PROGRESS
\n
"
);
len
=
i2c_drv
->
rx_buf_len
;
buf
=
i2c_drv
->
rx_buf
;
}
rx_valid
=
I2C_GetReceiveFifoLevel
(
i2c_obj
);
if
(
rx_valid
==
0
)
{
rt_kprintf
(
"ERROR: %s, rx_valid == 0
\n
"
,
__func__
);
}
PRINT_I2C_DBG
(
"%s, len=%d, rx_valid=%d
\n
"
,
__func__
,
len
,
rx_valid
);
for
(;
len
>
0
&&
rx_valid
>
0
;
len
--
,
rx_valid
--
)
{
*
buf
++
=
I2C_GetData
(
i2c_obj
);
}
PRINT_I2C_DBG
(
"i2c_fh_read, len: %d, buf[0]: 0x%x
\n
"
,
msgs
[
i2c_drv
->
msg_read_idx
].
len
,
msgs
[
i2c_drv
->
msg_read_idx
].
buf
[
0
]);
if
(
len
>
0
)
{
PRINT_I2C_DBG
(
"len > 0
\n
"
);
i2c_drv
->
status
|=
STATUS_READ_IN_PROGRESS
;
i2c_drv
->
rx_buf_len
=
len
;
i2c_drv
->
rx_buf
=
buf
;
return
;
}
else
i2c_drv
->
status
&=
~
STATUS_READ_IN_PROGRESS
;
}
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
}
/*
...
...
@@ -336,44 +336,44 @@ static void fh_i2c_interrupt(int this_irq, void *dev_id)
struct
i2c_driver
*
i2c_drv
=
dev_id
;
struct
rt_i2c_bus_device
*
i2c_bus_dev
=
i2c_drv
->
i2c_bus_dev
;
struct
fh_i2c_obj
*
i2c_obj
=
(
struct
fh_i2c_obj
*
)
i2c_drv
->
priv
;
rt_uint32_t
stat
;
stat
=
I2C_ClearAndGetInterrupts
(
i2c_obj
);
PRINT_I2C_DBG
(
"status: 0x%x, mask: 0x%x
\n
"
,
stat
,
I2C_GetInterruptMask
(
i2c_obj
));
if
(
stat
&
DW_IC_INTR_TX_ABRT
)
{
PRINT_I2C_DBG
(
"DW_IC_INTR_TX_ABRT
\n
"
);
i2c_drv
->
cmd_err
|=
DW_IC_ERR_TX_ABRT
;
i2c_drv
->
status
=
STATUS_IDLE
;
/*
* Anytime TX_ABRT is set, the contents of the tx/rx
* buffers are flushed. Make sure to skip them.
*/
I2C_SetInterruptMask
(
i2c_obj
,
0
);
goto
tx_aborted
;
}
if
(
stat
&
DW_IC_INTR_RX_FULL
)
{
i2c_fh_read
(
i2c_bus_dev
);
}
if
(
stat
&
DW_IC_INTR_TX_EMPTY
)
{
i2c_fh_xfer_msg
(
i2c_bus_dev
);
}
/*
* No need to modify or disable the interrupt mask here.
* i2c_fh_xfer_msg() will take care of it according to
* the current transmit status.
*/
rt_uint32_t
stat
;
stat
=
I2C_ClearAndGetInterrupts
(
i2c_obj
);
PRINT_I2C_DBG
(
"status: 0x%x, mask: 0x%x
\n
"
,
stat
,
I2C_GetInterruptMask
(
i2c_obj
));
if
(
stat
&
DW_IC_INTR_TX_ABRT
)
{
PRINT_I2C_DBG
(
"DW_IC_INTR_TX_ABRT
\n
"
);
i2c_drv
->
cmd_err
|=
DW_IC_ERR_TX_ABRT
;
i2c_drv
->
status
=
STATUS_IDLE
;
/*
* Anytime TX_ABRT is set, the contents of the tx/rx
* buffers are flushed. Make sure to skip them.
*/
I2C_SetInterruptMask
(
i2c_obj
,
0
);
goto
tx_aborted
;
}
if
(
stat
&
DW_IC_INTR_RX_FULL
)
{
i2c_fh_read
(
i2c_bus_dev
);
}
if
(
stat
&
DW_IC_INTR_TX_EMPTY
)
{
i2c_fh_xfer_msg
(
i2c_bus_dev
);
}
/*
* No need to modify or disable the interrupt mask here.
* i2c_fh_xfer_msg() will take care of it according to
* the current transmit status.
*/
tx_aborted:
if
((
stat
&
(
DW_IC_INTR_TX_ABRT
|
DW_IC_INTR_STOP_DET
))
||
i2c_drv
->
msg_err
)
rt_completion_done
(
&
i2c_drv
->
transfer_completion
);
if
((
stat
&
(
DW_IC_INTR_TX_ABRT
|
DW_IC_INTR_STOP_DET
))
||
i2c_drv
->
msg_err
)
rt_completion_done
(
&
i2c_drv
->
transfer_completion
);
}
...
...
@@ -464,64 +464,64 @@ void rt_hw_i2c_init(void)
}
static
rt_err_t
fh_i2c_read_reg
(
struct
rt_i2c_bus_device
*
fh81_i2c
,
rt_uint16_t
reg
,
rt_uint8_t
*
data
)
{
struct
rt_i2c_msg
msg
[
2
];
rt_uint8_t
send_buf
[
2
];
rt_uint8_t
recv_buf
[
1
]
=
{
0
};
rt_uint16_t
reg
,
rt_uint8_t
*
data
)
{
struct
rt_i2c_msg
msg
[
2
];
rt_uint8_t
send_buf
[
2
];
rt_uint8_t
recv_buf
[
1
]
=
{
0
};
PRINT_I2C_DBG
(
"%s start
\n
"
,
__func__
);
PRINT_I2C_DBG
(
"%s start
\n
"
,
__func__
);
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf
[
0
]
=
(
reg
&
0xFF
);
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf
[
0
]
=
(
reg
&
0xFF
);
msg
[
0
].
addr
=
0x51
;
msg
[
0
].
flags
=
RT_I2C_WR
;
msg
[
0
].
len
=
1
;
msg
[
0
].
buf
=
send_buf
;
msg
[
0
].
addr
=
0x51
;
msg
[
0
].
flags
=
RT_I2C_WR
;
msg
[
0
].
len
=
1
;
msg
[
0
].
buf
=
send_buf
;
msg
[
1
].
addr
=
0x51
;
msg
[
1
].
flags
=
RT_I2C_RD
;
msg
[
1
].
len
=
1
;
msg
[
1
].
buf
=
recv_buf
;
msg
[
1
].
addr
=
0x51
;
msg
[
1
].
flags
=
RT_I2C_RD
;
msg
[
1
].
len
=
1
;
msg
[
1
].
buf
=
recv_buf
;
rt_i2c_transfer
(
fh81_i2c
,
msg
,
2
);
*
data
=
recv_buf
[
0
];
return
RT_EOK
;
rt_i2c_transfer
(
fh81_i2c
,
msg
,
2
);
*
data
=
recv_buf
[
0
];
return
RT_EOK
;
}
static
rt_err_t
fh_i2c_write_reg
(
struct
rt_i2c_bus_device
*
fh81_i2c
,
rt_uint16_t
reg
,
rt_uint8_t
data
)
{
struct
rt_i2c_msg
msg
;
rt_uint8_t
send_buf
[
3
];
rt_uint16_t
reg
,
rt_uint8_t
data
)
{
struct
rt_i2c_msg
msg
;
rt_uint8_t
send_buf
[
3
];
PRINT_I2C_DBG
(
"%s start
\n
"
,
__func__
);
PRINT_I2C_DBG
(
"%s start
\n
"
,
__func__
);
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf
[
1
]
=
(
reg
&
0xFF
);
send_buf
[
2
]
=
data
;
// send_buf[0] = ((reg >> 8) & 0xff);
send_buf
[
1
]
=
(
reg
&
0xFF
);
send_buf
[
2
]
=
data
;
msg
.
addr
=
0x51
;
msg
.
flags
=
RT_I2C_WR
;
msg
.
len
=
2
;
msg
.
buf
=
send_buf
;
msg
.
addr
=
0x51
;
msg
.
flags
=
RT_I2C_WR
;
msg
.
len
=
2
;
msg
.
buf
=
send_buf
;
rt_i2c_transfer
(
fh81_i2c
,
&
msg
,
1
);
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
return
RT_EOK
;
rt_i2c_transfer
(
fh81_i2c
,
&
msg
,
1
);
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
return
RT_EOK
;
}
void
i2c_test_sensor
()
{
struct
rt_i2c_bus_device
*
fh81_i2c
;
struct
rt_i2c_msg
msg
[
2
];
rt_uint8_t
data
[
1
]
=
{
0x00
};
struct
rt_i2c_bus_device
*
fh81_i2c
;
struct
rt_i2c_msg
msg
[
2
];
rt_uint8_t
data
[
1
]
=
{
0x00
};
fh81_i2c
=
rt_i2c_bus_device_find
(
"i2c1"
);
fh81_i2c
=
rt_i2c_bus_device_find
(
"i2c1"
);
fh_i2c_write_reg
(
fh81_i2c
,
0x04
,
0x02
);
fh_i2c_write_reg
(
fh81_i2c
,
0x04
,
0x02
);
fh_i2c_read_reg
(
fh81_i2c
,
0x02
,
data
);
fh_i2c_read_reg
(
fh81_i2c
,
0x02
,
data
);
rt_kprintf
(
"data read from 0x3038 is 0x%x
\r\n
"
,
data
[
0
]);
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
rt_kprintf
(
"data read from 0x3038 is 0x%x
\r\n
"
,
data
[
0
]);
PRINT_I2C_DBG
(
"%s end
\n
"
,
__func__
);
}
#ifdef RT_USING_FINSH
#include <finsh.h>
...
...
bsp/fh8620/drivers/i2c.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
bsp/fh8620/drivers/interrupt.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -105,10 +105,10 @@ void rt_hw_interrupt_init(void)
{
rt_int32_t
i
;
register
rt_uint32_t
idx
;
fh_intc
*
p
=
(
fh_intc
*
)
INTC_REG_BASE
;
fh_intc
*
p
=
(
fh_intc
*
)
INTC_REG_BASE
;
ictl_close_all_isr
(
p
);
ictl_close_all_isr
(
p
);
/* init exceptions table */
for
(
idx
=
0
;
idx
<
MAX_HANDLERS
;
idx
++
)
{
...
...
@@ -137,27 +137,27 @@ void rt_hw_interrupt_init(void)
void
rt_hw_interrupt_mask
(
int
irq
)
{
fh_intc
*
p
=
(
fh_intc
*
)
INTC_REG_BASE
;
fh_intc
*
p
=
(
fh_intc
*
)
INTC_REG_BASE
;
/* Disable irq on AIC */
ictl_mask_isr
(
p
,
irq
);
ictl_mask_isr
(
p
,
irq
);
//
if (irq < 32)
//
p->IRQ_EN_L &= ~(1 << irq);
//
else
//
p->IRQ_EN_H &= ~(1 << (irq - 32));
//
if (irq < 32)
//
p->IRQ_EN_L &= ~(1 << irq);
//
else
//
p->IRQ_EN_H &= ~(1 << (irq - 32));
}
void
rt_hw_interrupt_umask
(
int
irq
)
{
fh_intc
*
p
=
(
fh_intc
*
)
INTC_REG_BASE
;
fh_intc
*
p
=
(
fh_intc
*
)
INTC_REG_BASE
;
/* Enable irq on AIC */
ictl_unmask_isr
(
p
,
irq
);
ictl_unmask_isr
(
p
,
irq
);
// if (irq < 32)
//
p->IRQ_EN_L |= 1 << irq;
//
else
//
p->IRQ_EN_H |= 1 << (irq - 32);
//
p->IRQ_EN_L |= 1 << irq;
//
else
//
p->IRQ_EN_H |= 1 << (irq - 32);
}
/**
...
...
@@ -168,7 +168,7 @@ void rt_hw_interrupt_umask(int irq)
* @param name the interrupt name
* @return old handler
*/
rt_isr_handler_t
rt_hw_interrupt_install
(
int
vector
,
rt_isr_handler_t
handler
,
rt_isr_handler_t
rt_hw_interrupt_install
(
int
vector
,
rt_isr_handler_t
handler
,
void
*
param
,
const
char
*
name
)
{
rt_isr_handler_t
old_handler
=
RT_NULL
;
...
...
@@ -182,7 +182,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
irq_desc
[
vector
].
param
=
param
;
#ifdef RT_USING_INTERRUPT_INFO
rt_snprintf
(
irq_desc
[
vector
].
name
,
RT_NAME_MAX
-
1
,
"%s"
,
name
);
irq_desc
[
vector
].
counter
=
0
;
irq_desc
[
vector
].
counter
=
0
;
#endif
}
}
...
...
@@ -195,7 +195,7 @@ void list_irq(void)
{
#ifdef RT_USING_INTERRUPT_INFO
int
irq
;
int
irq
;
rt_kprintf
(
"number
\t
count
\t
name
\n
"
);
for
(
irq
=
0
;
irq
<
MAX_HANDLERS
;
irq
++
)
{
...
...
bsp/fh8620/drivers/interrupt.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -35,6 +35,6 @@ void rt_hw_interrupt_init(void);
void
rt_hw_interrupt_mask
(
int
irq
);
void
rt_hw_interrupt_umask
(
int
irq
);
rt_isr_handler_t
rt_hw_interrupt_install
(
int
vector
,
rt_isr_handler_t
handler
,
void
*
param
,
const
char
*
name
);
void
*
param
,
const
char
*
name
);
#endif
/* INTERRUPT_H_ */
bsp/fh8620/drivers/mem_process.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -28,52 +28,52 @@
#include <rtdevice.h>
#include "mmu.h"
#define CHANGLINE_SIZE
(1)
#define CHANGLINE_SIZE
(1)
//#define FH_DBG_MEM_PROCESS
#ifdef FH_DBG_MEM_PROCESS
void
mem_input
(
rt_uint32_t
t_addr
,
rt_uint32_t
t_size
,
rt_uint8_t
t_value
)
{
rt_kprintf
(
"mem process add:%x
\t
size:%x
\t
value:%x
\n
"
,
t_addr
,
t_size
,
t_value
);
rt_kprintf
(
"mem process add:%x
\t
size:%x
\t
value:%x
\n
"
,
t_addr
,
t_size
,
t_value
);
rt_memset
((
void
*
)
t_addr
,
t_value
,
t_size
);
rt_memset
((
void
*
)
t_addr
,
t_value
,
t_size
);
mmu_clean_invalidated_dcache
(
t_addr
,
t_size
);
mmu_clean_invalidated_dcache
(
t_addr
,
t_size
);
}
void
mem_output
(
rt_uint32_t
t_addr
,
rt_uint32_t
t_size
)
{
rt_uint32_t
i
;
rt_uint32_t
cnt
=
0
;
rt_uint32_t
value
;
rt_uint32_t
addr
,
size
;
rt_uint32_t
i
;
rt_uint32_t
cnt
=
0
;
rt_uint32_t
value
;
rt_uint32_t
addr
,
size
;
addr
=
t_addr
;
if
(
t_size
%
4
)
{
rt_kprintf
(
"mem must be alligned
\n
"
);
}
size
=
t_size
/
4
;
rt_int32_t
*
p
=
(
rt_uint32_t
*
)
t_addr
;
addr
=
t_addr
;
if
(
t_size
%
4
)
{
rt_kprintf
(
"mem must be alligned
\n
"
);
}
size
=
t_size
/
4
;
rt_int32_t
*
p
=
(
rt_uint32_t
*
)
t_addr
;
//mmu_clean_invalidated_dcache(addr,t_size);
rt_kprintf
(
"mem process add:0x%x
\t
size:0x%x
\n
"
,
addr
,
t_size
);
rt_kprintf
(
"0x%08x:"
,
addr
);
for
(
i
=
0
;
i
<
size
;
i
++
)
{
value
=
*
p
++
;
if
((
cnt
/
CHANGLINE_SIZE
)
&&
(
cnt
%
CHANGLINE_SIZE
==
0
))
{
rt_kprintf
(
"
\n
"
);
}
if
(
cnt
/
CHANGLINE_SIZE
&&
(
cnt
%
CHANGLINE_SIZE
)
==
0
)
{
rt_kprintf
(
"0x%08x:"
,
addr
+
i
*
4
);
}
rt_kprintf
(
"
\t
%08x"
,
value
);
cnt
++
;
//mmu_clean_invalidated_dcache(addr,t_size);
rt_kprintf
(
"mem process add:0x%x
\t
size:0x%x
\n
"
,
addr
,
t_size
);
rt_kprintf
(
"0x%08x:"
,
addr
);
for
(
i
=
0
;
i
<
size
;
i
++
)
{
value
=
*
p
++
;
if
((
cnt
/
CHANGLINE_SIZE
)
&&
(
cnt
%
CHANGLINE_SIZE
==
0
))
{
rt_kprintf
(
"
\n
"
);
}
if
(
cnt
/
CHANGLINE_SIZE
&&
(
cnt
%
CHANGLINE_SIZE
)
==
0
)
{
rt_kprintf
(
"0x%08x:"
,
addr
+
i
*
4
);
}
rt_kprintf
(
"
\t
%08x"
,
value
);
cnt
++
;
}
rt_kprintf
(
"
\n
"
);
}
rt_kprintf
(
"
\n
"
);
}
#endif
...
...
bsp/fh8620/drivers/mmc.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
bsp/fh8620/drivers/mmc.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
bsp/fh8620/drivers/pwm.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
@@ -193,7 +193,7 @@ int fh_pwm_probe(void *priv_data)
rt_kprintf
(
"ERROR: %s rt_device calloc failed
\n
"
,
__func__
);
return
-
RT_ENOMEM
;
}
pwm_dev
->
user_data
=
&
pwm_drv
;
pwm_dev
->
open
=
fh_pwm_open
;
pwm_dev
->
close
=
fh_pwm_close
;
...
...
bsp/fh8620/drivers/pwm.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef PWM_H_
#define PWM_H_
...
...
bsp/fh8620/drivers/sadc.c
浏览文件 @
49ef3cdc
此差异已折叠。
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bsp/fh8620/drivers/sadc.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef SADC_H_
#define SADC_H_
...
...
@@ -33,57 +33,57 @@
/****************************************************************************
* #define section
*
add constant #define here if any
*
add constant #define here if any
***************************************************************************/
//#define FH_SADC_PROC_FILE "driver/sadc"
#define MAX_CHANNEL_NO
(8)
#define SADC_REF
(3300)
#define SADC_MAX_AD_VALUE
(0x3ff)
#define LOOP_MODE
(0x55)
#define ISR_MODE
(0xAA)
#define MAX_CHANNEL_NO
(8)
#define SADC_REF
(3300)
#define SADC_MAX_AD_VALUE
(0x3ff)
#define LOOP_MODE
(0x55)
#define ISR_MODE
(0xAA)
#define SADC_INIT_ALREADY
(0x33)
#define SADC_INIT_NOT_YET
(0)
#define SADC_INIT_ALREADY
(0x33)
#define SADC_INIT_NOT_YET
(0)
#define SADC_CMD_READ_RAW_DATA
(0x22)
#define SADC_CMD_READ_VOLT
(0x33)
#define SADC_CMD_DISABLE
(0x44)
#define SADC_CMD_READ_RAW_DATA
(0x22)
#define SADC_CMD_READ_VOLT
(0x33)
#define SADC_CMD_DISABLE
(0x44)
/****************************************************************************
* ADT section
*
add Abstract Data Type definition here
*
add Abstract Data Type definition here
***************************************************************************/
struct
wrap_sadc_reg
{
rt_uint32_t
sadc_cmd
;
rt_uint32_t
sadc_control
;
rt_uint32_t
sadc_ier
;
rt_uint32_t
sadc_int_status
;
rt_uint32_t
sadc_dout0
;
rt_uint32_t
sadc_dout1
;
rt_uint32_t
sadc_dout2
;
rt_uint32_t
sadc_dout3
;
rt_uint32_t
sadc_debuge0
;
rt_uint32_t
sadc_status
;
rt_uint32_t
sadc_cnt
;
rt_uint32_t
sadc_timeout
;
rt_uint32_t
sadc_cmd
;
rt_uint32_t
sadc_control
;
rt_uint32_t
sadc_ier
;
rt_uint32_t
sadc_int_status
;
rt_uint32_t
sadc_dout0
;
rt_uint32_t
sadc_dout1
;
rt_uint32_t
sadc_dout2
;
rt_uint32_t
sadc_dout3
;
rt_uint32_t
sadc_debuge0
;
rt_uint32_t
sadc_status
;
rt_uint32_t
sadc_cnt
;
rt_uint32_t
sadc_timeout
;
};
struct
wrap_sadc_obj
{
rt_uint32_t
id
;
void
*
regs
;
rt_uint32_t
irq_no
;
rt_uint32_t
init_flag
;
rt_uint32_t
active_channel_no
;
rt_uint32_t
active_channel_status
;
rt_uint16_t
channel_data
[
MAX_CHANNEL_NO
];
rt_uint32_t
error_rec
;
rt_uint32_t
en_isr
;
rt_uint32_t
sample_mode
;
struct
rt_mutex
lock
;
struct
rt_semaphore
completion
;
rt_uint32_t
id
;
void
*
regs
;
rt_uint32_t
irq_no
;
rt_uint32_t
init_flag
;
rt_uint32_t
active_channel_no
;
rt_uint32_t
active_channel_status
;
rt_uint16_t
channel_data
[
MAX_CHANNEL_NO
];
rt_uint32_t
error_rec
;
rt_uint32_t
en_isr
;
rt_uint32_t
sample_mode
;
struct
rt_mutex
lock
;
struct
rt_semaphore
completion
;
//bind to the rtdev..
rt_device_t
rt_dev
;
...
...
@@ -91,8 +91,8 @@ struct wrap_sadc_obj {
};
typedef
struct
{
rt_uint32_t
channel
;
rt_uint32_t
sadc_data
;
rt_uint32_t
channel
;
rt_uint32_t
sadc_data
;
}
SADC_INFO
;
...
...
@@ -102,7 +102,7 @@ typedef struct{
/****************************************************************************
* section
*
add function prototype here if any
*
add function prototype here if any
***************************************************************************/
void
rt_hw_sadc_init
(
void
);
#endif
...
...
bsp/fh8620/drivers/spi_fh_adapt.c
浏览文件 @
49ef3cdc
此差异已折叠。
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bsp/fh8620/drivers/spi_fh_adapt.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
/*
* spi_fh_adapt.h
*
...
...
bsp/fh8620/drivers/ssi.c
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bsp/fh8620/drivers/ssi.h
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bsp/fh8620/drivers/trap.c
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bsp/fh8620/drivers/uart.c
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bsp/fh8620/drivers/uart.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef UART_H_
#define UART_H_
...
...
bsp/fh8620/drivers/wdt.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#include "fh_def.h"
#include "wdt.h"
#include "interrupt.h"
...
...
bsp/fh8620/drivers/wdt.h
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,12 +18,12 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
*/
#ifndef WDT_H_
#define WDT_H_
...
...
bsp/fh8620/libraries/driverlib/fh_gpio.c
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bsp/fh8620/libraries/driverlib/fh_i2c.c
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bsp/fh8620/libraries/driverlib/fh_ictl.c
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bsp/fh8620/libraries/driverlib/fh_mmc.c
浏览文件 @
49ef3cdc
/*
* This file is part of FH8620 BSP for RT-Thread distribution.
*
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
*
All rights reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -18,7 +18,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
Visit http://www.fullhan.com to get contact with Fullhan.
*
* Change Logs:
* Date Author Notes
...
...
bsp/fh8620/libraries/driverlib/fh_pwm.c
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bsp/fh8620/libraries/driverlib/fh_sdio.c
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bsp/fh8620/libraries/driverlib/fh_spi.c
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bsp/fh8620/libraries/inc/fh_uart.h
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