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  1. 08 1月, 2009 4 次提交
    • A
      fastboot: Make libata initialization even more async · f29d3b23
      由 Arjan van de Ven 提交于 
      As suggested by Linus: Don't do the libata init in 2 separate
steps with a global sync inbetween, but do it as one async step,
with a local sync before registering the device.

This cuts the boottime on my machine with 2 sata controllers down
significantly, and it seems to work. Would be nice if the libata
folks take a good look at this patch though..
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
      f29d3b23
    • A
      fastboot: make the libata port scan asynchronous · 79318057
      由 Arjan van de Ven 提交于 
      This patch makes the libata port scanning asynchronous (per device).
There is a synchronization point before doing the actual disk scan
so that device ordering is not affected.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
      79318057
    • A
      fastboot: make scsi probes asynchronous · 4ace92fc
      由 Arjan van de Ven 提交于 
      This patch makes part of the scsi probe (which is mostly device spin up and the
partition scan) asynchronous. Only the part that runs after getting the device
number allocated is asynchronous, ensuring that device numbering remains stable.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
      4ace92fc
    • A
      async: Asynchronous function calls to speed up kernel boot · 22a9d645
      由 Arjan van de Ven 提交于 
      Right now, most of the kernel boot is strictly synchronous, such that
various hardware delays are done sequentially.

In order to make the kernel boot faster, this patch introduces
infrastructure to allow doing some of the initialization steps
asynchronously, which will hide significant portions of the hardware delays
in practice.

In order to not change device order and other similar observables, this
patch does NOT do full parallel initialization.

Rather, it operates more in the way an out of order CPU does; the work may
be done out of order and asynchronous, but the observable effects
(instruction retiring for the CPU) are still done in the original sequence.
Signed-off-by: NArjan van de Ven <arjan@linux.intel.com>
      22a9d645
  3. 07 1月, 2009 36 次提交