- 16 2月, 2017 1 次提交
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由 Christopher Covington 提交于
The Qualcomm Datacenter Technologies QDF2400 family of SoCs contains a custom (non-PrimeCell) implementation of the SBSA UART. Occasionally the BUSY bit in the Flag Register gets stuck as 1, erratum 44 for both 2432v1 and 2400v1 SoCs.Checking that the Transmit FIFO Empty (TXFE) bit is 0, instead of checking that the BUSY bit is 1, works around the issue. To facilitate this substitution of flags and values, introduce vendor-specific inversion of Feature Register bits when UART AMBA Port (UAP) data is available. For the earlycon case, prior to UAP availability, implement alternative putc and early_write functions. Similar to what how ARMv8 ACPI PCI quirks are detected during MCFG parsing, check the OEM fields of the Serial Port Console Redirection (SPCR) ACPI table to determine if the current platform is known to be affected by the erratum. Signed-off-by: NChristopher Covington <cov@codeaurora.org> Acked-by: NRussell King <rmk+kernel@armlinux.org.uk> Acked-by: NTimur Tabi <timur@codeaurora.org> Acked-by: NMark Rutland <mark.rutland@arm.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 15 2月, 2017 1 次提交
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由 Romain Izard 提交于
The fractional baud rate generator is available when using the asynchronous mode of Atmel USART controllers. It makes it possible to use higher baudrates, in exchange for a less precise clock with a variable duty cycle. The existing code restricts its use to the normal mode of the USART controller, following the recommendation from the datasheet for the first chip embedding this type of controller. This recommendation has been removed from the documentation for the newer chips. After verification, all revisions of this controller should be able to use the fractional baud rate generator with the different asynchronous modes. Removing the condition on ATMEL_US_USMODE makes it possible to get correct baudrates at high speed in more cases. This was tested with a board using an Atmel SAMA5D2 chip and a TI WL1831 WiFi/Bluetooth combo chip at 3 Mbauds, with hardware flow control enabled. Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com> Acked-by: NLudovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: NRichard Genoud <richard.genoud@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 10 2月, 2017 11 次提交
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由 Sergio Valverde 提交于
An extra "init.h" include is found in the HVC console code. As such, the extra line is deleted. Signed-off-by: NSergio Valverde <vlvrdv@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
Use pci_alloc_irq_vectors to enable MSI when available. At least the XR17V352 supports this. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
None of these registers is relevant for the userspace API. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
Became obsolete with the split-out of 8250_exar. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
Those are Exar-based, too. With the required refactoring of the code to fit into 8250_exar, we automatically fix the same issue pci_xr17v35x_setup had before: 8XMODE, FCTL, TXTRG and RXTRG were always only set for port 0. Now they are initialized for the correct target port by using port.membase. Now we can also cleanly fix the blacklist of 8250_pci so that all Commtech devices are rejected and 8250_exar can handle them. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
According to the XR17V352 manual, bit 4 is IrDA control and bit 5 for 485. Fortunately, no driver used them so far. Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
So far, pci_xr17v35x_setup always initialized 8XMODE, FCTR & Co. for port 0 because it used the address of that port instead of moving the pointer according to the port number. Fix this and remove the unneeded temporary ioremap by moving default_setup up and reusing the membase it fills into the port structure. Fixes: 14faa8cc ("tty/8250 Add support for Commtech's Fastcom Async-335 and Fastcom Async-PCIe cards") Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Jan Kiszka 提交于
pcim_iomap_table only returns the table of mapping, it does not perform them. For that, we need to call pcim_iomap, but only if that mapping was not done before. Fixes: d0aeaa83 ("serial: exar: split out the exar code from 8250_pci") Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
1. Do not set the RX trigger level for software timeout devices on reset; there is no timeout by default, and data will rot. 2. Do set the RX trigger level for hardware timeout devices when set via sysfs attribute. Fixes SCIFA-type serial consoles. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Alexandre Belloni 提交于
When going to suspend, the UART registers may be lost because the power to VDDcore is cut. This is not an issue in the normal case but when no_console_suspend is used, we need to restore the registers in order to get a functional console. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Reviewed-by: NNicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Douglas Anderson 提交于
On a Rockchip rk3399-based board during suspend/resume testing, we found that we could get the console UART into a state where it would print this to the console a lot: serial8250: too much work for irq42 Followed eventually by: NMI watchdog: BUG: soft lockup - CPU#0 stuck for 11s! Upon debugging I found that we're in this state: iir = 0x000000cc lsr = 0x00000060 It appears that somehow we have a RX Timeout interrupt but there is no actual data present to receive. When we're in this state the UART driver claims that it handled the interrupt but it actually doesn't really do anything. This means that we keep getting the interrupt over and over again. Normally we don't actually need to do anything special to handle a RX Timeout interrupt. We'll notice that there is some data ready and we'll read it, which will end up clearing the RX Timeout. In this case we have a problem specifically because we got the RX TImeout without any data. Reading a bogus byte is confirmed to get us out of this state. It's unclear how exactly the UART got into this state, but it is known that the UART lines are essentially undriven and unpowered during suspend, so possibly during resume some garbage / half transmitted bits are seen on the line and put the UART into this state. The UART on the rk3399 is a DesignWare based 8250 UART. From mailing list posts, it appears that other people have run into similar problems with DesignWare based IP. Presumably this problem is unique to that IP, so I have placed the workaround there to avoid possibly of accidentally triggering bad behavior on other IP. Also note the RX Timeout behaves very differently in the DMA case, for for now the workaround is only applied to the non-DMA case. Signed-off-by: NDouglas Anderson <dianders@chromium.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 09 2月, 2017 2 次提交
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由 Dan Carpenter 提交于
My static checker complains that we don't have any error handling here. It's simple enough to add it. Fixes: bed35c6d ("serdev: add a tty port controller driver") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Wei Yongjun 提交于
Fixes the following sparse warning: drivers/tty/serial/8250/8250_pci.c:3916:6: warning: symbol 'pciserial_detach_ports' was not declared. Should it be static? Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 06 2月, 2017 14 次提交
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由 Lee Jones 提交于
Hardware flow-control capability must be specified at a platform level in order to inform the ASC driver that the platform is capable (i.e. are the lines wired up, etc). STiH4{07,10} devices are indeed capable, so let's provide the property. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
Having just defined some new Pinctrl groups for when HW flow-control is {en,dis}abled, let's reference them for use within the driver. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
Each serial port which supports HW flow-control should have 2 Pinctrl groups. One for when HW flow-control is in progress, where the IP will take over controlling the lines and another group which enables the lines to be toggled using GPIO mechanisms. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
When hardware flow-control is disabled, manual toggling of the UART's reset line (RTS) using userland applications (e.g. stty) is not possible, since the ASC IP does not provide this functionality in the same was as some other IPs do. Thus, we have to do this manually. This patch configures the UART RTS line as a GPIO for manipulation within the UART driver when HW flow-control is not enabled. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
'uart-has-rtscts' property and 'rts-gpios|cts-gpios' are normally mutually exclusive, however it is possible for some drivers to have a dynamic approach, meaning that both properties can be relevant. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
The initial binding 'st,hw-flow-control' isn't used anywhere, in neither in upstream nor downstream kernels. It isn't even documented in dt-bindings, so we can safely assume it's safe to swap to the generic one. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
When hardware flow-control is disabled, manual toggling of the UART's reset line (RTS) using userland applications (e.g. stty) is not possible, since the ASC IP does not provide this functionality in the same was as some other IPs do. Thus, we have to do this manually. This patch ensures that when HW flow-control is disabled the RTS/CTS lines are free to be registered via the GPIO API. It also ensures any registered GPIO lines are unregistered when HW flow-control is requested, allowing the IP to control them automatically. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
There are now 2 possible separate/different Pinctrl states which can be provided from platform data. One which encompasses the lines required for HW flow-control (CTS/RTS) and another which does not specify these lines, such that they can be used via GPIO mechanisms for manually toggling (i.e. from a request by `stty`). Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
Until this point, it has not been possible for userland serial applications (e.g. stty) to toggle the UART RTS line. This can be useful with certain configurations. For example, when using a Mezzanine on a Linaro 96board, RTS line is used to take the on-board microcontroller in and out of reset. Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Lee Jones 提交于
The datasheet states: "If the MODE field selects an 8-bit frame then this [parity error] bit is undefined. Software should ignore this bit when reading 8-bit frames." Acked-by: NPeter Griffin <peter.griffin@linaro.org> Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ian Abbott 提交于
The MKS Instruments SCOM-0800 and SCOM-0801 cards (originally by Tenta Technologies) are 3U CompactPCI serial cards with 4 and 8 serial ports, respectively. The first 4 ports are implemented by an OX16PCI954 chip, and the second 4 ports are implemented by an OX16C954 chip on a local bus, bridged by the second PCI function of the OX16PCI954. The ports are jumper-selectable as RS-232 and RS-422/485, and the UARTs use a non-standard oscillator frequency of 20 MHz (base_baud = 1250000). Signed-off-by: NIan Abbott <abbotti@mev.co.uk> Cc: stable <stable@vger.kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
Allows tuning of the RX FIFO fill threshold and timeout. (The latter is only applicable to SCIFA and SCIFB). Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
Implements support for FIFO fill thresholds greater than one with software timeout. This mechanism is not possible (or at least not useful) on SCIF family hardware other than SCIFA and SCIFB because they do not support turning off the DR hardware timeout interrupt separately from the RI interrupt. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
Sets reasonable trigger defaults for the various SCIF variants. Also corrects the FIFO size for SH7705-style ports. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 03 2月, 2017 11 次提交
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由 Rob Herring 提交于
Register a serdev controller with the serdev bus when a tty_port is registered. This creates the serdev controller and create's serdev devices for any DT child nodes of the tty_port's parent (i.e. the UART device). Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-By: NSebastian Reichel <sre@kernel.org> Tested-By: NSebastian Reichel <sre@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Rob Herring 提交于
Add a serdev controller driver for tty ports. The controller is registered with serdev when tty ports are registered with the TTY core. As the TTY core is built-in only, this has the side effect of making serdev built-in as well. Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-By: NSebastian Reichel <sre@kernel.org> Tested-By: NSebastian Reichel <sre@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Rob Herring 提交于
The serdev bus is designed for devices such as Bluetooth, WiFi, GPS and NFC connected to UARTs on host processors. Tradionally these have been handled with tty line disciplines, rfkill, and userspace glue such as hciattach. This approach has many drawbacks since it doesn't fit into the Linux driver model. Handling of sideband signals, power control and firmware loading are the main issues. This creates a serdev bus with controllers (i.e. host serial ports) and attached devices. Typically, these are point to point connections, but some devices have muxing protocols or a h/w mux is conceivable. Any muxing is not yet supported with the serdev bus. Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-By: NSebastian Reichel <sre@kernel.org> Tested-By: NSebastian Reichel <sre@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Rob Herring 提交于
Add a common binding for describing serial/UART attached devices. Common examples are Bluetooth, WiFi, NFC and GPS devices. Serial attached devices are represented as child nodes of a UART node. This may need to be extended for more complex devices with multiple interfaces, but for the simple cases a child node is sufficient. Tested-By: NSebastian Reichel <sre@kernel.org> Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Rob Herring 提交于
Introduce a client (upward direction) operations struct for tty_port clients. Initially supported operations are for receiving data and write wake-up. This will allow for having clients other than an ldisc. Convert the calls to the ldisc to use the client ops as the default operations. Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-By: NSebastian Reichel <sre@kernel.org> Tested-By: NSebastian Reichel <sre@kernel.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
Sets the closest match for a desired RX trigger level. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
To allow operation with a higher RX FIFO interrupt threshold in PIO mode, it is necessary to consider the DR bit ("FIFO not full, but no data received for 1.5 frames") as an indicator that data can be read. Otherwise the driver will let data rot in the FIFO until the threshold is reached. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Ulrich Hecht 提交于
Defines the bits controlling FIFO thresholds, adds the additional HSCIF registers to the register map. Signed-off-by: NUlrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Dmitry Torokhov 提交于
Instead of open-coding loop with of_find_node_by_type(), let's use canned macro. Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Sudeep Holla 提交于
Commit c7cef0a8 ("console: Add extensible console matching") added match() method to struct console which allows the console to perform console command line matching instead of (or in addition to) default console matching (ie., by fixed name and index). Commit ad1696f6 ("ACPI: parse SPCR and enable matching console") introduced support for SPCR as matching console. Commit 10879ae5 ("serial: pl011: add console matching function") added the match method for pl011 console which checks for the console string to be "pl011" Now on a platform which has both SPCR in the ACPI tables and ttyAMA in the command line, the ttyAMA is chosen as "selected console" but it doesn't pass the matching console method which results in CON_CONSDEV not being set on the "selected console". As a result of that, the bootconsole(SPCR in the above case) is not unregistered and all the beginning boot messages are seen twice. This patch adds "ttyAMA" so that it's considered to match pl011 console. Fixes: 10879ae5 ("serial: pl011: add console matching function") Cc: Russell King <linux@armlinux.org.uk> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: Peter Hurley <peter@hurleysoftware.com> Cc: Aleksey Makarov <aleksey.makarov@linaro.org> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 남영민 提交于
Ensure that the uart clock is enabled prior to writing to the interrupt mask register in s3c24xx_serial_resume_noirq function. Without enabing the uart clock, the uart register cannot be accessed. Signed-off-by: NYoungmin Nam <youngmin.nam@samsung.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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