Compilation for the Feroceon core should use -mtune=marvell-f.  This is
available in Code Sourcery's 2008Q3 release at the moment. Otherwise
fall back to -mtune-=xscale.
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Add Nuvoton W90X900 ARM9 plat support to linux arm tree,
Now, this patch include only W90P910 EVB of W90P910 CPU,
Its driver is nothing.
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The CLPS7500 platform has not built since 2.6.22-git7 and there
seems to be no interest in fixing it.  So, remove the platform
support.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The MSM architecture covers a wider family of chips than just the MSM7X00A.
Move to a more generic name, in perparation for supporting the specific
SoC variants as sub-architectures (ARCH_MSM7X01A, ARCH_MSM722X, etc).  This
gives us ARCH_MSM for the (many) common peripherals.

This also removes the unused/obsolete config item MSM7X00A_IDLE.
Signed-off-by: NBrian Swetland <swetland@google.com>

Add minimal omap3430 support based on earlier patches from
Syed Mohammed Khasim. Also merge in omap34xx SRAM support
from Karthik Dasu and use consistent naming for sram init
functions.

Also do following changes that make 34xx support usable:

- Remove unused sram.c functions for 34xx

- Rename IRQ_SIR_IRQ to INTCPS_SIR_IRQ and define it locally
  in entry-macro.S

- Update mach-omap2/io.c to support 2420, 2430, and 34xx

- Also merge in 34xx GPMC changes to add fields wr_access and
  wr_data_mux_bus from Adrian Hunter

- Remove memory initialization call omap2_init_memory() until
  until more generic memory initialization patches are posted.
  It's OK to rely on bootloader initialization until then.
Signed-off-by: NSyed Mohammed, Khasim <khasim@ti.com>
Signed-off-by: Karthik Dasu<karthik-dp@ti.com>
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

First move of items out of include/asm-arm/plat-s3c* to their
new homes under arch/arm/plat-s3c/include/plat and
arch/arm/plat-s3c24xx/include/plat directories.

Note, we have to create a dummy arch/arm/plat-s3c/Makefile to
allow us to add arch/arm/plat-s3c/include/plat to the path.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The current -march=armv7a is not supported by mainline gcc.

Cc: Paul Brook <paul@codesourcery.com>
Cc: Wei Zhong <weizhong@broadcom.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch fixes a typo introduced by
commit f37f46eb
([ARM] nommu: add ARM946E-S core support).
Reported-by: NRobert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Acked-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds basic mach support for the mx2 processor family, based
on the original freescale code and adapted to mainline kernel coding
style.

This part adds the global build only.
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>

The config option for building drivers/acorn/char/defkeymap-l7200.c is
not present since at least kernel 2.6.0.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Marvell Discovery Duo (MV78xx0) is a family of ARM SoCs featuring
(depending on the model) one or two Feroceon CPU cores with 512K of L2
cache and VFP coprocessors running at (depending on the model) between
800 MHz and 1.2 GHz, and features a DDR2 controller, two PCIe
interfaces that can each run either in x4 or quad x1 mode, three USB
2.0 interfaces, two 3Gb/s SATA II interfaces, a SPI interface, two
TWSI interfaces, a crypto accelerator, IDMA/XOR engines, a SPI
interface, four UARTs, and depending on the model, two or four gigabit
ethernet interfaces.

This patch adds basic support for the platform, and allows booting
on the MV78x00 development board, with functional UARTs, SATA, PCIe,
GigE and USB ports.
Signed-off-by: NStanislav Samsonov <samsonov@marvell.com>
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.

This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: NSaeed Bishara <saeed@marvell.com>
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

The Marvell Loki (88RC8480) is an ARM SoC based on a Feroceon CPU
core running at between 400 MHz and 1.0 GHz, and features a 64 bit
DDR controller, 512K of internal SRAM, two x4 PCI-Express ports,
two Gigabit Ethernet ports, two 4x SAS/SATA controllers, two UARTs,
two TWSI controllers, and IDMA/XOR engines.

This patch adds support for the Marvell LB88RC8480 Development
Board, enabling the use of the PCIe interfaces, the ethernet
interfaces, the TWSI interfaces and the UARTs.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>

Trying to compile a kerel for ARCH_CO285 fails with the following error:

<--  snip  -->

...
  CC      arch/arm/mach-footbridge/dc21285.o
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:
In function 'dc21285_base_address':
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: 'PCICFG0_BASE' undeclared (first use in this function)
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: (Each undeclared identifier is reported only once
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:54: error: for each function it appears in.)
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:57: error: 'PCICFG1_BASE' undeclared (first use in this function)
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:
In function 'dc21285_scan_bus':
/home/bunk/linux/kernel-2.6/git/linux-2.6/arch/arm/mach-footbridge/dc21285.c:286: error: implicit declaration of function 'pci_scan_bus'
...
make[2]: *** [arch/arm/mach-footbridge/dc21285.o] Error 1

<--  snip  -->

This does not seem to be a recent breakage.

The ARCH_CO285 support is old - kernel 2.2.0 contains first traces of
it, an it seems to have been pretty complete in later 2.2 kernels.

Since it seems to be completely dead code now this patch therefore
removes it.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NUwe Kleine-König <Uwe.Kleine-Koenig@digi.com>

Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e.
not the plat-orion bits.)
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Reviewed-by: NTzachi Perelstein <tzachi@marvell.com>
Acked-by: NSaeed Bishara <saeed@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Create arch/arm/plat-orion/, for peripherals shared between various
Marvell Orion SoCs.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Reviewed-by: NTzachi Perelstein <tzachi@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Signed-off-by: NUwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory
controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces,
and, depending on the specific model, PCI-E interface, PCI-X
interface, SATA controllers, crypto unit, SPI interface, SDIO
interface, device bus, NAND controller, DMA engine and/or XOR
engine.

This contains the basic structure and architecture register definitions.
Signed-off-by: NTzachi Perelstein <tzachi@marvell.com>
Reviewed-by: NNicolas Pitre <nico@marvell.com>
Reviewed-by: NLennert Buytenhek <buytenh@marvell.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>

- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions
Signed-off-by: NBrian Swetland <swetland@google.com>

The variable CPPFLAGS is a wellknown variable and the usage by
kbuild may result in unexpected behaviour.

This patch replace use of CPPFLAGS with KBUILD_CPPFLAGS all over the
tree and enabling one to use:
make CPPFLAGS=...
to specify additional CPP commandline options.

Patch was tested on following architectures:
alpha, arm, i386, x86_64, mips, sparc, sparc64, ia64, m68k, s390
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>

The variable AFLAGS is a wellknown variable and the usage by
kbuild may result in unexpected behaviour.
On top of that several people over time has asked for a way to
pass in additional flags to gcc.

This patch replace use of AFLAGS with KBUILD_AFLAGS all over
the tree.

Patch was tested on following architectures:
alpha, arm, i386, x86_64, mips, sparc, sparc64, ia64, m68k, s390
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>

The variable CFLAGS is a wellknown variable and the usage by
kbuild may result in unexpected behaviour.
On top of that several people over time has asked for a way to
pass in additional flags to gcc.

This patch replace use of CFLAGS with KBUILD_CFLAGS all over the
tree and enabling one to use:
make CFLAGS=...
to specify additional gcc commandline options.

One usecase is when trying to find gcc bugs but other
use cases has been requested too.

Patch was tested on following architectures:
alpha, arm, i386, x86_64, mips, sparc, sparc64, ia64, m68k

Test was simple to do a defconfig build, apply the patch and check
that nothing got rebuild.
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>

Newer versions of binutils support --build-id, which adds an ELF
note section called ".note.gnu.build-id" to the output.  On the ARM
kernel build, because there is no explicit mention of this section
in the shipped ld script, this section is placed at vaddr 0x00000000
(whereas the normal kernel text/data typically starts at vaddr
0xc0008000), causing the output of objcopy (Image) to produce a 3G+
file.

This patch makes objcopy strip the .note.gnu.build-id section from
the Image file along with all other note sections, which fixes the
build.
Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the foundation pieces for
the Freescale MXC platforms, including
i.MX2 and i.MX3 based systems.

The bare-bones MX31 support in this patch
boots to the rootdev panic with 8250 serial
console configured "console=ttyS0,115200".
It assumes that Redboot is the boot loader.
Signed-off-by: NQuinn Jensen <quinn.jensen@freescale.com>
Acked-by: NLennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add core support for the Kendin/Micrel KS8695 processor family.

It is an ARM922-T based SoC with integrated USART, 4-port Ethernet
Switch, WAN Ethernet port, and optional PCI Host bridge, etc.
 http://www.micrel.com/page.do?page=product-info/sys_on_chip.jsp

This patch is based on earlier patches from Lennert Buytenhek, Ben
Dooks and Greg Ungerer posted to the arm-linux-kernel mailing list in
March 2006;  and Micrel's 2.6.9 port.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add base kernel support for the TI DaVinci platform.

This patch only includes interrupts, timers, CPU identification,
serial support and basic power and sleep controller init.  More
drivers to come.
Signed-off-by: NKevin Hilman <khilman@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds the necessary lines to the Makefile and Kconfig files for
enabling the compilation of the ARMv7 CPU support.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The rename of the AT91 subtree from mach-at91rm9200 to mach-at91
(to accomodate at91sam926x processors) was incomplete.  It needs
this patch to be able to build again.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The rename of the AT91 subtree from mach-at91rm9200 to mach-at91
(to accomodate at91sam926x processors) was incomplete.  It needs
this patch to be able to build again.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NUwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add arch/arm/mach-s3c2443 for support of the Samsung S3C2443 SoC

This patch adds the core CPU support, clock framework, times
and initial IRQ support, as well as adding the directory into
the build tree.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The following patch and script moves the arch/arm/mach-s3c2410
directory into arch/arm/plat-s3c24xx for the generic core code
and inti arch/arm/mach-s3c{cpu} for the cpu/machine support files

Include directory include/asm-arm/plat-s3c24xx is added for the
core include files.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Now that Linux includes support for the Atmel AT91SAM9260 and
AT91SAM9261 processors in addition to the original Atmel AT91RM9200
(with support for more AT91 processors pending), the "mach-at91rm9200"
and "arch-at91rm9200" directories should be renamed to indicate their
more generic nature.

The following git commands should be run BEFORE applying this patch:
  git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91
  git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a
Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory
controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz
PCI-X interface, a x8 PCI-Express interface, and other peripherals to form
a system-on-a-chip RAID subsystem engine.

The iop342 processor replaces the SAS controller with a second Xscale core
for dual core embedded applications.

The iop341 processor is the single core version of iop342.

This patch supports the two Intel customer reference platforms iq81340mc
for external storage and iq81340sc for direct attach (HBA) development.

The developer's manual is available here:
ftp://download.intel.com/design/iio/docs/31503701.pdf

Changelog:
* removed virtual addresses from resource definitions
* cleaned up some unnecessary #include's
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Do not assume that the ARM GCC toolchain defaults to building for the
32-bit ARM ISA (-marm) case. Instead, explicitly select -marm in CFLAGS
since the toolchain default can be for the 16-bit Thumb ISA (-mthumb) in
some odd/rare cases.
Signed-off-by: NGeorge G. Davis <gdavis@mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add support for KBUILD_IMAGE on ARM.  This takes the usual target
specifiers (zImage/Image/etc) in the same way that powerpc does
(iow, without the arch/arm/boot prefix).
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch adds ARM946E-S core support which has typically 8KB I&D cache.
It has a MPU and supports ARMv5TE instruction set.

Because the ARM946E-S core can be synthesizable with various cache size,
CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations.
Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>