- 21 10月, 2010 4 次提交
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由 KOSAKI Motohiro 提交于
All security modules shouldn't change sched_param parameter of security_task_setscheduler(). This is not only meaningless, but also make a harmful result if caller pass a static variable. This patch remove policy and sched_param parameter from security_task_setscheduler() becuase none of security module is using it. Cc: James Morris <jmorris@namei.org> Signed-off-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: NJames Morris <jmorris@namei.org>
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由 FUJITA Tomonori 提交于
Set CONFIG_ARCH_DMA_ADDR_T_64BIT when we set dma_addr_t to 64 bits in <asm/types.h>; this allows Kconfig decisions based on this property. Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> LKML-Reference: <201010202255.o9KMtZXu009370@imap1.linux-foundation.org> Acked-by: N"H. Peter Anvin" <hpa@zytor.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Shaohua Li 提交于
Currently flush tlb vector allocation is based on below equation: sender = smp_processor_id() % 8 This isn't optimal, CPUs from different node can have the same vector, this causes a lot of lock contention. Instead, we can assign the same vectors to CPUs from the same node, while different node has different vectors. This has below advantages: a. if there is lock contention, the lock contention is between CPUs from one node. This should be much cheaper than the contention between nodes. b. completely avoid lock contention between nodes. This especially benefits kswapd, which is the biggest user of tlb flush, since kswapd sets its affinity to specific node. In my test, this could reduce > 20% CPU overhead in extreme case.The test machine has 4 nodes and each node has 16 CPUs. I then bind each node's kswapd to the first CPU of the node. I run a workload with 4 sequential mmap file read thread. The files are empty sparse file. This workload will trigger a lot of page reclaim and tlbflush. The kswapd bind is to easy trigger the extreme tlb flush lock contention because otherwise kswapd keeps migrating between CPUs of a node and I can't get stable result. Sure in real workload, we can't always see so big tlb flush lock contention, but it's possible. [ hpa: folded in fix from Eric Dumazet to use this_cpu_read() ] Signed-off-by: NShaohua Li <shaohua.li@intel.com> LKML-Reference: <1287544023.4571.8.camel@sli10-conroe.sh.intel.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Borislav Petkov 提交于
arch/x86/mm/fault.c: In function 'vmalloc_sync_all': arch/x86/mm/fault.c:238: warning: assignment makes integer from pointer without a cast introduced by 617d34d9. Signed-off-by: NBorislav Petkov <borislav.petkov@amd.com> LKML-Reference: <20101020103642.GA3135@kryptos.osrc.amd.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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- 20 10月, 2010 32 次提交
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由 Nicolas Pitre 提交于
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
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由 Jeremy Kerr 提交于
Since we can get both physical and virtual addresses from the addruart macro, we can use this to establish the debug mappings. In the case of CONFIG_DEBUG_ICEDCC, we don't need any mappings, but may still need to setup r7 correctly. Incorporating ASM changes from Nicolas Pitre <npitre@fluxnic.net>. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Jeremy Kerr 提交于
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NJason Wang <jason77.wang@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Jeremy Kerr 提交于
We have the same (empty) macro for all IDEDCC flavours, so consolidate it to one. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com>
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由 Nicolas Pitre 提交于
As mentioned in the comment right at the top, the first four fields are directly accessed by assembly code in head.S. Move nr_irqs so the comment is true again. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Robert Richter 提交于
We want the BIOS to setup the EILVT APIC registers. The offsets were hardcoded and BIOS settings were overwritten by the OS. Now, the subsystems for MCE threshold and IBS determine the LVT offset from the registers the BIOS has setup. If the BIOS setup is buggy on a family 10h system, a workaround enables IBS. If the OS determines an invalid register setup, a "[Firmware Bug]: " error message is reported. We need this change also for upcomming cpu families. Signed-off-by: NRobert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-3-git-send-email-robert.richter@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Robert Richter 提交于
This patch implements checks for the availability of LVT entries (APIC500-530) and reserves it if used. The check becomes necessary since we want to let the BIOS provide the LVT offsets. The offsets should be determined by the subsystems using it like those for MCE threshold or IBS. On K8 only offset 0 (APIC500) and MCE interrupts are supported. Beginning with family 10h at least 4 offsets are available. Since offsets must be consistent for all cores, we keep track of the LVT offsets in software and reserve the offset for the same vector also to be used on other cores. An offset is freed by setting the entry to APIC_EILVT_MASKED. If the BIOS is right, there should be no conflicts. Otherwise a "[Firmware Bug]: ..." error message is generated. However, if software does not properly determines the offsets, it is not necessarily a BIOS bug. Signed-off-by: NRobert Richter <robert.richter@amd.com> LKML-Reference: <1286360874-1471-2-git-send-email-robert.richter@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Jeremy Fitzhardinge 提交于
Take mm->page_table_lock while syncing the vmalloc region. This prevents a race with the Xen pagetable pin/unpin code, which expects that the page_table_lock is already held. If this race occurs, then Xen can see an inconsistent page type (a page can either be read/write or a pagetable page, and pin/unpin converts it between them), which will cause either the pin or the set_p[gm]d to fail; either will crash the kernel. vmalloc_sync_all() should be called rarely, so this extra use of page_table_lock should not interfere with its normal users. The mm pointer is stashed in the pgd page's index field, as that won't be otherwise used for pgds. Reported-by: NIan Campbell <ian.cambell@eu.citrix.com> Originally-by: NJan Beulich <jbeulich@novell.com> LKML-Reference: <4CB88A4C.1080305@goop.org> Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Jeremy Fitzhardinge 提交于
Whitespace cleanup only. Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
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由 Michel Thebeau 提交于
[Ralf: Michel's original patch only fixed N32; I replicated the same fix for O32.] Signed-off-by: NMichel Thebeau <michel.thebeau@windriver.com> Cc: paul.gortmaker@windriver.com Cc: bruce.ashfield@windriver.com Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The platform specific files should be included via the platform-y variable. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Patchwork: https://patchwork.linux-mips.org/patch/1719/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
When running make clean, Kbuild doesn't process the .config file, so nothing generates a platform-y variable. We can get it to descend into the platform directories by setting $(obj-). The dec Platform file was unconditionally setting platform-, obliterating its previous contents and preventing some directories from being cleaned. This is change to an append operation '+=' to allow cavium-octeon to be cleaned. Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: Sam Ravnborg <sam@ravnborg.org> Patchwork: https://patchwork.linux-mips.org/patch/1718/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Fabio Estevam 提交于
Pass the correct GPIO to gpio_free Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Acked-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Eric Bénard 提交于
without this patch we get : arch/arm/mach-imx/built-in.o: In function `eukrea_cpuimx27_init': eukrea_mbimx27-baseboard.c:(.init.text+0x44c): undefined reference to `mxc_ulpi_access_ops' Signed-off-by: NEric Bénard <eric@eukrea.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Eric Bénard 提交于
this patch fix the following errors : arch/arm/mach-mx3/mach-pcm037_eet.c:62: error: implicit declaration of function 'MXC_SPI_CS' arch/arm/mach-mx3/mach-pcm037_eet.c:185: error: implicit declaration of function 'imx35_add_spi_imx0' from the Kconfig pcm037 is i.MX31 based and not i.MX35 so replace imx35_add_spi_imx0 by imx31_add_spi_imx0 Signed-off-by: NEric Bénard <eric@eukrea.com> [ukl: remove unneeded #include <mach/spi.h>] Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Ian Lartey 提交于
This is only a partial revert of "ARM: mx3/mx31ads: fold board header in its only user" [commit ccfa7c26)] As some of the the board defines are also used in the cs89x0 ethernet driver by the i.MX31 ADS. Signed-off-by: NIan Lartey <ian@opensource.wolfsonmicro.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Eric Bénard 提交于
add NAND, SDHC Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
this patch really configure the GPIO in GPIO mode. Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Tested on i.MX25 and i.MX35 and i.MX51 Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
the attached patch allows SD to work on i.MX51 with Wolfram's drivers Tested on i.MX51. Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Based on original patch from: Richard Zhu <r65037@freescale.com> Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
the PHY is UTMI so don't create an ULPI viewpoint. Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
Without this exiting WFI can result in cache corruption. Code taken from Freescale's 2.6.27 BSP and tested on i.MX35 Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Eric Bénard 提交于
this patch fix the following errors : arch/arm/plat-mxc/devices/platform-imx-dma.c:44: error: ‘MX25_SDMA_BASE_ADDR’ undeclared here (not in a function) arch/arm/plat-mxc/devices/platform-imx-dma.c:44: error: ‘MX25_INT_SDMA’ undeclared here (not in a function) Signed-off-by: NEric Bénard <eric@eukrea.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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由 Eric Bénard 提交于
* get_rate_arm : when 400MHz clock is selected (cctl & 1<<14), ARM clock is 400MHz (MPLL * 3 / 4) and not 800MHz * get_rate_per : peripherals's clock is derived from AHB and not from IPG (ref manual : figure 5-1) * can2_clk : use the correct ID * without this patch, peripherals getting their clock from PER clocks work fine because of the 2 errors which fix themselves (ARM clock x 2 and per clock actually based on IPG which is AHB/2) but flexcan can't work as it gets its clock from IPG and thus calculates its bitrate using a reference value which is twice what it really is. Signed-off-by: NEric Bénard <eric@eukrea.com>
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由 Marc Kleine-Budde 提交于
During the reorganisation of the imx-i2c devices (in 64de5ec1) the 3rd imx-i2c device for the mx35 got lost. This patch adds the missing device. Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Dinh Nguyen 提交于
Add IRAM(Internal RAM) allocation functions using GENERIC_ALLOCATOR. The allocation size is 4KB multiples to guarantee alignment. The idea for these functions is for i.MX platforms to use them to dynamically allocate IRAM usage. Applies on 2.6.36-rc7 Signed-off-by: NDinh Nguyen <Dinh.Nguyen@freescale.com> Reviewed-by: NAmit Kucheria <amit.kucheria@canonical.com> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Avi Kivity 提交于
kvm reloads the host's fs and gs blindly, however the underlying segment descriptors may be invalid due to the user modifying the ldt after loading them. Fix by using the safe accessors (loadsegment() and load_gs_index()) instead of home grown unsafe versions. This is CVE-2010-3698. KVM-Stable-Tag. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com>
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- 19 10月, 2010 4 次提交
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由 Heiko Carstens 提交于
Remove a couple of pointless header file includes. Fixes a compile bug caused by header file include dependencies with "irq: Add tracepoint to softirq_raise" within linux-next. Reported-by: NSachin Sant <sachinp@in.ibm.com> Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com> [ cherry-picked from the s390 tree to fix "2bf2160d: irq: Add tracepoint to softirq_raise" ] Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Tony Luck 提交于
Ugly #include dependencies. We need to have local_softirq_pending() defined before it gets used in <linux/interrupt.h>. But <asm/hardirq.h> provides the definition *after* this #include chain: <linux/irq.h> <asm/irq.h> <asm/hw_irq.h> <linux/interrupt.h> Signed-off-by: NTony Luck <tony.luck@intel.com> [ cherry-picked from the ia64 tree to fix "2bf2160d: irq: Add tracepoint to softirq_raise" ] Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Yinghai Lu 提交于
On a system that support intr-rempping when booting with "intremap=off" [ 177.895501] BUG: unable to handle kernel NULL pointer dereference at 00000000000000f8 [ 177.913316] IP: [<ffffffff8145fc18>] free_irte+0x47/0xc0 ... [ 178.173326] Call Trace: [ 178.173574] [<ffffffff810515b4>] destroy_irq+0x3a/0x75 [ 178.192934] [<ffffffff81051834>] arch_teardown_msi_irq+0xe/0x10 [ 178.193418] [<ffffffff81458dc3>] arch_teardown_msi_irqs+0x56/0x7f [ 178.213021] [<ffffffff81458e79>] free_msi_irqs+0x8d/0xeb Call free_irte only when interrupt remapping is enabled. Signed-off-by: NYinghai Lu <yinghai@kernel.org> LKML-Reference: <4CBCB274.7010108@kernel.org> Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Paul Mackerras 提交于
Commit c3f00c70 ("perf: Separate find_get_context() from event initialization") changed the generic perf_event code to call perf_event_alloc, which calls the arch-specific event_init code, before looking up the context for the new event. Unfortunately, power_pmu_event_init uses event->ctx->task to see whether the new event is a per-task event or a system-wide event, and thus crashes since event->ctx is NULL at the point where power_pmu_event_init gets called. (The reason it needs to know whether it is a per-task event is because there are some hardware events on Power systems which only count when the processor is not idle, and there are some fixed-function counters which count such events. For example, the "run cycles" event counts cycles when the processor is not idle. If the user asks to count cycles, we can use "run cycles" if this is a per-task event, since the processor is running when the task is running, by definition. We can't use "run cycles" if the user asks for "cycles" on a system-wide counter.) Fortunately the information we need is in the event->attach_state field, so we just use that instead. Signed-off-by: NPaul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <20101019055535.GA10398@drongo> Signed-off-by: NIngo Molnar <mingo@elte.hu> Reported-by: NAlexey Kardashevskiy <aik@au1.ibm.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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