- 20 7月, 2008 14 次提交
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由 Avi Kivity 提交于
Instead of prefetching all segment bases before emulation, read them at the last moment. Since most of them are unneeded, we save some cycles on Intel machines where this is a bit expensive. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
rip relative decoding is relative to the instruction pointer of the next instruction; by moving address adjustment until after decoding is complete, we remove the need to determine the instruction size. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Consolidate the duplicated code when not in any special case. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Instead of using sparse switches, use simpler if/else sequences. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
x86_64 does not decode rex.b in certain cases, where the r/m field = 5. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Mohammed Gamal 提交于
Signed-off-by: NMohammed Gamal <m.gamal005@gmail.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Encountered in FC6 boot sequence, now that we don't force ss.rpl = 0 during the protected mode transition. Not really necessary, but nice to have. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Instead of fetching the data explicitly, use SrcImmByte. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Guillaume Thouvenin 提交于
Add support for mov r, sreg (0x8c) instruction Signed-off-by: NGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: NLaurent Vivier <laurent.vivier@bull.net> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Guillaume Thouvenin 提交于
Add support for mov r, sreg (0x8c) instruction. [avi: drop the sreg decoding table in favor of 1:1 encoding] Signed-off-by: NGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: NLaurent Vivier <laurent.vivier@bull.net> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Guillaume Thouvenin 提交于
Add support to mov r, imm (0xb8) instruction. Signed-off-by: NGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: NLaurent Vivier <laurent.vivier@bull.net> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Guillaume Thouvenin 提交于
Add support for jmp far (opcode 0xea) instruction. Signed-off-by: NGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: NLaurent Vivier <laurent.vivier@bull.net> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Guillaume Thouvenin 提交于
Update c->dst.bytes in decode instruction instead of instruction itself. It's needed because if c->dst.bytes is equal to 0, the instruction is not emulated. Signed-off-by: NGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: NLaurent Vivier <laurent.vivier@bull.net> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 07 6月, 2008 1 次提交
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由 Avi Kivity 提交于
The hypercall instructions on Intel and AMD are different. KVM allows the guest to choose one or the other (the default is Intel), and if the guest chooses incorrectly, KVM will patch it at runtime to select the correct instruction. This allows live migration between Intel and AMD machines. This patching occurs in the x86 emulator. The current code also executes the hypercall. Unfortunately, the tail end of the x86 emulator code also executes, overwriting the return value of the hypercall with the original contents of rax (which happens to be the hypercall number). Fix not by executing the hypercall in the emulator context; instead let the guest reissue the patched instruction and execute the hypercall via the normal path. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 18 5月, 2008 1 次提交
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由 Avi Kivity 提交于
A register destination encoded with a mod=3 encoding left dst.ptr NULL. Normally we don't trap writes to registers, but in the case of smsw, we do. Fix by pointing dst.ptr at the destination register. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 04 5月, 2008 1 次提交
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由 Avi Kivity 提交于
The recent changes allowing memory operands with lmsw and smsw left lmsw with writeback enabled. Since lmsw has no oridinary destination operand, the dst pointer was not initialized, resulting in an oops. Close the hole by disabling writeback for lmsw. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 27 4月, 2008 13 次提交
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由 Avi Kivity 提交于
We never hit this, since there is currently no reason to emulate lea. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
lmsw and smsw were implemented only with a register operand. Extend them to support a memory operand as well. Fixes Windows running some display compatibility test on AMD hosts. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
This lets us treat the case where mod == 3 in the same manner as other cases. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Harvey Harrison 提交于
Nesting __emulate_2op_nobyte inside__emulate_2op produces many shadowed variable warnings on the internal variable _tmp used by both macros. Change the outer macro to use __tmp. Avoids a sparse warning like the following at every call site of __emulate_2op arch/x86/kvm/x86_emulate.c:1091:3: warning: symbol '_tmp' shadows an earlier one arch/x86/kvm/x86_emulate.c:1091:3: originally declared here [18 more warnings suppressed] Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Harvey Harrison 提交于
Change jmp_rel() to a function as well. Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Harvey Harrison 提交于
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Harvey Harrison 提交于
Replaces open-coded mask calculation in macros. Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Opcodes 0x80-0x83 Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
This adds group decoding for opcode 0x0f 0x01 (group 7). Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Add group decoding support for opcode 0xfe (group 4) and 0xff (group 5). Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
This adds group decoding support for opcodes 0xf6, 0xf7 (group 3). Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
This adds group decode support for opcode 0x8f. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Certain x86 instructions use bits 3:5 of the byte following the opcode as an opcode extension, with the decode sometimes depending on bits 6:7 as well. Add support for this in the main decoding table rather than an ad-hock adaptation per opcode. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 31 1月, 2008 1 次提交
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由 Avi Kivity 提交于
This paves the way for multiple architecture support. Note that while ioapic.c could potentially be shared with ia64, it is also moved. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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- 30 1月, 2008 9 次提交
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由 Zhang Xiantao 提交于
Move all the architecture-specific fields in kvm_vcpu into a new struct kvm_vcpu_arch. Signed-off-by: NZhang Xiantao <xiantao.zhang@intel.com> Acked-by: NCarsten Otte <cotte@de.ibm.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Stack instructions are always 64-bit on 64-bit mode; many of the emulated stack instructions did not take that into account. Fix by adding a 'Stack' bitflag and setting the operand size appropriately during the decode stage (except for 'push r/m', which is in a group with a few other instructions, so it gets its own treatment). This fixes random crashes on Vista x64. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
We prepare eflags for the emulated instruction, then clobber it with an 'andl'. Fix by popping eflags as the last thing in the sequence. Patch taken from Xen (16143:959b4b92b6bf) Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Unify the special instruction switch with the regular instruction switch, and the two byte special instruction switch with the regular two byte instruction switch. That makes it much easier to find an instruction or the place an instruction needs to be added in. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
The rep prefix cleanup left two switch () statements next to each other. Unify them. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Avi Kivity 提交于
Currently rep processing is handled somewhere in the middle of instruction processing. Move it to a sensible place. Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Guillaume Thouvenin 提交于
Add emulation for the cmps instruction. This lets OpenBSD boot on kvm. Signed-off-by: NGuillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Sheng Yang 提交于
Previous patches have removed the dependency on cr2; we can now stop passing it to the emulator and rename uses to 'memop'. Signed-off-by: NSheng Yang <sheng.yang@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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