1. 11 6月, 2009 1 次提交
  2. 28 4月, 2009 1 次提交
  3. 27 4月, 2009 1 次提交
  4. 22 4月, 2009 1 次提交
  5. 21 4月, 2009 1 次提交
  6. 16 4月, 2009 2 次提交
  7. 14 4月, 2009 1 次提交
  8. 07 4月, 2009 1 次提交
  9. 04 4月, 2009 1 次提交
    • M
      sh: Fix up DSP context save/restore. · 01ab1039
      Michael Trimarchi 提交于
      There were a number of issues with the DSP context save/restore code,
      mostly left-over relics from when it was introduced on SH3-DSP with
      little follow-up testing, resulting in things like task_pt_dspregs()
      referencing incorrect state on the stack.
      
      This follows the MIPS convention of tracking the DSP state in the
      thread_struct and handling the state save/restore in switch_to() and
      finish_arch_switch() respectively. The regset interface is also updated,
      which allows us to finally be rid of task_pt_dspregs() and the special
      cased task_pt_regs().
      Signed-off-by: NMichael Trimarchi <michael@evidence.eu.com>
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      01ab1039
  10. 03 4月, 2009 1 次提交
  11. 02 4月, 2009 3 次提交
  12. 31 3月, 2009 3 次提交
  13. 30 3月, 2009 1 次提交
  14. 20 3月, 2009 1 次提交
  15. 18 3月, 2009 5 次提交
  16. 17 3月, 2009 1 次提交
    • P
      sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores. · 8263a67e
      Paul Mundt 提交于
      This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores
      that implement the PTAEX register and respective functionality. Presently
      only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs).
      
      The main change is in how the PTE is written out when loading the entry
      in to the TLB, as well as in how the TLB entry is selectively flushed.
      
      While SH-X2 extended mode splits out the memory-mapped U and I-TLB data
      arrays for extra bits, extended ASID mode splits out the address arrays.
      While we don't use the memory-mapped data array access, the address
      array accesses are necessary for selective TLB flushes, so these are
      implemented newly and replace the generic SH-4 implementation.
      
      With this, TLB flushes in switch_mm() are almost non-existent on newer
      parts.
      Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
      8263a67e
  17. 16 3月, 2009 5 次提交
  18. 11 3月, 2009 2 次提交
  19. 10 3月, 2009 2 次提交
  20. 06 3月, 2009 6 次提交