1. 28 3月, 2012 1 次提交
  2. 23 3月, 2012 1 次提交
  3. 13 3月, 2012 1 次提交
  4. 27 1月, 2012 2 次提交
  5. 24 12月, 2011 1 次提交
  6. 12 12月, 2011 1 次提交
    • F
      x86: Call idle notifier after irq_enter() · 98ad1cc1
      Frederic Weisbecker 提交于
      Interrupts notify the idle exit state before calling irq_enter().
      But the notifier code calls rcu_read_lock() and this is not
      allowed while rcu is in an extended quiescent state. We need
      to wait for irq_enter() -> rcu_idle_exit() to be called before
      doing so otherwise this results in a grumpy RCU:
      
      [    0.099991] WARNING: at include/linux/rcupdate.h:194 __atomic_notifier_call_chain+0xd2/0x110()
      [    0.099991] Hardware name: AMD690VM-FMH
      [    0.099991] Modules linked in:
      [    0.099991] Pid: 0, comm: swapper Not tainted 3.0.0-rc6+ #255
      [    0.099991] Call Trace:
      [    0.099991]  <IRQ>  [<ffffffff81051c8a>] warn_slowpath_common+0x7a/0xb0
      [    0.099991]  [<ffffffff81051cd5>] warn_slowpath_null+0x15/0x20
      [    0.099991]  [<ffffffff817d6fa2>] __atomic_notifier_call_chain+0xd2/0x110
      [    0.099991]  [<ffffffff817d6ff1>] atomic_notifier_call_chain+0x11/0x20
      [    0.099991]  [<ffffffff81001873>] exit_idle+0x43/0x50
      [    0.099991]  [<ffffffff81020439>] smp_apic_timer_interrupt+0x39/0xa0
      [    0.099991]  [<ffffffff817da253>] apic_timer_interrupt+0x13/0x20
      [    0.099991]  <EOI>  [<ffffffff8100ae67>] ? default_idle+0xa7/0x350
      [    0.099991]  [<ffffffff8100ae65>] ? default_idle+0xa5/0x350
      [    0.099991]  [<ffffffff8100b19b>] amd_e400_idle+0x8b/0x110
      [    0.099991]  [<ffffffff810cb01f>] ? rcu_enter_nohz+0x8f/0x160
      [    0.099991]  [<ffffffff810019a0>] cpu_idle+0xb0/0x110
      [    0.099991]  [<ffffffff817a7505>] rest_init+0xe5/0x140
      [    0.099991]  [<ffffffff817a7468>] ? rest_init+0x48/0x140
      [    0.099991]  [<ffffffff81cc5ca3>] start_kernel+0x3d1/0x3dc
      [    0.099991]  [<ffffffff81cc5321>] x86_64_start_reservations+0x131/0x135
      [    0.099991]  [<ffffffff81cc5412>] x86_64_start_kernel+0xed/0xf4
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Andy Henroid <andrew.d.henroid@intel.com>
      Signed-off-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com>
      Reviewed-by: NJosh Triplett <josh@joshtriplett.org>
      98ad1cc1
  7. 11 11月, 2011 1 次提交
  8. 10 11月, 2011 1 次提交
  9. 13 10月, 2011 1 次提交
  10. 12 10月, 2011 5 次提交
  11. 21 9月, 2011 6 次提交
  12. 13 7月, 2011 2 次提交
  13. 11 7月, 2011 2 次提交
    • N
      x86, ioapic: Also print Dest field · 7fece832
      Naga Chumbalkar 提交于
      The code in setup_ioapic_irq() determines the Destination Field,
      so why not also include it in the debug printk output that gets
      displayed when the boot parameter "apic=debug" is used.
      
      Before the change, "dmesg" will show:
      
       IOAPIC[0]: Set routing entry (8-1 -> 0x31 -> IRQ 1 Mode:0 Active:0)
       IOAPIC[0]: Set routing entry (8-2 -> 0x30 -> IRQ 0 Mode:0 Active:0)
       IOAPIC[0]: Set routing entry (8-3 -> 0x33 -> IRQ 3 Mode:0 Active:0) ...
      
      After the change, you will see:
      
       IOAPIC[0]: Set routing entry (8-1 -> 0x31 -> IRQ 1 Mode:0 Active:0 Dest:0)
       IOAPIC[0]: Set routing entry (8-2 -> 0x30 -> IRQ 0 Mode:0 Active:0 Dest:0)
       IOAPIC[0]: Set routing entry (8-3 -> 0x33 -> IRQ 3 Mode:0 Active:0 Dest:0) ...
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Link: http://lkml.kernel.org/r/20110708184603.2734.91071.sendpatchset@nchumbalkar.americas.cpqcorp.netSigned-off-by: NIngo Molnar <mingo@elte.hu>
      7fece832
    • N
      x86, ioapic: Format clean up for IOAPIC output · bd6a46e0
      Naga Chumbalkar 提交于
      When IOAPIC data is displayed in "dmesg" with the help of the
      boot parameter "apic=debug" certain values are not formatted
      correctly wrt their size.
      
      In the "dmesg" snippet below, note that the output for "max
      redirection entries", and "IO APIC version" which are each
      defined to be just 8-bits long are displayed as 2 bytes in
      length. Similarly, "Dst" under the "IRQ redirection table"
      should only be 8-bits long.
      
      IO APIC #0......
      ...
      ...
      .... register #01: 00170020
      .......     : max redirection entries: 0017
      .......     : PRQ implemented: 0
      .......     : IO APIC version: 0020
      ...
      ...
      .... IRQ redirection table:
       NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 000 1    0    0   0   0    0    0    00
       01 000 0    0    0   0   0    0    0    31
       02 000 0    0    0   0   0    0    0    30
       03 000 1    0    0   0   0    0    0    33
      ...
      ...
      
      Do some formatting clean up, so you will see output like below:
      
      IO APIC #0......
      ...
      ...
      .... register #01: 00170020
      .......     : max redirection entries: 17
      .......     : PRQ implemented: 0
      .......     : IO APIC version: 20
      ...
      ...
      .... IRQ redirection table:
       NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 00  1    0    0   0   0    0    0    00
       01 00  0    0    0   0   0    0    0    31
       02 00  0    0    0   0   0    0    0    30
       03 00  1    0    0   0   0    0    0    33
      ...
      ...
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Link: http://lkml.kernel.org/r/20110708184557.2734.61830.sendpatchset@nchumbalkar.americas.cpqcorp.netSigned-off-by: NIngo Molnar <mingo@elte.hu>
      bd6a46e0
  14. 08 7月, 2011 1 次提交
    • N
      x86: print APIC data a little later during boot · ded1f6ab
      Naga Chumbalkar 提交于
      To view IOAPIC data you could boot with "apic=debug".
      
      When booting in such a way then the kernel will dump the
      IO-APIC's registers, for example:
      
      NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 000 1    0    0   0   0    0    0    00
       01 000 0    0    0   0   0    0    0    31
       02 000 0    0    0   0   0    0    0    30
       03 000 0    0    0   0   0    0    0    33
       04 000 0    0    0   0   0    0    0    34
       05 000 0    0    0   0   0    0    0    35
       06 000 0    0    0   0   0    0    0    36
       07 000 0    0    0   0   0    0    0    37
       08 000 0    0    0   0   0    0    0    38
       09 000 0    1    0   0   0    0    0    39
       0a 000 0    0    0   0   0    0    0    3A
       0b 000 0    0    0   0   0    0    0    3B
       0c 000 0    0    0   0   0    0    0    3C
       0d 000 0    0    0   0   0    0    0    3D
       0e 000 0    0    0   0   0    0    0    3E
       0f 000 0    0    0   0   0    0    0    3F
       10 000 1    0    0   0   0    0    0    00
       11 000 1    0    0   0   0    0    0    00
       12 000 1    0    0   0   0    0    0    00
       13 000 1    0    0   0   0    0    0    00
       14 000 1    0    0   0   0    0    0    00
       15 000 1    0    0   0   0    0    0    00
       16 000 1    0    0   0   0    0    0    00
       17 000 1    0    0   0   0    0    0    00
      
      Delaying the call to print_ICs() gives better results:
      
      NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
       00 000 1    0    0   0   0    0    0    00
       01 000 0    0    0   0   0    0    0    31
       02 000 0    0    0   0   0    0    0    30
       03 000 1    0    0   0   0    0    0    33
       04 000 1    0    0   0   0    0    0    34
       05 000 1    0    0   0   0    0    0    35
       06 000 1    0    0   0   0    0    0    36
       07 000 1    0    0   0   0    0    0    37
       08 000 0    0    0   0   0    0    0    38
       09 000 0    1    0   0   0    0    0    39
       0a 000 1    0    0   0   0    0    0    3A
       0b 000 1    0    0   0   0    0    0    3B
       0c 000 0    0    0   0   0    0    0    3C
       0d 000 1    0    0   0   0    0    0    3D
       0e 000 1    0    0   0   0    0    0    3E
       0f 000 1    0    0   0   0    0    0    3F
       10 000 1    1    0   1   0    0    0    29
       11 000 1    0    0   0   0    0    0    00
       12 000 1    0    0   0   0    0    0    00
       13 000 1    0    0   0   0    0    0    00
       14 000 0    1    0   1   0    0    0    51
       15 000 1    0    0   0   0    0    0    00
       16 000 0    1    0   1   0    0    0    61
       17 000 0    1    0   1   0    0    0    59
      
      Notice that the entries beyond interrupt input signal 0x0f also
      get populated and arent just the hw-initialization default of
      all zeroes.
      Signed-off-by: NNaga Chumbalkar <nagananda.chumbalkar@hp.com>
      Link: http://lkml.kernel.org/r/20110708083555.2598.42216.sendpatchset@nchumbalkar.americas.hpqcorp.netSigned-off-by: NIngo Molnar <mingo@elte.hu>
      ded1f6ab
  15. 25 5月, 2011 1 次提交
  16. 20 5月, 2011 9 次提交
  17. 28 4月, 2011 1 次提交
    • S
      x86: devicetree: Configure IOAPIC pin only once · 20443598
      Sebastian Andrzej Siewior 提交于
      We use io_apic_setup_irq_pin() in order to configure pin's interrupt
      number polarity and type. This is done on every irq_create_of_mapping()
      which happens for instance during pci enable calls. Level typed
      interrupts are masked by default, edge are unmasked.
      
      On the first ->xlate() call the level interrupt is configured and
      masked. The driver calls request_irq() and the line is unmasked. Lets
      assume the interrupt line is shared with another device and we call
      pci_enable_device() for this device. The ->xlate() configures the pin
      again and it is masked. request_irq() does not unmask the line because
      it _is_ already unmasked according to its internal state. So the
      interrupt will never be unmasked again.
      
      This patch is based on an earlier work by Torben Hohn and solves the
      problem by configuring the pin only once. Since all devices must agree
      on the same type and polarity there is no point in configuring the pin
      more than once.
      
      [ tglx: Split out the ce4100 part into a separate patch ]
      
      Cc: Torben Hohn <torbenh@linutronix.de>
      Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Link: http://lkml.kernel.org/r/%3C20110427143052.GA15211%40linutronix.de%3ESigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      20443598
  18. 24 3月, 2011 1 次提交
    • R
      x86: Use syscore_ops instead of sysdev classes and sysdevs · f3c6ea1b
      Rafael J. Wysocki 提交于
      Some subsystems in the x86 tree need to carry out suspend/resume and
      shutdown operations with one CPU on-line and interrupts disabled and
      they define sysdev classes and sysdevs or sysdev drivers for this
      purpose.  This leads to unnecessarily complicated code and excessive
      memory usage, so switch them to using struct syscore_ops objects for
      this purpose instead.
      
      Generally, there are three categories of subsystems that use
      sysdevs for implementing PM operations: (1) subsystems whose
      suspend/resume callbacks ignore their arguments entirely (the
      majority), (2) subsystems whose suspend/resume callbacks use their
      struct sys_device argument, but don't really need to do that,
      because they can be implemented differently in an arguably simpler
      way (io_apic.c), and (3) subsystems whose suspend/resume callbacks
      use their struct sys_device argument, but the value of that argument
      is always the same and could be ignored (microcode_core.c).  In all
      of these cases the subsystems in question may be readily converted to
      using struct syscore_ops objects for power management and shutdown.
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Acked-by: NIngo Molnar <mingo@elte.hu>
      f3c6ea1b
  19. 18 3月, 2011 1 次提交
  20. 12 3月, 2011 1 次提交