1. 11 2月, 2007 1 次提交
  2. 07 2月, 2007 1 次提交
    • A
      [MIPS] Define MIPS_CPU_IRQ_BASE in generic header · 97dcb82d
      Atsushi Nemoto 提交于
      The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
      platforms and are same value on most platforms (0 or 16, depends on
      CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
      them customizable.  This will save a few cycle on each CPU interrupt.
      
      A good side effect is removing some dependencies to MALTA in generic
      SMTC code.
      
      Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
      mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
      them might cause some header dependency problem and there seems no
      good reason to customize it.  So currently only VR41XX is using custom
      MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
      
      Testing this patch on those platforms is greatly appreciated.  Thank
      you.
      Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      97dcb82d
  3. 09 12月, 2006 1 次提交
  4. 08 10月, 2006 1 次提交
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  9. 08 11月, 2005 1 次提交
  10. 30 10月, 2005 1 次提交