- 24 3月, 2011 4 次提交
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由 Akinobu Mita 提交于
minix bit operations are only used by minix filesystem and useless by other modules. Because byte order of inode and block bitmaps is different on each architecture like below: m68k: big-endian 16bit indexed bitmaps h8300, microblaze, s390, sparc, m68knommu: big-endian 32 or 64bit indexed bitmaps m32r, mips, sh, xtensa: big-endian 32 or 64bit indexed bitmaps for big-endian mode little-endian bitmaps for little-endian mode Others: little-endian bitmaps In order to move minix bit operations from asm/bitops.h to architecture independent code in minix filesystem, this provides two config options. CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k. CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu, m32r, mips, sh, xtensa). The architectures which always use little-endian bitmaps do not select these options. Finally, we can remove minix bit operations from asm/bitops.h for all architectures. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NGreg Ungerer <gerg@uclinux.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Michal Simek <monstr@monstr.eu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Hirokazu Takata <takata@linux-m32r.org> Acked-by: NRalf Baechle <ralf@linux-mips.org> Acked-by: NPaul Mundt <lethal@linux-sh.org> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Akinobu Mita 提交于
As the result of conversions, there are no users of ext2 non-atomic bit operations except for ext2 filesystem itself. Now we can put them into architecture independent code in ext2 filesystem, and remove from asm/bitops.h for all architectures. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Jan Kara <jack@suse.cz> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Akinobu Mita 提交于
Introduce little-endian bit operations to the big-endian architectures which do not have native little-endian bit operations and the little-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300, ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa) These architectures can just include generic implementation (asm-generic/bitops/le.h). Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: N"H. Peter Anvin" <hpa@zytor.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Richard Henderson 提交于
GCC 4.6 explicitly represents the MDR register. It may be accessed via the "z" constraint. Perhaps more importantly, it tracks when the MDR register is clobbered and uses the RETF instruction if the incoming value is still valid. Thus it is important to (at least) clobber the MDR register in relevant inline assembly fragments, lest RETF be used incorrectly. The only instances I could find are here. There are reads of the MDR register in kernel/gdb-stub.c, but that's harmless. Although, frankly, __builtin_return_address(0) might be a better thing in those cases. Certainly MDR isn't going to contain anything else that might be useful... Signed-off-by: NRichard Henderson <rth@redhat.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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- 23 3月, 2011 2 次提交
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由 FUJITA Tomonori 提交于
All architectures can use the common dma_addr_t typedef now. We can remove the arch specific dma_addr_t. Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: NArnd Bergmann <arnd@arndb.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Cc: Matt Turner <mattst88@gmail.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Eric Dumazet 提交于
Add a node parameter to alloc_thread_info(), and change its name to alloc_thread_info_node() This change is needed to allow NUMA aware kthread_create_on_cpu() Signed-off-by: NEric Dumazet <eric.dumazet@gmail.com> Acked-by: NDavid S. Miller <davem@davemloft.net> Reviewed-by: NAndi Kleen <ak@linux.intel.com> Acked-by: NRusty Russell <rusty@rustcorp.com.au> Cc: Tejun Heo <tj@kernel.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: David Howells <dhowells@redhat.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 19 3月, 2011 6 次提交
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由 David Howells 提交于
Emulate single stepping in KGDB on MN10300 by way of temporary breakpoint insertion. These breakpoints are never actually seen by KGDB, and will overlay KGDB's own breakpoints. The breakpoints are removed by switch_to() and reinstalled on switching back so that if preemption occurs, the preempting task doesn't hit them (though it will still hit KGDB's regular breakpoints). If KGDB is reentered for any reason, then the single step breakpoint is completely erased and must be set again by the debugger. We take advantage of the fact that KGDB will effectively halt all other CPUs whilst this CPU is single-stepping to avoid SMP problems. If the single-stepping task is preempted and killed without KGDB being reinvoked, then the breakpoint(s) will be cleared and KGDB will be jumped back into. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
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由 David Howells 提交于
Create generic kernel debugger hooks in the MN10300 arch and make gdbstub use them. This is a preparation for KGDB support. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
Create general kernel debugger cache flushing for MN10300 and get rid of the old stuff that gdbstub was using. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
Introduce a general config option for kernel debugger hooks so that both gdbstub and kgdb can use it and add a header file for both debuggers to use. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Thomas Gleixner 提交于
No users. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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- 14 3月, 2011 2 次提交
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由 David Howells 提交于
atomic_read() needs to ensure that it emits a load (which it can do by using ACCESS_ONCE()). Reported-by: NPeter Zijlstra <peterz@infradead.org> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Tkhai Kirill 提交于
Using __get_user_check(x, ptr++, size) leads to double increment of pointer. This macro uses the macro get_user directly, which itself is used in this way (get_user(x, ptr++)) in some functions of the kernel. The patch fixes the error. Reported-by: NTkhai Kirill <tkhai@yandex.ru> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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- 04 12月, 2010 1 次提交
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由 David Howells 提交于
Implement asm/syscall.h for the MN10300 arch. Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 10月, 2010 25 次提交
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由 Peter Zijlstra 提交于
Christoph reported a nice splat which illustrated a race in the new stack based kmap_atomic implementation. The problem is that we pop our stack slot before we're completely done resetting its state -- in particular clearing the PTE (sometimes that's CONFIG_DEBUG_HIGHMEM). If an interrupt happens before we actually clear the PTE used for the last slot, that interrupt can reuse the slot in a dirty state, which triggers a BUG in kmap_atomic(). Fix this by introducing kmap_atomic_idx() which reports the current slot index without actually releasing it and use that to find the PTE and delay the _pop() until after we're completely done. Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Reported-by: NChristoph Hellwig <hch@infradead.org> Acked-by: NRik van Riel <riel@redhat.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 David Howells 提交于
Save the current exception frame pointer in the thread_info struct rather than in a global variable as the latter makes SMP tricky, especially when preemption is also enabled. This also replaces __frame with current_frame() and rearranges header file inclusions to make it all compile. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com>
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由 Akira Takeuchi 提交于
Add support for SMSC911X and SMC911X for the ASB2364 unit. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com> cc: steve.glendinning@smsc.com cc: netdev@vger.kernel.org
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由 David Howells 提交于
Handle the IRQ multiplexer in the FPGA by implementing a cascade interrupt driver for it. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Mark Salter 提交于
Implement generic time support for MN10300. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Mark Salter 提交于
Use an ELF HWCAP flag to indicate to the process that the CPU provides LL/SC equivalent atomic operations unit support in addition to BSET/BCLR. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Mark Salter 提交于
The AM34 processor has an atomic operation that's the equivalent of LL/SC on other architectures. However, rather than being done through a pair of instructions, it's driven by writing to a pair of memory-mapped CPU control registers. One set of these registers (AARU/ADRU/ASRU) is available for use by userspace, but for userspace to access them a PTE must be set up to cover the region. This is done by dedicating the first vmalloc region page to this purpose, setting the permissions on its PTE such that userspace can access the page. glibc is hardcoded to expect the registers to be there. The way atomic ops are done through these registers is straightforward: (1) Write the address of the word you wish to access into AARU. This causes the CPU to go and fetch that word and load it into ADRU. The status bits are also cleared in ASRU. (2) The current data value is read from the ADRU register and modified. (3) To alter the data in RAM, the revised data is written back to the ADRU register, which causes the CPU to attempt to write it back. (4) The ASRU.RW flag (ASRU read watch), ASRU.LW flag (bus lock watch), ASRU.IW (interrupt watch) and the ASRU.BW (bus error watch) flags then must be checked to confirm that the operation wasn't aborted. If any of the watches have been set to true, the operation was aborted. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for MN10300. Also implement support for the MN2WS0060 processor and the ASB2364 evaluation board which are AM34 based. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Delete idle_timestamp from irq_cpustat_t as it's an unread relic. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Make the settings of interrupt priorities used by various services configurable at run time. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Mark Salter 提交于
Implement atomic ops using the atomic ops unit available in the AM34 CPU. This allows the equivalent of the LL/SC instructions to be found on other CPUs. Signed-off-by: NMark Salter <msalter@redhat.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Make the FPU operate in non-lazy mode under SMP so that when the process that is currently using the FPU migrates to a different CPU, we don't have to ping its previous CPU to flush the FPU context. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control as the bits are a more suitable layout. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Make controllable the use of the PIDR register to mark TLB entries as belonging to particular processes. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
Rename __flush_tlb*() to local_flush_tlb*() as it's more appropriate, and ready to differentiate local from global TLB flushes when SMP is introduced. Whilst we're at it, get rid of __flush_tlb_global() and make local_flush_tlb_page() take an mm_struct pointer rather than VMA pointer. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
The AM34 core is able to do cache snooping, and so can skip some of the cache flushing. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Differentiate local cache flushing from global cache flushing so that they can be done differently on SMP systems. Rename the cache functions from: mn10300_[id]cache_*() to: mn10300_[id]_localcache_*() and on a UP system, assign the global labels to the local labels. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
The functions that perform cache flushing should take addresses of unsigned long type, not unsigned int. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
Reorder asm/cacheflush.h to put arch primitives first, before the main functions so that the main functions can be inline asm rather than #defines when non-trivial. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 David Howells 提交于
Provide a MN10300_CACHE_ENABLED config option as inverted logic of MN10300_CACHE_DISABLED to make things simpler. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Remove the monitor trap function and the set_jtag_stub function as they're not really necessary. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Add CPU register declarations for the AM34 subarch. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Don't hard code the cacheline size in the cache control register definitions. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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由 Akira Takeuchi 提交于
Move the DMA engine control register definitions to the MN103E010 processor directory so that the MN2WS0050 processor can have its own. Signed-off-by: NAkira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: NKiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: NDavid Howells <dhowells@redhat.com>
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