- 05 9月, 2009 1 次提交
-
-
由 Robert Schwebel 提交于
Today's linux-next fails to build with sound/arm/pxa2xx-ac97.c: In function 'pxa2xx_ac97_probe': sound/arm/pxa2xx-ac97.c:211: error: 'pxa2xx_audio_ops_t' has no member named 'codec_data' make[2]: *** [sound/arm/pxa2xx-ac97.o] Error 1 It looks like commit e2365bf3 has introduced this; patch below. Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 03 9月, 2009 1 次提交
-
-
由 Mark Brown 提交于
Avoids potential issues if we read back unexpected values during a read/modify/write cycle. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 01 9月, 2009 2 次提交
-
-
由 jassi brar 提交于
Bug was caught while trying to use WM8580 as I2S master on SMDK. Symptoms were lesser LRCLK read by CRO(41.02 instead of 44.1 KHz) Solved by referring to WM8580A manual and setting mask value correctly and making the code to not touch 'reserved' bits of PLL4 register. Signed-off-by: NJassi <jassi.brar@samsung.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Barry Song 提交于
As discussed, the patch uses the original TDM order without rewriting. For the match between TDM slot number and audio channel number, a new API need be added. Signed-off-by: NBarry Song <21cnbao@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 29 8月, 2009 1 次提交
-
-
由 Jarkko Nikula 提交于
The McBSP1 port in OMAP3 processors (I believe OMAP2 too but I don't have specifications to check it) have additional CLKR and FSR pins for McBSP1 receiver. Reset default is that receiver is using bit clock and frame sync signal from those pins but it is possible to configure to use also CLKX and FSX pins as well. In fact, other McBSP ports are doing that internally that transmitter and receiver share the CLKX and FSX. Add functionaly that machine drivers can set the CLKR and FSR sources by using the snd_soc_dai_set_sysclk. Thanks to "Aggarwal, Anuj" <anuj.aggarwal@ti.com> for reporting the issue. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 28 8月, 2009 1 次提交
-
-
由 Chaithrika U S 提交于
Also, the codec setup data structure has to remain for successful probe. Signed-off-by: NChaithrika U S <chaithrika@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 26 8月, 2009 5 次提交
-
-
由 Mark Brown 提交于
If the requested FLL configuration is the one we're currently running in it's at best pointless to reconfigure the FLL. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Mark Brown 提交于
We now need the PCM header to kick the DMA. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Mark Brown 提交于
Now that we don't need the I2C address for the device the platform data is redundant so allow it to be omitted. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Tested-by: NChaithrika U S <chaithrika@ti.com>
-
由 Mark Brown 提交于
No point in building them for S3C64xx, certainly no sense in running into build issues there. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
Fix the write to PMBR1 register through I2C. Also, the constant which holds the value to write is now called TWL4030_GPIO6_PWM0_MUTE. This name is based on TRM to avoid confusion. Signed-off-by: NJorge Eduardo Candelaria <x0107209@ti.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 25 8月, 2009 7 次提交
-
-
由 Shine Liu 提交于
s3c24xx dma has the auto reload feature, when the the trnasfer is done, CURR_TC(DSTAT[19:0], current value of transfer count) reaches 0, and DMA ACK becomes 1, and then, TC(DCON[19:0]) will be loaded into CURR_TC. So the transmission is repeated. IRQ is issued while auto reload occurs. We change the DISRC and DCON[19:0] in the ISR, but at this time, the auto reload has been performed already. The first block is being re-transmitted by the DMA. So we need rewrite the DISRC and DCON[19:0] for the next block immediatly after the this block has been started to be transported. The function s3c2410_dma_started() is for this perpose, which is called in the form of "s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_STARTED);" in s3c24xx_pcm_trigger(). But it is not correct. DMA transmission won't start until DMA REQ signal arrived, it is the time s3c24xx_snd_txctrl(1) or s3c24xx_snd_rxctrl(1) is called in s3c24xx_i2s_trigger(). In the current framework, s3c24xx_pcm_trigger() is always called before s3c24xx_pcm_trigger(). So the s3c2410_dma_started() should be called in s3c24xx_pcm_trigger() after s3c24xx_snd_txctrl(1) or s3c24xx_snd_rxctrl(1) is called in this function. However, s3c2410_dma_started() is dma related, to call this function we should provide the channel number, which is given by substream->runtime->private_data->params->channel. The private_data points to a struct s3c24xx_runtime_data object, which is define in s3c24xx_pcm.c, so s3c2410_dma_started() can't be called in s3c24xx_i2s.c Fix this by moving the call to signal the DMA started to the DAI drivers. Signed-off-by: NShine Liu <liuxian@redflag-linux.com> Signed-off-by: NShine Liu <shinel@foxmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Jarkko Nikula 提交于
Functionality of functions omap_mcbsp_xmit_enable and omap_mcbsp_recv_enable can be merged into omap_mcbsp_start and omap_mcbsp_stop since API of those omap_mcbsp_start and omap_mcbsp_stop was changed recently allowing to start and stop individually the transmitter and receiver. This cleans up the code in arch/arm/plat-omap/mcbsp.c and in sound/soc/omap/omap-mcbsp.c which was the only user for those removed functions. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Acked-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Jarkko Nikula 提交于
Commit ca6e2ce0 is setting up few XCCR and RCCR bits for I2S and DPS_A formats. Part of the bits are already set for all formats and I believe that XDISABLE and RDISABLE bits are format independent. As XCCR and RCCR are found only from OMAP2430 and OMAP34xx, I move setup of XDISABLE and RDISABLE to where those cpu's are tested and remove format dependent part for simplicity. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Acked-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Jarkko Nikula 提交于
Use more descriptive than numerical value when showing and storing the McBSP DMA operating mode. Show function is using similar syntax than e.g. the led triggers so that all possible values for store function are printed but with current value surrounded with square brackets. Signed-off-by: NJarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NEduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Janusz Krzysztofik 提交于
Implement DMA channel self linking on OMAP1510 using AUTO_INIT and REPEAT flags of the DMA CCR register. Created against linux-2.6.31-rc5. Tested on Amstrad Delta. Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Mark Brown 提交于
-
由 Mark Brown 提交于
Ensure that the core DMA support is available when building for S3C64xx. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 24 8月, 2009 3 次提交
-
-
由 Takashi Iwai 提交于
Signed-off-by: NTakashi Iwai <tiwai@suse.de>
-
由 Takashi Iwai 提交于
To fix compile errors. Signed-off-by: NTakashi Iwai <tiwai@suse.de>
-
由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 23 8月, 2009 1 次提交
-
-
由 Roel Kluin 提交于
Free socdev if snd_soc_init_card() fails. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 22 8月, 2009 1 次提交
-
-
由 Mark Brown 提交于
Currently when built with DEBUG DAPM will dump information about the power state decisions it is taking for each widget to dmesg. This isn't an ideal way of getting the information - it requires a kernel build to turn it on and off and for large hub CODECs the volume of information is so large as to be illegible. When the output goes to the console it can also cause a noticable impact on performance simply to print it out. Improve the situation by adding a dapm directory to our debugfs tree containing a file per widget with the same information in it. This still requires a decision to build with debugfs support but is easier to navigate and much less intrusive. In addition to the previously displayed information active streams are also shown in these files. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
- 21 8月, 2009 17 次提交
-
-
由 Kuninori Morimoto 提交于
This patch is tested by ms7724se Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Kuninori Morimoto 提交于
This is very simple driver for ALSA It supprt headphone output and stereo input only This patch is tested by ms7724se Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Ben Dooks 提交于
Add support for the tlv320aic3x CODEC on the Simtec Hermes board. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Ben Dooks 提交于
Fixup the device changes by modifying the files that we just removed the explicit device creation from with i2c_register_board_info() until this can be moved into the relevant board files. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Ben Dooks 提交于
The tlv320aic3x driver managed its own i2c device, instead of an extant one created by the board support code. Change the code to make it so that the driver binds to an extant (in this case i2c) device. Add explict tlv320aic33 as well as tlv320aic3x to the supported device table and remove the old driver bindings from the users of this code. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Ben Dooks 提交于
Add core support for the range of S3C24XX Simtec boards with TLV320AIC23 CODECs on them. Since there are also boards with similar IIS routing the AMP and the configuration code is placed in a core file for re-use with other CODEC bindings. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eduardo Valentin 提交于
Configures DMA sync mode depending on McBSP operating mode value. The value is configurable by McBSP instance. So, depending on McBSP operating mode, the DMA sync mode is passed from omap-mcbsp to omap-pcm. Besides that, it also configures McBSP threshold value depending on which McBSP mode is activated. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eduardo Valentin 提交于
This patch changes the way DMA is done in omap-pcm.c in order to reduce power consumption. There is no need to have so much SW control in order to have DMA in idle state during audio streaming. Configuring McBSP threshold value and DMA to FRAME_SYNC are sufficient. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eero Nurkkala 提交于
All these steps are required for ASoC to behave correctly. rccr and xccr are format dependent, for example TDM audio has different values than I2S or DSP_A. Also the omap_mcbsp_xmit_enable and/or omap_mcbsp_recv_enable must be called right after the DMA has started. This provides no longer L and R channels switching at random. Signed-off-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eero Nurkkala 提交于
This is, no RFIG or XFIG (Not defined in 34xx), correct initiliazation of rccr and xccr. Signed-off-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eduardo Valentin 提交于
Align DMA address to DMA burst transaction sizes. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eduardo Valentin 提交于
Improve DMA transfers by enabling Burst transaction. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NJarkko Nikula <jhnikula@gmail.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eero Nurkkala 提交于
The device no longer hits retention if element DMA mode is taken for at least the duration of the serial console timeout. Force element DMA mode to shut down through smartidle. Signed-off-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Acked-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eero Nurkkala 提交于
When no-idle mode is taken, wakeups need not to be enabled. Moreover, CLOCKACTIVITY bits are unnecessary with this mode also. Signed-off-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Acked-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eduardo Valentin 提交于
Use dma mode property to configure NO IDLE or SMART IDLE of McBSPs. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eero Nurkkala 提交于
FCLK may get autogated so that it prevents the McBSP to work properly. It is the bit 9 that must be set for maintaining the McBSP FCLK. Signed-off-by: NEero Nurkkala <ext-eero.nurkkala@nokia.com> Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NJarkko Nikula <jarkko.nikula@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-
由 Eduardo Valentin 提交于
Configure only XRDYEN and RRDYEN wakeup signals in order to get better power consumption. Signed-off-by: NEduardo Valentin <eduardo.valentin@nokia.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
-