1. 30 6月, 2006 2 次提交
    • I
      [PATCH] genirq: cleanup: turn ARCH_HAS_IRQ_PER_CPU into CONFIG_IRQ_PER_CPU · 0d7012a9
      Ingo Molnar 提交于
      Cleanup: change ARCH_HAS_IRQ_PER_CPU into a Kconfig method.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      0d7012a9
    • I
      [PATCH] genirq: rename desc->handler to desc->chip · d1bef4ed
      Ingo Molnar 提交于
      This patch-queue improves the generic IRQ layer to be truly generic, by adding
      various abstractions and features to it, without impacting existing
      functionality.
      
      While the queue can be best described as "fix and improve everything in the
      generic IRQ layer that we could think of", and thus it consists of many
      smaller features and lots of cleanups, the one feature that stands out most is
      the new 'irq chip' abstraction.
      
      The irq-chip abstraction is about describing and coding and IRQ controller
      driver by mapping its raw hardware capabilities [and quirks, if needed] in a
      straightforward way, without having to think about "IRQ flow"
      (level/edge/etc.) type of details.
      
      This stands in contrast with the current 'irq-type' model of genirq
      architectures, which 'mixes' raw hardware capabilities with 'flow' details.
      The patchset supports both types of irq controller designs at once, and
      converts i386 and x86_64 to the new irq-chip design.
      
      As a bonus side-effect of the irq-chip approach, chained interrupt controllers
      (master/slave PIC constructs, etc.) are now supported by design as well.
      
      The end result of this patchset intends to be simpler architecture-level code
      and more consolidation between architectures.
      
      We reused many bits of code and many concepts from Russell King's ARM IRQ
      layer, the merging of which was one of the motivations for this patchset.
      
      This patch:
      
      rename desc->handler to desc->chip.
      
      Originally i did not want to do this, because it's a big patch.  But having
      both "desc->handler", "desc->handle_irq" and "action->handler" caused a
      large degree of confusion and made the code appear alot less clean than it
      truly is.
      
      I have also attempted a dual approach as well by introducing a
      desc->chip alias - but that just wasnt robust enough and broke
      frequently.
      
      So lets get over with this quickly.  The conversion was done automatically
      via scripts and converts all the code in the kernel.
      
      This renaming patch is the first one amongst the patches, so that the
      remaining patches can stay flexible and can be merged and split up
      without having some big monolithic patch act as a merge barrier.
      
      [akpm@osdl.org: build fix]
      [akpm@osdl.org: another build fix]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      d1bef4ed
  2. 28 6月, 2006 1 次提交
    • S
      [PATCH] sched: mc/smt power savings sched policy · 5c45bf27
      Siddha, Suresh B 提交于
      sysfs entries 'sched_mc_power_savings' and 'sched_smt_power_savings' in
      /sys/devices/system/cpu/ control the MC/SMT power savings policy for the
      scheduler.
      
      Based on the values (1-enable, 0-disable) for these controls, sched groups
      cpu power will be determined for different domains.  When power savings
      policy is enabled and under light load conditions, scheduler will minimize
      the physical packages/cpu cores carrying the load and thus conserving
      power(with a perf impact based on the workload characteristics...  see OLS
      2005 CMP kernel scheduler paper for more details..)
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Nick Piggin <nickpiggin@yahoo.com.au>
      Cc: Con Kolivas <kernel@kolivas.org>
      Cc: "Chen, Kenneth W" <kenneth.w.chen@intel.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      5c45bf27
  3. 27 6月, 2006 2 次提交
  4. 26 6月, 2006 3 次提交
  5. 23 6月, 2006 1 次提交
    • B
      [PATCH] vgacon: make VGA_MAP_MEM take size, remove extra use · 4f1bcaf0
      Bjorn Helgaas 提交于
      VGA_MAP_MEM translates to ioremap() on some architectures.  It makes sense
      to do this to vga_vram_base, because we're going to access memory between
      vga_vram_base and vga_vram_end.
      
      But it doesn't really make sense to map starting at vga_vram_end, because
      we aren't going to access memory starting there.  On ia64, which always has
      to be different, ioremapping vga_vram_end gives you something completely
      incompatible with ioremapped vga_vram_start, so vga_vram_size ends up being
      nonsense.
      
      As a bonus, we often know the size up front, so we can use ioremap()
      correctly, rather than giving it a zero size.
      Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
      Cc: "Antonino A. Daplas" <adaplas@pol.net>
      Cc: "Luck, Tony" <tony.luck@intel.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      4f1bcaf0
  6. 21 6月, 2006 11 次提交
  7. 18 6月, 2006 1 次提交
  8. 15 6月, 2006 8 次提交
  9. 12 6月, 2006 1 次提交
  10. 09 6月, 2006 9 次提交
    • P
      [PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpc · e9370ae1
      Paul Mackerras 提交于
      This gives the ability to control whether alignment exceptions get
      fixed up or reported to the process as a SIGBUS, using the existing
      PR_SET_UNALIGN and PR_GET_UNALIGN prctls.  We do not implement the
      option of logging a message on alignment exceptions.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e9370ae1
    • P
      [PATCH] powerpc: Implement support for setting little-endian mode via prctl · fab5db97
      Paul Mackerras 提交于
      This adds the PowerPC part of the code to allow processes to change
      their endian mode via prctl.
      
      This also extends the alignment exception handler to be able to fix up
      alignment exceptions that occur in little-endian mode, both for
      "PowerPC" little-endian and true little-endian.
      
      We always enter signal handlers in big-endian mode -- the support for
      little-endian mode does not amount to the creation of a little-endian
      user/kernel ABI.  If the signal handler returns, the endian mode is
      restored to what it was when the signal was delivered.
      
      We have two new kernel CPU feature bits, one for PPC little-endian and
      one for true little-endian.  Most of the classic 32-bit processors
      support PPC little-endian, and this is reflected in the CPU feature
      table.  There are two corresponding feature bits reported to userland
      in the AT_HWCAP aux vector entry.
      
      This is based on an earlier patch by Anton Blanchard.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      fab5db97
    • M
      [PATCH] powerpc: oprofile support for POWER6 · e78dbc80
      Michael Neuling 提交于
      POWER6 moves some of the MMCRA bits and also requires some bits to be
      cleared each PMU interrupt.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Acked-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e78dbc80
    • C
      [PATCH] powerpc: node-aware dma allocations · 8eb6c6e3
      Christoph Hellwig 提交于
      Make sure dma_alloc_coherent allocates memory from the local node.  This
      is important on Cell where we avoid going through the slow cpu
      interconnect.
      
      Note:  I could only test this patch on Cell, it should be verified on
      some pseries machine by those that have the hardware.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      8eb6c6e3
    • C
      [PATCH] powerpc: implement pcibus_to_node and pcibus_to_cpumask · 318facbe
      Christoph Hellwig 提交于
      On 64bit powerpc we can find out what node a pci bus hangs off, so
      implement the topology.h macros that export this information.
      
      For 32bit this seems a little more difficult, but I don't know of 32bit
      powerpc NUMA machines either, so let's leave it out for now.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      318facbe
    • J
      [PATCH] powerpc: reorg RTAS delay code · 507279db
      John Rose 提交于
      This patch attempts to handle RTAS "busy" return codes in a more simple
      and consistent manner.  Typical callers of RTAS shouldn't have to
      manage wait times and delay calls.
      
      This patch also changes the kernel to use msleep() rather than udelay()
      when a runtime delay is necessary.  This will avoid CPU soft lockups
      for extended delay conditions.
      Signed-off-by: NJohn Rose <johnrose@austin.ibm.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      507279db
    • B
      [PATCH] powerpc: Fix buglet with MMU hash management · c5cf0e30
      Benjamin Herrenschmidt 提交于
      Our MMU hash management code would not set the "C" bit (changed bit) in
      the hardware PTE when updating a RO PTE into a RW PTE. That would cause
      the hardware to possibly to a write back to the hash table to set it on
      the first store access, which in addition to being a performance issue,
      might also hit a bug when running with native hash management (non-HV)
      as our code is specifically optimized for the case where no write back
      happens.
      
      Thus there is a very small therocial window were a hash PTE can become
      corrupted if that HPTE has just been upgraded to read write, a store
      access happens on it, and that races with another processor evicting
      that same slot. Since eviction (caused by an almost full hash) is
      extremely rare, the bug is very unlikely to happen fortunately.
      
      This fixes by allowing the updating of the protection bits in the native
      hash handling to also set (but not clear) the "C" bit, and, in order to
      also improve performances in the general case, by always setting that
      bit on newly inserted hash PTE so that writeback really never happens.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c5cf0e30
    • B
      [PATCH] powerpc vdso updates · a5bba930
      Benjamin Herrenschmidt 提交于
      This patch cleans up some locking & error handling in the ppc vdso and
      moves the vdso base pointer from the thread struct to the mm context
      where it more logically belongs. It brings the powerpc implementation
      closer to Ingo's new x86 one and also adds an arch_vma_name() function
      allowing to print [vsdo] in /proc/<pid>/maps if Ingo's x86 vdso patch is
      also applied.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a5bba930
    • R
      [PATCH] powerpc: enable PPC_PTRACE_[GS]ETREGS on ppc32 · 98a90c02
      Renzo Davoli 提交于
      I have tested PPC_PTRACE_GETREGS and PPC_PTRACE_SETREGS on umview.
      
      I do not understand why historically these tags has been defined as
      PPC_PTRACE_GETREGS and PPC_PTRACE_SETREGS instead of simply
      PTRACE_[GS]ETREGS. The other "originality" is that the address must be
      put into the "addr" field instead of the "data" field as stated in the
      manual.
      Signed-off-by: Nrenzo davoli <renzo@cs.unibo.it>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      98a90c02
  11. 27 5月, 2006 1 次提交