1. 10 12月, 2013 1 次提交
    • S
      dma: add channel request API that supports deferred probe · 0ad7c000
      Stephen Warren 提交于
      dma_request_slave_channel() simply returns NULL whenever DMA channel
      lookup fails. Lookup could fail for two distinct reasons:
      
      a) No DMA specification exists for the channel name.
         This includes situations where no DMA specifications exist at all, or
         other general lookup problems.
      
      b) A DMA specification does exist, yet the driver for that channel is not
         yet registered.
      
      Case (b) should trigger deferred probe in client drivers. However, since
      they have no way to differentiate the two situations, it cannot.
      
      Implement new function dma_request_slave_channel_reason(), which performs
      identically to dma_request_slave_channel(), except that it returns an
      error-pointer rather than NULL, which allows callers to detect when
      deferred probe should occur.
      
      Eventually, all drivers should be converted to this new API, the old API
      removed, and the new API renamed to the more desirable name. This patch
      doesn't convert the existing API and all drivers in one go, since some
      drivers call dma_request_slave_channel() then dma_request_channel() if
      that fails. That would require either modifying dma_request_channel() in
      the same way, or adding extra error-handling code to all affected
      drivers, and there are close to 100 drivers using the other API, rather
      than just the 15-20 or so that use dma_request_slave_channel(), which
      might be tenable in a single patch.
      
      acpi_dma_request_slave_chan_by_name() doesn't currently implement
      deferred probe. It should, but this will be addressed later.
      Acked-by: NDan Williams <dan.j.williams@intel.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      0ad7c000
  2. 15 11月, 2013 3 次提交
  3. 14 11月, 2013 2 次提交
  4. 25 10月, 2013 1 次提交
  5. 02 9月, 2013 1 次提交
  6. 23 8月, 2013 1 次提交
    • B
      dmaengine: make dma_channel_rebalance() NUMA aware · c4d27c4d
      Brice Goglin 提交于
      dma_channel_rebalance() currently distributes channels by processor ID.
      These IDs often change with the BIOS, and the order isn't related to
      the DMA channel list (related to PCI bus ids).
      * On my SuperMicro dual E5 machine, first socket has processor IDs [0-7]
        (and [16-23] for hyperthreads), second socket has [8-15]+[24-31]
        => channels are properly allocated to local CPUs.
      * On Dells R720 with same processors, first socket has even processor IDs,
        second socket has odd numbers
        => half the processors get channels on the remote socket, causing
           cross-NUMA traffic and lower DMA performance.
      
      Change nth_chan() to return the channel with min table_count and in the
      NUMA node of the given CPU, if any. If none, the (non-local) channel with
      min table_count is returned. nth_chan() is therefore renamed into min_chan()
      since we don't iterate until the nth channel anymore. In practice, the
      behavior is the same because first channels are taken first and are then
      ignored because they got an additional reference.
      
      The new code has a slightly higher complexity since we always scan the
      entire list of channels for finding the minimal table_count (instead
      of stopping after N chans), and because we check whether the CPU is in the
      DMA device locality mask. Overall we still have time complexity =
      number of chans x number of processors. This rebalance is rarely used,
      so this won't hurt.
      
      On the above SuperMicro machine, channels are still allocated the same.
      On the Dells, there are no locality issue anymore (MEMCPY channel X goes
      to processor X and to its hyperthread sibling).
      Signed-off-by: NBrice Goglin <Brice.Goglin@inria.fr>
      Signed-off-by: NDan Williams <djbw@fb.com>
      c4d27c4d
  7. 19 8月, 2013 1 次提交
  8. 13 8月, 2013 1 次提交
    • Z
      dmaengine: add interface of dma_get_slave_channel · 7bb587f4
      Zhangfei Gao 提交于
      Suggested by Arnd, add dma_get_slave_channel interface
      Dma host driver could get specific channel specificied by request line, rather than filter.
      
      host example:
      static struct dma_chan *xx_of_dma_simple_xlate(struct of_phandle_args *dma_spec,
      		struct of_dma *ofdma)
      {
      	struct xx_dma_dev *d = ofdma->of_dma_data;
      	unsigned int request = dma_spec->args[0];
      
      	if (request > d->dma_requests)
      		return NULL;
      
      	return dma_get_slave_channel(&(d->chans[request].vc.chan));
      }
      
      probe:
      of_dma_controller_register((&op->dev)->of_node, xx_of_dma_simple_xlate, d);
      Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      7bb587f4
  9. 26 7月, 2013 1 次提交
  10. 04 7月, 2013 1 次提交
  11. 16 4月, 2013 1 次提交
  12. 15 4月, 2013 2 次提交
  13. 28 2月, 2013 1 次提交
  14. 08 1月, 2013 1 次提交
  15. 07 1月, 2013 1 次提交
    • J
      dmaengine: add helper function to request a slave DMA channel · 9a6cecc8
      Jon Hunter 提交于
      Currently slave DMA channels are requested by calling dma_request_channel()
      and requires DMA clients to pass various filter parameters to obtain the
      appropriate channel.
      
      With device-tree being used by architectures such as arm and the addition of
      device-tree helper functions to extract the relevant DMA client information
      from device-tree, add a new function to request a slave DMA channel using
      device-tree. This function is currently a simple wrapper that calls the
      device-tree of_dma_request_slave_channel() function.
      
      Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Stephen Warren <swarren@nvidia.com>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Vinod Koul <vinod.koul@intel.com>
      Cc: Dan Williams <djbw@fb.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NJon Hunter <jon-hunter@ti.com>
      Reviewed-by: NStephen Warren <swarren@wwwdotorg.org>
      Acked-by: NRob Herring <rob.herring@calxeda.com>
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      9a6cecc8
  16. 06 10月, 2012 1 次提交
  17. 20 7月, 2012 1 次提交
  18. 06 4月, 2012 1 次提交
  19. 06 3月, 2012 1 次提交
  20. 18 11月, 2011 1 次提交
    • J
      DMAEngine: Define interleaved transfer request api · b14dab79
      Jassi Brar 提交于
      Define a new api that could be used for doing fancy data transfers
      like interleaved to contiguous copy and vice-versa.
      Traditional SG_list based transfers tend to be very inefficient in
      such cases as where the interleave and chunk are only a few bytes,
      which call for a very condensed api to convey pattern of the transfer.
      This api supports all 4 variants of scatter-gather and contiguous transfer.
      
      Of course, neither can this api help transfers that don't lend to DMA by
      nature, i.e, scattered tiny read/writes with no periodic pattern.
      
      Also since now we support SLAVE channels that might not provide
      device_prep_slave_sg callback but device_prep_interleaved_dma,
      remove the BUG_ON check.
      Signed-off-by: NJassi Brar <jaswinder.singh@linaro.org>
      Acked-by: NBarry Song <Baohua.Song@csr.com>
      [renamed dmaxfer_template to dma_interleaved_template
       did fixup after the enum dma_transfer_merge]
      Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
      b14dab79
  21. 04 8月, 2011 1 次提交
  22. 24 6月, 2011 1 次提交
  23. 22 6月, 2011 1 次提交
    • A
      net: remove mm.h inclusion from netdevice.h · b7f080cf
      Alexey Dobriyan 提交于
      Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
      
      To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
      definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
      via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
      Removal of mm.h from scatterlist.h was tried and was found not feasible
      on most archs, so the link was cutoff earlier.
      
      Hope people are OK with tiny include file.
      
      Note, that mm_types.h is still dragged in, but it is a separate story.
      Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      b7f080cf
  24. 08 10月, 2010 2 次提交
  25. 06 10月, 2010 1 次提交
    • S
      dmaengine: add possibility for cyclic transfers · 782bc950
      Sascha Hauer 提交于
      Cyclic transfers are useful for audio where a single buffer divided
      in periods has to be transfered endlessly until stopped. After being
      prepared the transfer is started using the dma_async_descriptor->tx_submit
      function. dma_async_descriptor->callback is called after each period.
      The transfer is stopped using the DMA_TERMINATE_ALL callback.
      While being used for cyclic transfers the channel cannot be used
      for other transfer types.
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      782bc950
  26. 18 5月, 2010 1 次提交
  27. 17 5月, 2010 1 次提交
    • J
      DMA ENGINE: Do not reset 'private' of channel · cc05ea0c
      Jassi Brar 提交于
      The member 'private' of 'struct dma_chan' is meant for passing
      data between client and the controller driver.
      
      The DMA client driver may point it to platform specific stuff after
      acquiring the channel. So, it is the responsiblity of the same code
      to reset it, if it must.
      
      The DMA engine doesn't set it and hence, shouldn't reset it either.
      
      This reseting of private by DMA Engine comes in the way of implementing
      default channel settings during DMAC probe. That capability is useful
      for not having the clients to always provide platform specific data,
      like Rx/Tx FIFO addresses, which usually doesn't change across channel
      requests.
      Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      cc05ea0c
  28. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  29. 27 3月, 2010 2 次提交
    • L
      DMAENGINE: generic channel status v2 · 07934481
      Linus Walleij 提交于
      Convert the device_is_tx_complete() operation on the
      DMA engine to a generic device_tx_status()operation which
      can return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE,
      DMA_TX_PAUSED.
      
      [dan.j.williams@intel.com: update for timberdale]
      Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
      Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Cc: Maciej Sosnowski <maciej.sosnowski@intel.com>
      Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Li Yang <leoli@freescale.com>
      Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Cc: Magnus Damm <damm@opensource.se>
      Cc: Liam Girdwood <lrg@slimlogic.co.uk>
      Cc: Joe Perches <joe@perches.com>
      Cc: Roland Dreier <rdreier@cisco.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      07934481
    • L
      DMAENGINE: generic slave control v2 · c3635c78
      Linus Walleij 提交于
      Convert the device_terminate_all() operation on the
      DMA engine to a generic device_control() operation
      which can now optionally support also pausing and
      resuming DMA on a certain channel. Implemented for the
      COH 901 318 DMAC as an example.
      
      [dan.j.williams@intel.com: update for timberdale]
      Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com>
      Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Cc: Maciej Sosnowski <maciej.sosnowski@intel.com>
      Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Li Yang <leoli@freescale.com>
      Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
      Cc: Paul Mundt <lethal@linux-sh.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Cc: Magnus Damm <damm@opensource.se>
      Cc: Liam Girdwood <lrg@slimlogic.co.uk>
      Cc: Joe Perches <joe@perches.com>
      Cc: Roland Dreier <rdreier@cisco.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      c3635c78
  30. 17 2月, 2010 1 次提交
    • T
      percpu: add __percpu sparse annotations to what's left · a29d8b8e
      Tejun Heo 提交于
      Add __percpu sparse annotations to places which didn't make it in one
      of the previous patches.  All converions are trivial.
      
      These annotations are to make sparse consider percpu variables to be
      in a different address space and warn if accessed without going
      through percpu accessors.  This patch doesn't affect normal builds.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Acked-by: NBorislav Petkov <borislav.petkov@amd.com>
      Cc: Dan Williams <dan.j.williams@intel.com>
      Cc: Huang Ying <ying.huang@intel.com>
      Cc: Len Brown <lenb@kernel.org>
      Cc: Neil Brown <neilb@suse.de>
      a29d8b8e
  31. 03 2月, 2010 1 次提交
  32. 20 11月, 2009 2 次提交
  33. 03 10月, 2009 1 次提交