- 11 7月, 2006 1 次提交
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由 Lennert Buytenhek 提交于
Newer ARMs have a 40 bit physical address space, but mapping physical memory above 4G needs a special page table format which we (currently?) do not use for userspace mappings, so what happens instead is that mapping an address >= 4G will happily discard the upper bits and wrap. There is a valid_mmap_phys_addr_range() arch hook where we could check for >= 4G addresses and deny the mapping, but this hook takes an unsigned long address: static inline int valid_mmap_phys_addr_range(unsigned long addr, size_t size); And drivers/char/mem.c:mmap_mem() calls it like this: static int mmap_mem(struct file * file, struct vm_area_struct * vma) { size_t size = vma->vm_end - vma->vm_start; if (!valid_mmap_phys_addr_range(vma->vm_pgoff << PAGE_SHIFT, size)) So that's not much help either. This patch makes the hook take a pfn instead of a phys address. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 01 7月, 2006 1 次提交
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由 Jörn Engel 提交于
Signed-off-by: NJörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 28 6月, 2006 1 次提交
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由 Greg Kroah-Hartman 提交于
Based on a patch series originally from Vivek Goyal <vgoyal@in.ibm.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 26 6月, 2006 1 次提交
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由 Christoph Lameter 提交于
Remove VM_LOCKED before remap_pfn range from device drivers and get rid of VM_SHM. remap_pfn_range() already sets VM_IO. There is no need to set VM_SHM since it does nothing. VM_LOCKED is of no use since the remap_pfn_range does not place pages on the LRU. The pages are therefore never subject to swap anyways. Remove all the vm_flags settings before calling remap_pfn_range. After removing all the vm_flag settings no use of VM_SHM is left. Drop it. Signed-off-by: NChristoph Lameter <clameter@sgi.com> Acked-by: NHugh Dickins <hugh@veritas.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 23 6月, 2006 1 次提交
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由 Yasunori Goto 提交于
Consolidate the various arch-specific implementations of pxm_to_node() and node_to_pxm() into a single generic version. Signed-off-by: NYasunori Goto <y-goto@jp.fujitsu.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: "Brown, Len" <len.brown@intel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 09 5月, 2006 1 次提交
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由 Bjorn Helgaas 提交于
This closes a couple holes in our attribute aliasing avoidance scheme: - The current kernel fails mmaps of some /dev/mem MMIO regions because they don't appear in the EFI memory map. This keeps X from working on the Intel Tiger box. - The current kernel allows UC mmap of the 0-1MB region of /sys/.../legacy_mem even when the chipset doesn't support UC access. This causes an MCA when starting X on HP rx7620 and rx8620 boxes in the default configuration. There's more detail in the Documentation/ia64/aliasing.txt file this adds, but the general idea is that if a region might be covered by a granule-sized kernel identity mapping, any access via /dev/mem or mmap must use the same attribute as the identity mapping. Otherwise, we fall back to using an attribute that is supported according to the EFI memory map, or to using UC if the EFI memory map doesn't mention the region. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 21 4月, 2006 1 次提交
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由 Satoru Takeuchi 提交于
This patch removes following compile time warnings: drivers/pci/pci-sysfs.c: In function `pci_read_legacy_io': drivers/pci/pci-sysfs.c:257: warning: implicit declaration of function `ia64_pci_legacy_read' drivers/pci/pci-sysfs.c: In function `pci_write_legacy_io': drivers/pci/pci-sysfs.c:280: warning: implicit declaration of function `ia64_pci_legacy_write' It also fixes wrong definition of ia64_pci_legacy_write (type of `bus' is not `pci_dev', but `pci_bus'). Signed-Off-By: NSatoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 28 2月, 2006 1 次提交
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由 Matthew Wilcox 提交于
pcibios_setup() should return NULL if it handled a parameter. Since ia64 handles no parameters, it should return the string that was passed in, not NULL. This brings ia64 into line with all other architectures that handle no parameters. Signed-off-by: NMatthew Wilcox <matthew@wil.cx> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 17 1月, 2006 1 次提交
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由 Kenji Kaneshige 提交于
This patch fixes the bug that pci_claim_resource() is called multiple times for the same P2P bridge's resource structures if P2P bridges require their own PCI I/O resources. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 04 1月, 2006 1 次提交
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由 Alex Williamson 提交于
The function ia64_pci_legacy_write() returns 0 for everything except errors. This return value gets sent back to the user from pci_write_legacy_io(), making it look like every write fails. The trivial patch below copies the behavior of the SGI sn machvec and does what would be expected from something implementing a write() function. Signed-off-by: NAlex Williamson <alex.williamson@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 10 12月, 2005 2 次提交
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由 Bob Moore 提交于
Implemented support for the EM64T and other x86_64 processors. This essentially entails recognizing that these processors support non-aligned memory transfers. Previously, all 64-bit processors were assumed to lack hardware support for non-aligned transfers. Completed conversion of the Resource Manager to nearly full table-driven operation. Specifically, the resource conversion code (convert AML to internal format and the reverse) and the debug code to dump internal resource descriptors are fully table-driven, reducing code and data size and improving maintainability. The OSL interfaces for Acquire and Release Lock now use a 64-bit flag word on 64-bit processors instead of a fixed 32-bit word. (Alexey Starikovskiy) Implemented support within the resource conversion code for the Type-Specific byte within the various ACPI 3.0 *WordSpace macros. Fixed some issues within the resource conversion code for the type-specific flags for both Memory and I/O address resource descriptors. For Memory, implemented support for the MTP and TTP flags. For I/O, split the TRS and TTP flags into two separate fields. Signed-off-by: NBob Moore <robert.moore@intel.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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由 Bob Moore 提交于
Completed a major overhaul of the Resource Manager code - specifically, optimizations in the area of the AML/internal resource conversion code. The code has been optimized to simplify and eliminate duplicated code, CPU stack use has been decreased by optimizing function parameters and local variables, and naming conventions across the manager have been standardized for clarity and ease of maintenance (this includes function, parameter, variable, and struct/typedef names.) All Resource Manager dispatch and information tables have been moved to a single location for clarity and ease of maintenance. One new file was created, named "rsinfo.c". The ACPI return macros (return_ACPI_STATUS, etc.) have been modified to guarantee that the argument is not evaluated twice, making them less prone to macro side-effects. However, since there exists the possibility of additional stack use if a particular compiler cannot optimize them (such as in the debug generation case), the original macros are optionally available. Note that some invocations of the return_VALUE macro may now cause size mismatch warnings; the return_UINT8 and return_UINT32 macros are provided to eliminate these. (From Randy Dunlap) Implemented a new mechanism to enable debug tracing for individual control methods. A new external interface, acpi_debug_trace(), is provided to enable this mechanism. The intent is to allow the host OS to easily enable and disable tracing for problematic control methods. This interface can be easily exposed to a user or debugger interface if desired. See the file psxface.c for details. acpi_ut_callocate() will now return a valid pointer if a length of zero is specified - a length of one is used and a warning is issued. This matches the behavior of acpi_ut_allocate(). Signed-off-by: NBob Moore <robert.moore@intel.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 09 11月, 2005 1 次提交
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由 Bjorn Helgaas 提交于
ia64 translates normal loads and stores to special MMIO regions into I/O port accesses. Reserve these special MMIO regions in /proc/iomem. Sample /proc/iomem: f8100000000-f81003fffff : PCI Bus 0000:80 I/O Ports 00000000-00000fff f8100400000-f81007fffff : PCI Bus 0000:8e I/O Ports 00001000-00001fff f8100800000-f8100ffffff : PCI Bus 0000:9c I/O Ports 00002000-00003fff f8101000000-f81017fffff : PCI Bus 0000:aa I/O Ports 00004000-00005fff and corresponding /proc/ioports: 00000000-00000fff : PCI Bus 0000:80 00001000-00001fff : PCI Bus 0000:8e 00002000-00003fff : PCI Bus 0000:9c 00004000-00005fff : PCI Bus 0000:aa Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 24 9月, 2005 1 次提交
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由 Bjorn Helgaas 提交于
Address space resources for ACPI devices have a producer/consumer flag. All devices "consume" the indicated address space. If the resource is marked as a "producer", the range is also passed on to child devices. We currently ignore this flag when setting up MMIO and I/O port windows for PCI root bridges, so we could mistakenly interpret a "consumed-only" range, like CSR space for the device itself, as a window that is routed to children. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 20 9月, 2005 1 次提交
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由 Bjorn Helgaas 提交于
Move acpi_map_iosapics() from pci.c to acpi.c, since it doesn't have anything to do with PCI. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 08 9月, 2005 1 次提交
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由 Kenji Kaneshige 提交于
The config option 'CONFIG_ACPI_DEALLOCATE_IRQ' is no longer needed. This patch removes it. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 25 8月, 2005 2 次提交
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由 Kumar Gala 提交于
Removed IA64 architecture specific users of asm/segment.h The removal of asm-ia64/segment.h itself can wait until all of the kernel source has been purged of references. Signed-off-by: NKumar Gala <kumar.gala@freescale.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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由 Keith Owens 提交于
pcibios_bus_to_resource is exported on all architectures except ia64 and sparc. Add exports for the two missing architectures. Needed when Yenta socket support is compiled as a module. Signed-off-by: NKeith Owens <kaos@sgi.com> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 13 7月, 2005 1 次提交
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由 Christoph Lameter 提交于
pcibus_to_node provides a way for the Linux kernel to identify to which node a certain pcibus connects to. Allocations of control structures for devices can then be made on the node where the pci bus is located to allow local access during interrupt and other device manipulation. This patch provides a new "node" field in the the pci_controller structure. The node field will be set based on ACPI information (thanks to Alex Williamson <alex.williamson@hp.com for that piece). Signed-off-by: NChristoph Lameter <clameter@sgi.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 28 6月, 2005 4 次提交
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由 Rajesh Shah 提交于
Read bridge io/mem/pfmem ranges when fixing up the bus so that bus resources are tracked. This is required to properly support pci end device and bridge hotplug. Signed-off-by: NRajesh Shah <rajesh.shah@intel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Rajesh Shah 提交于
PCI scan code calls the arch specific pcibios_fixup_bus() each time it scans a new bridge. For root bridge hot-plug, the bridge and it's attached devices may not have been configured properly yet, so it's not safe to claim those resources at this time. This code goes away when we clean up the way pci resources are claimed (in pci_enable_device()), so this is only a stopgap fix. Signed-off-by: NRajesh Shah <rajesh.shah@intel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Rajesh Shah 提交于
When checking if a PCI to PCI bridge should be enabled to decode memory and/or IO resources, we need to look at all device resources not just the first 6. This is needed to allow PCI bridges to pass down memory and IO accesses to child devices even when the bridge itself does not consume resources in its PCI BARs. Signed-off-by: NRajesh Shah <rajesh.shah@intel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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由 Rajesh Shah 提交于
When you hot-plug a (root) bridge hierarchy, it may have p2p bridges and devices attached to it that have not been configured by firmware. In this case, we need to configure the devices before starting them. This patch separates device start from device scan so that we can introduce the configuration step in the middle. I kept the existing semantics for pci_scan_bus() since there are a huge number of callers to that function. Also, I have no way of testing the changes I made to the parisc files, so this needs review by those folks. Sorry for the massive cross-post, this touches files in many different places. Signed-off-by: NRajesh Shah <rajesh.shah@intel.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 22 6月, 2005 1 次提交
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由 Bjorn Helgaas 提交于
Remove "pci=routeirq" option for ia64. This was a workaround after ACPI IRQ routing was changed from "all at boot for everything in _PRT" to "do it when the device is enabled" in case there were drivers that didn't use pci_enable_device(). Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 17 4月, 2005 1 次提交
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由 Linus Torvalds 提交于
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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