提交 c3aa92af 编写于 作者: A Andrew Murray 提交者: Paul Mundt

sh: sh7712 clock support

This patch provides specific clock support for the SH7712.
Signed-off-by: NAndrew Murray <amurray@mpc-data.co.uk>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
上级 7d740a06
......@@ -22,5 +22,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o
clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o
obj-y += $(clock-y)
/*
* arch/sh/kernel/cpu/sh3/clock-sh7712.c
*
* SH7712 support for the clock framework
*
* Copyright (C) 2007 Andrew Murray <amurray@mpc-data.co.uk>
*
* Based on arch/sh/kernel/cpu/sh3/clock-sh3.c
* Copyright (C) 2005 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/clock.h>
#include <asm/freq.h>
#include <asm/io.h>
static int multipliers[] = { 1, 2, 3 };
static int divisors[] = { 1, 2, 3, 4, 6 };
static void master_clk_init(struct clk *clk)
{
int frqcr = ctrl_inw(FRQCR);
int idx = (frqcr & 0x0300) >> 8;
clk->rate *= multipliers[idx];
}
static struct clk_ops sh7712_master_clk_ops = {
.init = master_clk_init,
};
static void module_clk_recalc(struct clk *clk)
{
int frqcr = ctrl_inw(FRQCR);
int idx = frqcr & 0x0007;
clk->rate = clk->parent->rate / divisors[idx];
}
static struct clk_ops sh7712_module_clk_ops = {
.recalc = module_clk_recalc,
};
static void cpu_clk_recalc(struct clk *clk)
{
int frqcr = ctrl_inw(FRQCR);
int idx = (frqcr & 0x0030) >> 4;
clk->rate = clk->parent->rate / divisors[idx];
}
static struct clk_ops sh7712_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7712_clk_ops[] = {
&sh7712_master_clk_ops,
&sh7712_module_clk_ops,
&sh7712_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7712_clk_ops))
*ops = sh7712_clk_ops[idx];
}
......@@ -10,7 +10,12 @@
#ifndef __ASM_CPU_SH3_FREQ_H
#define __ASM_CPU_SH3_FREQ_H
#ifdef CONFIG_CPU_SUBTYPE_SH7712
#define FRQCR 0xA415FF80
#else
#define FRQCR 0xffffff80
#endif
#define MIN_DIVISOR_NR 0
#define MAX_DIVISOR_NR 4
......
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