[MIPS] Fix vectored interrupt support in TLB exception handler generator.

Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

arch/mips/mm/tlbex.c

@@ -742,7 +742,7 @@ static void __init build_r3000_tlb_refill_handler(void)
 	}
 #endif
 
-	memcpy((void *)CAC_BASE, tlb_handler, 0x80);
+	memcpy((void *)ebase, tlb_handler, 0x80);
 }
 
 /*
@@ -1247,7 +1247,7 @@ static void __init build_r4000_tlb_refill_handler(void)
 	}
 #endif
 
-	memcpy((void *)CAC_BASE, final_handler, 0x100);
+	memcpy((void *)ebase, final_handler, 0x100);
 }
 
 /*

include/asm-mips/system.h

@@ -441,6 +441,7 @@ extern void set_handler (unsigned long offset, void *addr, unsigned long len);
 extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len);
 extern void *set_vi_handler (int n, void *addr);
 extern void *set_except_vector(int n, void *addr);
+extern unsigned long ebase;
 extern void per_cpu_trap_init(void);
 
 extern NORET_TYPE void die(const char *, struct pt_regs *);