提交 81df84f4 编写于 作者: P Paul Mundt

sh: pci: Give SH7786 PHY some time to settle.

The spec suggests waiting up to 500ms for the PHY to settle before
testing link state, but practice shows that 100ms is sufficient (this is
the delay value we also use on the other SH-4A PCI controllers, too).
This makes device detection much more reliable, although in the future it
should be a bit faster to simply serialize with a TLP IRQ.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
上级 bdf74990
......@@ -312,6 +312,9 @@ static int pcie_init(struct sh7786_pcie_port *port)
data |= 0x1;
pci_write_reg(chan, data, SH4A_PCIETCTLR);
/* Let things settle down a bit.. */
mdelay(100);
/* Enable DL_Active Interrupt generation */
data = pci_read_reg(chan, SH4A_PCIEDLINTENR);
data |= PCIEDLINTENR_DLL_ACT_ENABLE;
......
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