提交 657445fe 编写于 作者: D Daniel Vetter

Revert "drm/i915: revert eDP bpp clamping code changes"

This reverts commit 57c21963.

It's an ugly hack for a Haswell SDV platform where the vbt doesn't
seem to fully agree with the panel. Since it seems to cause issues on
real eDP platform let's just kill this hack again.
Reported-and-tested-by: NJosh Boyer <jwboyer@gmail.com>
References: https://lkml.org/lkml/2013/5/3/467
Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 a9b054e8
...@@ -702,6 +702,9 @@ intel_dp_compute_config(struct intel_encoder *encoder, ...@@ -702,6 +702,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
/* Walk through all bpp values. Luckily they're all nicely spaced with 2 /* Walk through all bpp values. Luckily they're all nicely spaced with 2
* bpc in between. */ * bpc in between. */
bpp = min_t(int, 8*3, pipe_config->pipe_bpp); bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
if (is_edp(intel_dp) && dev_priv->edp.bpp)
bpp = min_t(int, bpp, dev_priv->edp.bpp);
for (; bpp >= 6*3; bpp -= 2*3) { for (; bpp >= 6*3; bpp -= 2*3) {
mode_rate = intel_dp_link_required(target_clock, bpp); mode_rate = intel_dp_link_required(target_clock, bpp);
...@@ -739,6 +742,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, ...@@ -739,6 +742,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_dp->link_bw = bws[clock]; intel_dp->link_bw = bws[clock];
intel_dp->lane_count = lane_count; intel_dp->lane_count = lane_count;
adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw); adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
pipe_config->pipe_bpp = bpp;
pipe_config->pixel_target_clock = target_clock; pipe_config->pixel_target_clock = target_clock;
DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n", DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",
...@@ -751,20 +755,6 @@ intel_dp_compute_config(struct intel_encoder *encoder, ...@@ -751,20 +755,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
target_clock, adjusted_mode->clock, target_clock, adjusted_mode->clock,
&pipe_config->dp_m_n); &pipe_config->dp_m_n);
/*
* XXX: We have a strange regression where using the vbt edp bpp value
* for the link bw computation results in black screens, the panel only
* works when we do the computation at the usual 24bpp (but still
* requires us to use 18bpp). Until that's fully debugged, stay
* bug-for-bug compatible with the old code.
*/
if (is_edp(intel_dp) && dev_priv->edp.bpp) {
DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n",
bpp, dev_priv->edp.bpp);
bpp = min_t(int, bpp, dev_priv->edp.bpp);
}
pipe_config->pipe_bpp = bpp;
return true; return true;
} }
......
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