提交 1dcf98ff 编写于 作者: M Mark Brown

ASoC: Add WM8523 CODEC driver

The WM8523 is a high performance stereo DAC with integral charge
pump providing 2Vrms line driver outputs using a single 3.3V power
supply rail.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
上级 416356fc
......@@ -30,6 +30,7 @@ config SND_SOC_ALL_CODECS
select SND_SOC_WM8350 if MFD_WM8350
select SND_SOC_WM8400 if MFD_WM8400
select SND_SOC_WM8510 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8523 if I2C
select SND_SOC_WM8580 if I2C
select SND_SOC_WM8728 if SND_SOC_I2C_AND_SPI
select SND_SOC_WM8731 if SND_SOC_I2C_AND_SPI
......@@ -130,6 +131,9 @@ config SND_SOC_WM8400
config SND_SOC_WM8510
tristate
config SND_SOC_WM8523
tristate
config SND_SOC_WM8580
tristate
......
......@@ -18,6 +18,7 @@ snd-soc-uda1380-objs := uda1380.o
snd-soc-wm8350-objs := wm8350.o
snd-soc-wm8400-objs := wm8400.o
snd-soc-wm8510-objs := wm8510.o
snd-soc-wm8523-objs := wm8523.o
snd-soc-wm8580-objs := wm8580.o
snd-soc-wm8728-objs := wm8728.o
snd-soc-wm8731-objs := wm8731.o
......@@ -56,6 +57,7 @@ obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o
obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o
obj-$(CONFIG_SND_SOC_WM8400) += snd-soc-wm8400.o
obj-$(CONFIG_SND_SOC_WM8510) += snd-soc-wm8510.o
obj-$(CONFIG_SND_SOC_WM8523) += snd-soc-wm8523.o
obj-$(CONFIG_SND_SOC_WM8580) += snd-soc-wm8580.o
obj-$(CONFIG_SND_SOC_WM8728) += snd-soc-wm8728.o
obj-$(CONFIG_SND_SOC_WM8731) += snd-soc-wm8731.o
......
/*
* wm8523.c -- WM8523 ALSA SoC Audio driver
*
* Copyright 2009 Wolfson Microelectronics plc
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include "wm8523.h"
static struct snd_soc_codec *wm8523_codec;
struct snd_soc_codec_device soc_codec_dev_wm8523;
#define WM8523_NUM_SUPPLIES 2
static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
"AVDD",
"LINEVDD",
};
#define WM8523_NUM_RATES 7
/* codec private data */
struct wm8523_priv {
struct snd_soc_codec codec;
u16 reg_cache[WM8523_REGISTER_COUNT];
struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
unsigned int sysclk;
unsigned int rate_constraint_list[WM8523_NUM_RATES];
struct snd_pcm_hw_constraint_list rate_constraint;
};
static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
0x8523, /* R0 - DEVICE_ID */
0x0001, /* R1 - REVISION */
0x0000, /* R2 - PSCTRL1 */
0x1812, /* R3 - AIF_CTRL1 */
0x0000, /* R4 - AIF_CTRL2 */
0x0001, /* R5 - DAC_CTRL3 */
0x0190, /* R6 - DAC_GAINL */
0x0190, /* R7 - DAC_GAINR */
0x0000, /* R8 - ZERO_DETECT */
};
static int wm8523_volatile(unsigned int reg)
{
switch (reg) {
case WM8523_DEVICE_ID:
case WM8523_REVISION:
return 1;
default:
return 0;
}
}
static int wm8523_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
struct wm8523_priv *wm8523 = codec->private_data;
u8 data[3];
BUG_ON(reg > WM8523_MAX_REGISTER);
data[0] = reg;
data[1] = (value >> 8) & 0x00ff;
data[2] = value & 0x00ff;
if (!wm8523_volatile(reg))
wm8523->reg_cache[reg] = value;
if (codec->hw_write(codec->control_data, data, 3) == 3)
return 0;
else
return -EIO;
}
static int wm8523_reset(struct snd_soc_codec *codec)
{
return wm8523_write(codec, WM8523_DEVICE_ID, 0);
}
static unsigned int wm8523_read_hw(struct snd_soc_codec *codec, u8 reg)
{
struct i2c_msg xfer[2];
u16 data;
int ret;
struct i2c_client *i2c = codec->control_data;
/* Write register */
xfer[0].addr = i2c->addr;
xfer[0].flags = 0;
xfer[0].len = 1;
xfer[0].buf = &reg;
/* Read data */
xfer[1].addr = i2c->addr;
xfer[1].flags = I2C_M_RD;
xfer[1].len = 2;
xfer[1].buf = (u8 *)&data;
ret = i2c_transfer(i2c->adapter, xfer, 2);
if (ret != 2) {
dev_err(codec->dev, "Failed to read 0x%x: %d\n", reg, ret);
return 0;
}
return (data >> 8) | ((data & 0xff) << 8);
}
static unsigned int wm8523_read(struct snd_soc_codec *codec,
unsigned int reg)
{
u16 *reg_cache = codec->reg_cache;
BUG_ON(reg > WM8523_MAX_REGISTER);
if (wm8523_volatile(reg))
return wm8523_read_hw(codec, reg);
else
return reg_cache[reg];
}
static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
static const char *wm8523_zd_count_text[] = {
"1024",
"2048",
};
static const struct soc_enum wm8523_zc_count =
SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
static const struct snd_kcontrol_new wm8523_snd_controls[] = {
SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
0, 448, 0, dac_tlv),
SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
SOC_ENUM("Zero Detect Count", wm8523_zc_count),
};
static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
};
static const struct snd_soc_dapm_route intercon[] = {
{ "LINEVOUTL", NULL, "DAC" },
{ "LINEVOUTR", NULL, "DAC" },
};
static int wm8523_add_widgets(struct snd_soc_codec *codec)
{
snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
ARRAY_SIZE(wm8523_dapm_widgets));
snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
snd_soc_dapm_new_widgets(codec);
return 0;
}
static struct {
int value;
int ratio;
} lrclk_ratios[WM8523_NUM_RATES] = {
{ 1, 128 },
{ 2, 192 },
{ 3, 256 },
{ 4, 384 },
{ 5, 512 },
{ 6, 768 },
{ 7, 1152 },
};
static int wm8523_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct wm8523_priv *wm8523 = codec->private_data;
/* The set of sample rates that can be supported depends on the
* MCLK supplied to the CODEC - enforce this.
*/
if (!wm8523->sysclk) {
dev_err(codec->dev,
"No MCLK configured, call set_sysclk() on init\n");
return -EINVAL;
}
return 0;
snd_pcm_hw_constraint_list(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_RATE,
&wm8523->rate_constraint);
return 0;
}
static int wm8523_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_device *socdev = rtd->socdev;
struct snd_soc_codec *codec = socdev->card->codec;
struct wm8523_priv *wm8523 = codec->private_data;
int i;
u16 aifctrl1 = wm8523_read(codec, WM8523_AIF_CTRL1);
u16 aifctrl2 = wm8523_read(codec, WM8523_AIF_CTRL2);
/* Find a supported LRCLK ratio */
for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
if (wm8523->sysclk / params_rate(params) ==
lrclk_ratios[i].ratio)
break;
}
/* Should never happen, should be handled by constraints */
if (i == ARRAY_SIZE(lrclk_ratios)) {
dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
wm8523->sysclk / params_rate(params));
return -EINVAL;
}
aifctrl2 &= ~WM8523_SR_MASK;
aifctrl2 |= lrclk_ratios[i].value;
aifctrl1 &= ~WM8523_WL_MASK;
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
break;
case SNDRV_PCM_FORMAT_S20_3LE:
aifctrl1 |= 0x8;
break;
case SNDRV_PCM_FORMAT_S24_LE:
aifctrl1 |= 0x10;
break;
case SNDRV_PCM_FORMAT_S32_LE:
aifctrl1 |= 0x18;
break;
}
wm8523_write(codec, WM8523_AIF_CTRL1, aifctrl1);
wm8523_write(codec, WM8523_AIF_CTRL2, aifctrl2);
return 0;
}
static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8523_priv *wm8523 = codec->private_data;
unsigned int val;
int i;
wm8523->sysclk = freq;
wm8523->rate_constraint.count = 0;
for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
val = freq / lrclk_ratios[i].ratio;
/* Check that it's a standard rate since core can't
* cope with others and having the odd rates confuses
* constraint matching.
*/
switch (val) {
case 8000:
case 11025:
case 16000:
case 22050:
case 32000:
case 44100:
case 48000:
case 64000:
case 88200:
case 96000:
case 176400:
case 192000:
dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
val);
wm8523->rate_constraint_list[i] = val;
wm8523->rate_constraint.count++;
break;
default:
dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
val);
}
}
/* Need at least one supported rate... */
if (wm8523->rate_constraint.count == 0)
return -EINVAL;
return 0;
}
static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
u16 aifctrl1 = wm8523_read(codec, WM8523_AIF_CTRL1);
aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
aifctrl1 |= WM8523_AIF_MSTR;
break;
case SND_SOC_DAIFMT_CBS_CFS:
break;
default:
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_I2S:
aifctrl1 |= 0x0002;
break;
case SND_SOC_DAIFMT_RIGHT_J:
break;
case SND_SOC_DAIFMT_LEFT_J:
aifctrl1 |= 0x0001;
break;
case SND_SOC_DAIFMT_DSP_A:
aifctrl1 |= 0x0003;
break;
case SND_SOC_DAIFMT_DSP_B:
aifctrl1 |= 0x0023;
break;
default:
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_IB_IF:
aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
break;
case SND_SOC_DAIFMT_IB_NF:
aifctrl1 |= WM8523_BCLK_INV;
break;
case SND_SOC_DAIFMT_NB_IF:
aifctrl1 |= WM8523_LRCLK_INV;
break;
default:
return -EINVAL;
}
wm8523_write(codec, WM8523_AIF_CTRL1, aifctrl1);
return 0;
}
static int wm8523_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
struct wm8523_priv *wm8523 = codec->private_data;
int ret, i;
switch (level) {
case SND_SOC_BIAS_ON:
break;
case SND_SOC_BIAS_PREPARE:
/* Full power on */
snd_soc_update_bits(codec, WM8523_PSCTRL1,
WM8523_SYS_ENA_MASK, 3);
break;
case SND_SOC_BIAS_STANDBY:
if (codec->bias_level == SND_SOC_BIAS_OFF) {
ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
wm8523->supplies);
if (ret != 0) {
dev_err(codec->dev,
"Failed to enable supplies: %d\n",
ret);
return ret;
}
/* Initial power up */
snd_soc_update_bits(codec, WM8523_PSCTRL1,
WM8523_SYS_ENA_MASK, 1);
/* Sync back default/cached values */
for (i = WM8523_AIF_CTRL1;
i < WM8523_MAX_REGISTER; i++)
wm8523_write(codec, i, wm8523->reg_cache[i]);
msleep(100);
}
/* Power up to mute */
snd_soc_update_bits(codec, WM8523_PSCTRL1,
WM8523_SYS_ENA_MASK, 2);
break;
case SND_SOC_BIAS_OFF:
/* The chip runs through the power down sequence for us. */
snd_soc_update_bits(codec, WM8523_PSCTRL1,
WM8523_SYS_ENA_MASK, 0);
msleep(100);
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
wm8523->supplies);
break;
}
codec->bias_level = level;
return 0;
}
#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
static struct snd_soc_dai_ops wm8523_dai_ops = {
.startup = wm8523_startup,
.hw_params = wm8523_hw_params,
.set_sysclk = wm8523_set_dai_sysclk,
.set_fmt = wm8523_set_dai_fmt,
};
struct snd_soc_dai wm8523_dai = {
.name = "WM8523",
.playback = {
.stream_name = "Playback",
.channels_min = 2, /* Mono modes not yet supported */
.channels_max = 2,
.rates = WM8523_RATES,
.formats = WM8523_FORMATS,
},
.ops = &wm8523_dai_ops,
};
EXPORT_SYMBOL_GPL(wm8523_dai);
#ifdef CONFIG_PM
static int wm8523_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev->card->codec;
wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
return 0;
}
static int wm8523_resume(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev->card->codec;
wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
return 0;
}
#else
#define wm8523_suspend NULL
#define wm8523_resume NULL
#endif
static int wm8523_probe(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec;
int ret = 0;
if (wm8523_codec == NULL) {
dev_err(&pdev->dev, "Codec device not registered\n");
return -ENODEV;
}
socdev->card->codec = wm8523_codec;
codec = wm8523_codec;
/* register pcms */
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
if (ret < 0) {
dev_err(codec->dev, "failed to create pcms: %d\n", ret);
goto pcm_err;
}
snd_soc_add_controls(codec, wm8523_snd_controls,
ARRAY_SIZE(wm8523_snd_controls));
wm8523_add_widgets(codec);
ret = snd_soc_init_card(socdev);
if (ret < 0) {
dev_err(codec->dev, "failed to register card: %d\n", ret);
goto card_err;
}
return ret;
card_err:
snd_soc_free_pcms(socdev);
snd_soc_dapm_free(socdev);
pcm_err:
return ret;
}
static int wm8523_remove(struct platform_device *pdev)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
snd_soc_free_pcms(socdev);
snd_soc_dapm_free(socdev);
return 0;
}
struct snd_soc_codec_device soc_codec_dev_wm8523 = {
.probe = wm8523_probe,
.remove = wm8523_remove,
.suspend = wm8523_suspend,
.resume = wm8523_resume,
};
EXPORT_SYMBOL_GPL(soc_codec_dev_wm8523);
static int wm8523_register(struct wm8523_priv *wm8523)
{
int ret;
struct snd_soc_codec *codec = &wm8523->codec;
int i;
if (wm8523_codec) {
dev_err(codec->dev, "Another WM8523 is registered\n");
return -EINVAL;
}
mutex_init(&codec->mutex);
INIT_LIST_HEAD(&codec->dapm_widgets);
INIT_LIST_HEAD(&codec->dapm_paths);
codec->private_data = wm8523;
codec->name = "WM8523";
codec->owner = THIS_MODULE;
codec->read = wm8523_read;
codec->write = wm8523_write;
codec->bias_level = SND_SOC_BIAS_OFF;
codec->set_bias_level = wm8523_set_bias_level;
codec->dai = &wm8523_dai;
codec->num_dai = 1;
codec->reg_cache_size = WM8523_REGISTER_COUNT;
codec->reg_cache = &wm8523->reg_cache;
wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
wm8523->rate_constraint.count =
ARRAY_SIZE(wm8523->rate_constraint_list);
memcpy(codec->reg_cache, wm8523_reg, sizeof(wm8523_reg));
for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
wm8523->supplies[i].supply = wm8523_supply_names[i];
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
wm8523->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
goto err;
}
ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
wm8523->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
goto err_get;
}
ret = wm8523_read(codec, WM8523_DEVICE_ID);
if (ret < 0) {
dev_err(codec->dev, "Failed to read ID register\n");
goto err_enable;
}
if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
ret = -EINVAL;
goto err_enable;
}
ret = wm8523_read(codec, WM8523_REVISION);
if (ret < 0) {
dev_err(codec->dev, "Failed to read revision register\n");
goto err_enable;
}
dev_info(codec->dev, "revision %c\n",
(ret & WM8523_CHIP_REV_MASK) + 'A');
ret = wm8523_reset(codec);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset\n");
goto err_enable;
}
wm8523_dai.dev = codec->dev;
/* Change some default settings - latch VU and enable ZC */
wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
/* Bias level configuration will have done an extra enable */
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
wm8523_codec = codec;
ret = snd_soc_register_codec(codec);
if (ret != 0) {
dev_err(codec->dev, "Failed to register codec: %d\n", ret);
return ret;
}
ret = snd_soc_register_dai(&wm8523_dai);
if (ret != 0) {
dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
snd_soc_unregister_codec(codec);
return ret;
}
return 0;
err_enable:
regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err_get:
regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
err:
kfree(wm8523);
return ret;
}
static void wm8523_unregister(struct wm8523_priv *wm8523)
{
wm8523_set_bias_level(&wm8523->codec, SND_SOC_BIAS_OFF);
regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
snd_soc_unregister_dai(&wm8523_dai);
snd_soc_unregister_codec(&wm8523->codec);
kfree(wm8523);
wm8523_codec = NULL;
}
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
const struct i2c_device_id *id)
{
struct wm8523_priv *wm8523;
struct snd_soc_codec *codec;
wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
if (wm8523 == NULL)
return -ENOMEM;
codec = &wm8523->codec;
codec->hw_write = (hw_write_t)i2c_master_send;
i2c_set_clientdata(i2c, wm8523);
codec->control_data = i2c;
codec->dev = &i2c->dev;
return wm8523_register(wm8523);
}
static __devexit int wm8523_i2c_remove(struct i2c_client *client)
{
struct wm8523_priv *wm8523 = i2c_get_clientdata(client);
wm8523_unregister(wm8523);
return 0;
}
#ifdef CONFIG_PM
static int wm8523_i2c_suspend(struct i2c_client *i2c, pm_message_t msg)
{
return snd_soc_suspend_device(&i2c->dev);
}
static int wm8523_i2c_resume(struct i2c_client *i2c)
{
return snd_soc_resume_device(&i2c->dev);
}
#else
#define wm8523_i2c_suspend NULL
#define wm8523_i2c_resume NULL
#endif
static const struct i2c_device_id wm8523_i2c_id[] = {
{ "wm8523", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
static struct i2c_driver wm8523_i2c_driver = {
.driver = {
.name = "WM8523",
.owner = THIS_MODULE,
},
.probe = wm8523_i2c_probe,
.remove = __devexit_p(wm8523_i2c_remove),
.suspend = wm8523_i2c_suspend,
.resume = wm8523_i2c_resume,
.id_table = wm8523_i2c_id,
};
#endif
static int __init wm8523_modinit(void)
{
int ret;
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
ret = i2c_add_driver(&wm8523_i2c_driver);
if (ret != 0) {
printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
ret);
}
#endif
return 0;
}
module_init(wm8523_modinit);
static void __exit wm8523_exit(void)
{
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
i2c_del_driver(&wm8523_i2c_driver);
#endif
}
module_exit(wm8523_exit);
MODULE_DESCRIPTION("ASoC WM8523 driver");
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
MODULE_LICENSE("GPL");
/*
* wm8523.h -- WM8423 ASoC driver
*
* Copyright 2009 Wolfson Microelectronics, plc
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* Based on wm8753.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _WM8523_H
#define _WM8523_H
/*
* Register values.
*/
#define WM8523_DEVICE_ID 0x00
#define WM8523_REVISION 0x01
#define WM8523_PSCTRL1 0x02
#define WM8523_AIF_CTRL1 0x03
#define WM8523_AIF_CTRL2 0x04
#define WM8523_DAC_CTRL3 0x05
#define WM8523_DAC_GAINL 0x06
#define WM8523_DAC_GAINR 0x07
#define WM8523_ZERO_DETECT 0x08
#define WM8523_REGISTER_COUNT 9
#define WM8523_MAX_REGISTER 0x08
/*
* Field Definitions.
*/
/*
* R0 (0x00) - DEVICE_ID
*/
#define WM8523_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */
#define WM8523_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */
#define WM8523_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */
/*
* R1 (0x01) - REVISION
*/
#define WM8523_CHIP_REV_MASK 0x0007 /* CHIP_REV - [2:0] */
#define WM8523_CHIP_REV_SHIFT 0 /* CHIP_REV - [2:0] */
#define WM8523_CHIP_REV_WIDTH 3 /* CHIP_REV - [2:0] */
/*
* R2 (0x02) - PSCTRL1
*/
#define WM8523_SYS_ENA_MASK 0x0003 /* SYS_ENA - [1:0] */
#define WM8523_SYS_ENA_SHIFT 0 /* SYS_ENA - [1:0] */
#define WM8523_SYS_ENA_WIDTH 2 /* SYS_ENA - [1:0] */
/*
* R3 (0x03) - AIF_CTRL1
*/
#define WM8523_TDM_MODE_MASK 0x1800 /* TDM_MODE - [12:11] */
#define WM8523_TDM_MODE_SHIFT 11 /* TDM_MODE - [12:11] */
#define WM8523_TDM_MODE_WIDTH 2 /* TDM_MODE - [12:11] */
#define WM8523_TDM_SLOT_MASK 0x0600 /* TDM_SLOT - [10:9] */
#define WM8523_TDM_SLOT_SHIFT 9 /* TDM_SLOT - [10:9] */
#define WM8523_TDM_SLOT_WIDTH 2 /* TDM_SLOT - [10:9] */
#define WM8523_DEEMPH 0x0100 /* DEEMPH */
#define WM8523_DEEMPH_MASK 0x0100 /* DEEMPH */
#define WM8523_DEEMPH_SHIFT 8 /* DEEMPH */
#define WM8523_DEEMPH_WIDTH 1 /* DEEMPH */
#define WM8523_AIF_MSTR 0x0080 /* AIF_MSTR */
#define WM8523_AIF_MSTR_MASK 0x0080 /* AIF_MSTR */
#define WM8523_AIF_MSTR_SHIFT 7 /* AIF_MSTR */
#define WM8523_AIF_MSTR_WIDTH 1 /* AIF_MSTR */
#define WM8523_LRCLK_INV 0x0040 /* LRCLK_INV */
#define WM8523_LRCLK_INV_MASK 0x0040 /* LRCLK_INV */
#define WM8523_LRCLK_INV_SHIFT 6 /* LRCLK_INV */
#define WM8523_LRCLK_INV_WIDTH 1 /* LRCLK_INV */
#define WM8523_BCLK_INV 0x0020 /* BCLK_INV */
#define WM8523_BCLK_INV_MASK 0x0020 /* BCLK_INV */
#define WM8523_BCLK_INV_SHIFT 5 /* BCLK_INV */
#define WM8523_BCLK_INV_WIDTH 1 /* BCLK_INV */
#define WM8523_WL_MASK 0x0018 /* WL - [4:3] */
#define WM8523_WL_SHIFT 3 /* WL - [4:3] */
#define WM8523_WL_WIDTH 2 /* WL - [4:3] */
#define WM8523_FMT_MASK 0x0007 /* FMT - [2:0] */
#define WM8523_FMT_SHIFT 0 /* FMT - [2:0] */
#define WM8523_FMT_WIDTH 3 /* FMT - [2:0] */
/*
* R4 (0x04) - AIF_CTRL2
*/
#define WM8523_DAC_OP_MUX_MASK 0x00C0 /* DAC_OP_MUX - [7:6] */
#define WM8523_DAC_OP_MUX_SHIFT 6 /* DAC_OP_MUX - [7:6] */
#define WM8523_DAC_OP_MUX_WIDTH 2 /* DAC_OP_MUX - [7:6] */
#define WM8523_BCLKDIV_MASK 0x0038 /* BCLKDIV - [5:3] */
#define WM8523_BCLKDIV_SHIFT 3 /* BCLKDIV - [5:3] */
#define WM8523_BCLKDIV_WIDTH 3 /* BCLKDIV - [5:3] */
#define WM8523_SR_MASK 0x0007 /* SR - [2:0] */
#define WM8523_SR_SHIFT 0 /* SR - [2:0] */
#define WM8523_SR_WIDTH 3 /* SR - [2:0] */
/*
* R5 (0x05) - DAC_CTRL3
*/
#define WM8523_ZC 0x0010 /* ZC */
#define WM8523_ZC_MASK 0x0010 /* ZC */
#define WM8523_ZC_SHIFT 4 /* ZC */
#define WM8523_ZC_WIDTH 1 /* ZC */
#define WM8523_DACR 0x0008 /* DACR */
#define WM8523_DACR_MASK 0x0008 /* DACR */
#define WM8523_DACR_SHIFT 3 /* DACR */
#define WM8523_DACR_WIDTH 1 /* DACR */
#define WM8523_DACL 0x0004 /* DACL */
#define WM8523_DACL_MASK 0x0004 /* DACL */
#define WM8523_DACL_SHIFT 2 /* DACL */
#define WM8523_DACL_WIDTH 1 /* DACL */
#define WM8523_VOL_UP_RAMP 0x0002 /* VOL_UP_RAMP */
#define WM8523_VOL_UP_RAMP_MASK 0x0002 /* VOL_UP_RAMP */
#define WM8523_VOL_UP_RAMP_SHIFT 1 /* VOL_UP_RAMP */
#define WM8523_VOL_UP_RAMP_WIDTH 1 /* VOL_UP_RAMP */
#define WM8523_VOL_DOWN_RAMP 0x0001 /* VOL_DOWN_RAMP */
#define WM8523_VOL_DOWN_RAMP_MASK 0x0001 /* VOL_DOWN_RAMP */
#define WM8523_VOL_DOWN_RAMP_SHIFT 0 /* VOL_DOWN_RAMP */
#define WM8523_VOL_DOWN_RAMP_WIDTH 1 /* VOL_DOWN_RAMP */
/*
* R6 (0x06) - DAC_GAINL
*/
#define WM8523_DACL_VU 0x0200 /* DACL_VU */
#define WM8523_DACL_VU_MASK 0x0200 /* DACL_VU */
#define WM8523_DACL_VU_SHIFT 9 /* DACL_VU */
#define WM8523_DACL_VU_WIDTH 1 /* DACL_VU */
#define WM8523_DACL_VOL_MASK 0x01FF /* DACL_VOL - [8:0] */
#define WM8523_DACL_VOL_SHIFT 0 /* DACL_VOL - [8:0] */
#define WM8523_DACL_VOL_WIDTH 9 /* DACL_VOL - [8:0] */
/*
* R7 (0x07) - DAC_GAINR
*/
#define WM8523_DACR_VU 0x0200 /* DACR_VU */
#define WM8523_DACR_VU_MASK 0x0200 /* DACR_VU */
#define WM8523_DACR_VU_SHIFT 9 /* DACR_VU */
#define WM8523_DACR_VU_WIDTH 1 /* DACR_VU */
#define WM8523_DACR_VOL_MASK 0x01FF /* DACR_VOL - [8:0] */
#define WM8523_DACR_VOL_SHIFT 0 /* DACR_VOL - [8:0] */
#define WM8523_DACR_VOL_WIDTH 9 /* DACR_VOL - [8:0] */
/*
* R8 (0x08) - ZERO_DETECT
*/
#define WM8523_ZD_COUNT_MASK 0x0003 /* ZD_COUNT - [1:0] */
#define WM8523_ZD_COUNT_SHIFT 0 /* ZD_COUNT - [1:0] */
#define WM8523_ZD_COUNT_WIDTH 2 /* ZD_COUNT - [1:0] */
extern struct snd_soc_dai wm8523_dai;
extern struct snd_soc_codec_device soc_codec_dev_wm8523;
#endif
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