Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform
specific implementation of the dw_mmc driver.

Also add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.

Finally, fix an indentation error for the sysmgr node.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Acked-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Tested-by: NSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: NChris Ball <chris@printf.net>