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    perf, x86: Implement simple LBR support · caff2bef
    Peter Zijlstra 提交于
    Implement simple suport Intel Last-Branch-Record, it supports all
    hardware that implements FREEZE_LBRS_ON_PMI, but does not (yet) implement
    the LBR config register.
    
    The Intel LBR is a FIFO of From,To addresses describing the last few
    branches the hardware took.
    
    This patch does not add perf interface to the LBR, but merely provides an
    interface for internal use.
    Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
    Cc: paulus@samba.org
    Cc: eranian@google.com
    Cc: robert.richter@amd.com
    Cc: fweisbec@gmail.com
    LKML-Reference: <20100304140100.544191154@chello.nl>
    Signed-off-by: NIngo Molnar <mingo@elte.hu>
    caff2bef
perf_event_intel_lbr.c 4.7 KB