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    i2c: Blackfin TWI: fix transfer errors with repeat start · 94327d00
    Frank Shew 提交于
    We have a custom BF537 board with an I2C RTC (MAX DS3231) running
    uclinux 2007R1 for some time. Recently during migration to 2008R1.5-RC3
    we losted access to the RTC. The RTC driver calls 'i2c_transfer()' which
    in turns calls 'bfin_twi_master_xfer()' in i2c-bfin-twi.c.
    
    Compared with 2007R1, it looks like the 2008R1.5 version of i2c-bin-twi.c
    has a new mode 'TWI_I2C-MODE_REPEAT' which corresponds to the Repeat Start
    Condition described in the HRM. However, according to the HRM, at XMIT or
    RECV interrupt and when the data count is 0, not only is the RESTART bit
    supposed to be set, but MDIR must also be set if the next operation is a
    receive sequence, and cleared if not. Currently there is no code that looks
    at the I2C_M_RD bit in the flag from the next cur_msg and set/clear the MDIR
    flag accordingly at the same time that the RSTART bit is set. Instead, MDIR
    is set or cleared (by OR'ing with 0?) after the RESTART bit has been cleared
    during handling of MCOMP interrupt.
    
    It appears that this is causing our failure with reading the RTC, as a
    quick patch to set/clear MDIR when RESTART is set seem to solve our problem.
    Signed-off-by: NFrank Shew <fshew@geometrics.com>
    Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
    Signed-off-by: NMike Frysinger <vapier@gentoo.org>
    Signed-off-by: NBryan Wu <cooloney@kernel.org>
    [ben-linux@fluff.org: shorted subject]
    Signed-off-by: NBen Dooks <ben-linux@fluff.org>
    94327d00
i2c-bfin-twi.c 19.0 KB