• K
    drm/i915: Treat pre-gen4 backlight duty cycle value consistently · ca88479c
    Keith Packard 提交于
    For i945 and earlier chips, the backlight frequency value had the low
    bit (of 16) fixed to zero. The Pineview code path handled this by just
    exposing the backlight range as 15 bits while other chips had the
    backlight range limited to 0 .. 0xfffe.
    
    This patch makes everyone take the pineview code path, providing 15
    bits of backlight duty cycle range which seems more than sufficient to
    me.
    
    Daniel Mack reported that writing 1 to bit 0 of the duty cycle
    register was causing problems on his Samsung X20 notebook, even when
    the duty cycle value was less than the maximum backlight value. (He
    tried a value of 29749 with max_brightness of 29750). This patch never
    writes a '1' to that bit.
    Signed-off-by: NKeith Packard <keithp@keithp.com>
    Reviewed-by: NTakashi Iwai <tiwai@suse.de>
    Reported-and-tested-by: NDaniel Mack <zonque@gmail.com>
    Cc: stable@kernel.org
    ca88479c
intel_panel.c 10.3 KB