Marvell's new SoC (65 nano) needs different settings for its SATA
PHY registers.
Tested-by: NMartin Michlmayr <tbm@cyrius.com>
Signed-off-by: NSaeed Bishara <saeed@marvell.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>