提交 e272d042 编写于 作者: W Wayne Lin

[nuvoton] Sync to 4.1.0.

1. Remove dfs_posix.h including for syncing 4.1.0.
2. Fix issue in crypto driver.
3. Add LVGLv81 supporting in NuMaker-M2354 BSP.
4. Update USB board menu in M480 BSP.
上级 c95c296e
......@@ -44,8 +44,10 @@ static rt_uint32_t nu_crc_run(
{
uint32_t u32CalChecksum = 0;
uint32_t i = 0;
rt_err_t result;
rt_mutex_take(&s_CRC_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_CRC_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
/* Configure CRC controller */
CRC_Open(u32OpMode, u32Attr, u32Seed, CRC_CPU_WDATA_8);
......@@ -85,7 +87,9 @@ static rt_uint32_t nu_crc_run(
/* Get checksum value */
u32CalChecksum = CRC_GetChecksum();
rt_mutex_release(&s_CRC_mutex);
result = rt_mutex_release(&s_CRC_mutex);
RT_ASSERT(result == RT_EOK);
return u32CalChecksum;
}
......@@ -93,9 +97,7 @@ static rt_uint32_t nu_crc_run(
rt_err_t nu_crc_init(void)
{
SYS_ResetModule(CRC_RST);
rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_PRIO);
return RT_EOK;
return rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_PRIO);
}
rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
......
......@@ -37,7 +37,6 @@ typedef struct
uint32_t u32BlockSize;
} S_SHA_CONTEXT;
/* Private functions ------------------------------------------------------------*/
static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx);
static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx);
......@@ -67,57 +66,32 @@ static struct rt_mutex s_SHA_mutex;
#if !defined(BSP_USING_TRNG)
static struct rt_mutex s_PRNG_mutex;
static volatile int s_PRNG_done;
#endif
static volatile int s_AES_done;
static volatile int s_SHA_done;
static rt_err_t nu_crypto_init(void)
{
/* Enable Crypto engine interrupt */
NVIC_EnableIRQ(CRPT_IRQn);
rt_err_t result = RT_EOK;
/* init cipher mutex */
#if defined(RT_HWCRYPTO_USING_AES)
result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
AES_ENABLE_INT(CRPT);
#endif
#if defined(RT_HWCRYPTO_USING_SHA1) || defined(RT_HWCRYPTO_USING_SHA2)
result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
SHA_ENABLE_INT(CRPT);
#endif
//init cipher mutex
rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_PRIO);
rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_PRIO);
#if !defined(BSP_USING_TRNG)
#if defined(RT_HWCRYPTO_USING_RNG) && !defined(BSP_USING_TRNG)
result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
PRNG_ENABLE_INT(CRPT);
rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_PRIO);
#endif
return RT_EOK;
}
//Crypto engine IRQ handler
void CRPT_IRQHandler()
{
if (AES_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_AESEIF_Msk) || (CRPT->AES_STS & (CRPT_AES_STS_BUSERR_Msk | CRPT_AES_STS_CNTERR_Msk | (0x1ul << 21))))
rt_kprintf("AES ERROR\n");
s_AES_done = 1;
AES_CLR_INT_FLAG(CRPT);
}
if (SHA_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_HMACEIF_Msk) || (CRPT->HMAC_STS & (CRPT_HMAC_STS_DMAERR_Msk | (0x1ul << 9))))
rt_kprintf("SHA ERROR\n");
s_SHA_done = 1;
SHA_CLR_INT_FLAG(CRPT);
}
#if !defined(BSP_USING_TRNG)
if (PRNG_GET_INT_FLAG(CRPT))
{
s_PRNG_done = 1;
PRNG_CLR_INT_FLAG(CRPT);
}
#endif
return result;
}
static rt_err_t nu_aes_crypt_run(
......@@ -133,6 +107,7 @@ static rt_err_t nu_aes_crypt_run(
{
uint32_t au32SwapKey[8];
uint32_t au32SwapIV[4];
rt_err_t result;
au32SwapKey[0] = nu_get32_be(&pu8Key[0]);
au32SwapKey[1] = nu_get32_be(&pu8Key[4]);
......@@ -156,22 +131,34 @@ static rt_err_t nu_aes_crypt_run(
au32SwapIV[2] = nu_get32_be(&pu8IV[8]);
au32SwapIV[3] = nu_get32_be(&pu8IV[12]);
rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_AES_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Using Channel 0
AES_Open(CRPT, 0, bEncrypt, u32OpMode, u32KeySize, AES_IN_OUT_SWAP);
AES_SetKey(CRPT, 0, (uint32_t *)au32SwapKey, u32KeySize);
AES_SetKey(CRPT, 0, (uint32_t *)&au32SwapKey[0], u32KeySize);
AES_SetInitVect(CRPT, 0, (uint32_t *)au32SwapIV);
//Setup AES DMA
AES_SetDMATransfer(CRPT, 0, (uint32_t)pu8InData, (uint32_t)pu8OutData, u32DataLen);
AES_CLR_INT_FLAG(CRPT);
//Start AES encryption/decryption
s_AES_done = 0;
/* Start AES encryption/decryption */
AES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_AES_done) {};
rt_mutex_release(&s_AES_mutex);
/* Wait done */
while (!(CRPT->INTSTS & CRPT_INTEN_AESIEN_Msk)) {};
if ((u32DataLen % 16) && (CRPT->AES_STS & (CRPT_AES_STS_OUTBUFEMPTY_Msk | CRPT_AES_STS_INBUFEMPTY_Msk)))
rt_kprintf("AES WARNING - AES Data length(%d) is not enough. -> %d \n", u32DataLen, RT_ALIGN(u32DataLen, 16));
else if (CRPT->INTSTS & (CRPT_INTSTS_AESEIF_Msk) || (CRPT->AES_STS & (CRPT_AES_STS_BUSERR_Msk | CRPT_AES_STS_CNTERR_Msk)))
rt_kprintf("AES ERROR - CRPT->INTSTS-%08x, CRPT->AES_STS-%08x\n", CRPT->INTSTS, CRPT->AES_STS);
/* Clear AES interrupt status */
AES_CLR_INT_FLAG(CRPT);
result = rt_mutex_release(&s_AES_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......@@ -180,28 +167,38 @@ static rt_err_t nu_aes_crypt_run(
//Using PRNG instead of TRNG
static void nu_prng_open(uint32_t u32Seed)
{
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
rt_err_t result;
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Open PRNG 128 bits. But always return 32 bits
//Open PRNG 128 bits.
PRNG_Open(CRPT, PRNG_KEY_SIZE_128, PRNG_SEED_RELOAD, u32Seed);
rt_mutex_release(&s_PRNG_mutex);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
}
static rt_uint32_t nu_prng_run(void)
{
uint32_t au32RNGValue[2];
uint32_t au32RNGValue[4];
rt_err_t result;
rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
s_PRNG_done = 0;
PRNG_Start(CRPT);
while (!s_PRNG_done) {};
while ((CRPT->PRNG_CTL & CRPT_PRNG_CTL_BUSY_Msk)) {};
/* Clear PRNG interrupt status */
PRNG_CLR_INT_FLAG(CRPT);
PRNG_Read(CRPT, au32RNGValue);
PRNG_Read(CRPT, &au32RNGValue[0]);
rt_mutex_release(&s_PRNG_mutex);
return au32RNGValue[0];
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
return au32RNGValue[0] ^ au32RNGValue[1] ^ au32RNGValue[2] ^ au32RNGValue[3];
}
#endif
......@@ -214,6 +211,8 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
unsigned char iv_temp[16];
RT_ASSERT(symmetric_ctx != RT_NULL);
RT_ASSERT(symmetric_info != RT_NULL);
if ((symmetric_info->length % 4) != 0)
{
......@@ -336,18 +335,23 @@ static void SHABlockUpdate(uint32_t u32OpMode, uint32_t u32SrcAddr, uint32_t u32
//Setup SHA DMA
SHA_SetDMATransfer(CRPT, u32SrcAddr, u32Len);
SHA_CLR_INT_FLAG(CRPT);
//Start SHA
s_SHA_done = 0;
if (u32Mode == CRYPTO_DMA_FIRST)
CRPT->HMAC_CTL |= CRPT_HMAC_CTL_DMAFIRST_Msk;
else
CRPT->HMAC_CTL &= ~CRPT_HMAC_CTL_DMAFIRST_Msk;
//Start SHA
SHA_CLR_INT_FLAG(CRPT);
SHA_Start(CRPT, u32Mode);
while (!s_SHA_done) {};
/* Wait done */
while (!(CRPT->INTSTS & CRPT_INTSTS_HMACIF_Msk)) {};
if (CRPT->INTSTS & (CRPT_INTSTS_HMACEIF_Msk) || (CRPT->HMAC_STS & (CRPT_HMAC_STS_DMAERR_Msk)))
rt_kprintf("SHA ERROR - CRPT->INTSTS-%08x, CRPT->HMAC_STS-%08x\n", CRPT->INTSTS, CRPT->HMAC_STS);
/* Clear SHA interrupt status */
SHA_CLR_INT_FLAG(CRPT);
}
static rt_err_t nu_sha_hash_run(
......@@ -357,12 +361,18 @@ static rt_err_t nu_sha_hash_run(
uint32_t u32DataLen
)
{
rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
rt_err_t result;
RT_ASSERT(psSHACtx != RT_NULL);
RT_ASSERT(pu8InData != RT_NULL);
result = rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
uint8_t *pu8SrcAddr = (uint8_t *)pu8InData;
uint32_t u32CopyLen = 0;
while ((psSHACtx->u32SHATempBufLen + u32DataLen) >= psSHACtx->u32BlockSize)
while ((psSHACtx->u32SHATempBufLen + u32DataLen) > psSHACtx->u32BlockSize)
{
if (psSHACtx->pu8SHATempBuf)
{
......@@ -397,7 +407,8 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
......@@ -425,7 +436,8 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
......@@ -436,7 +448,8 @@ static rt_err_t nu_sha_hash_run(
psSHACtx->u32SHATempBufLen += u32DataLen;
}
rt_mutex_release(&s_SHA_mutex);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
}
......@@ -446,6 +459,8 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
uint32_t u32SHAOpMode;
unsigned char *nu_in;
unsigned char in_align_flag = 0;
RT_ASSERT(hash_ctx != RT_NULL);
RT_ASSERT(in != RT_NULL);
//Select SHA operation mode
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
......@@ -500,7 +515,11 @@ static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, r
unsigned char *nu_out;
unsigned char out_align_flag = 0;
uint32_t u32SHAOpMode;
S_SHA_CONTEXT *psSHACtx = hash_ctx->parent.contex;
S_SHA_CONTEXT *psSHACtx = RT_NULL;
RT_ASSERT(hash_ctx != RT_NULL);
RT_ASSERT(out != RT_NULL);
psSHACtx = hash_ctx->parent.contex;
//Check SHA Hash value buffer length
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
......@@ -639,6 +658,7 @@ static const struct hwcrypto_rng_ops nu_rng_ops =
static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
{
rt_err_t res = RT_EOK;
RT_ASSERT(ctx != RT_NULL);
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
......@@ -672,18 +692,6 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
}
case HWCRYPTO_TYPE_SHA1:
{
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
if (ctx->contex == RT_NULL)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA1 operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
}
case HWCRYPTO_TYPE_SHA2:
{
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
......@@ -692,7 +700,7 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA2 operation
//Setup operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
}
......@@ -718,11 +726,15 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
break;
}
nu_hwcrypto_reset(ctx);
return res;
}
static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx)
{
RT_ASSERT(ctx != RT_NULL);
if (ctx->contex)
rt_free(ctx->contex);
}
......@@ -730,6 +742,8 @@ static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx)
static rt_err_t nu_hwcrypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
{
rt_err_t res = RT_EOK;
RT_ASSERT(des != RT_NULL);
RT_ASSERT(src != RT_NULL);
if (des->contex && src->contex)
{
......@@ -791,6 +805,7 @@ static void nu_hwcrypto_reset(struct rt_hwcrypto_ctx *ctx)
int nu_hwcrypto_device_init(void)
{
rt_err_t result;
static struct rt_hwcrypto_device nu_hwcrypto_dev;
nu_hwcrypto_dev.ops = &nu_hwcrypto_ops;
......@@ -809,11 +824,9 @@ int nu_hwcrypto_device_init(void)
nu_trng_init();
#endif
// register hwcrypto operation
if (rt_hwcrypto_register(&nu_hwcrypto_dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
{
return -1;
}
/* register hwcrypto operation */
result = rt_hwcrypto_register(&nu_hwcrypto_dev, RT_HWCRYPTO_DEFAULT_NAME);
RT_ASSERT(result == RT_EOK);
return 0;
}
......
......@@ -20,12 +20,12 @@
#include <string.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
/* Private define ---------------------------------------------------------------*/
......
......@@ -71,10 +71,8 @@ rt_uint32_t nu_trng_rand(struct hwcrypto_rng *ctx)
{
if (!s_i32TRNGEnable)
{
uint32_t u32RNGValue;
//use software rand
u32RNGValue = rand();
return u32RNGValue;
/* Use software rand */
return (rt_uint32_t)rand();
}
return nu_trng_run();
......
......@@ -96,14 +96,8 @@ static rt_uint32_t nu_crc_run(
rt_err_t nu_crc_init(void)
{
rt_err_t result;
SYS_ResetModule(CRC_RST);
result = rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
return RT_EOK;
return rt_mutex_init(&s_CRC_mutex, NU_CRYPTO_CRC_NAME, RT_IPC_FLAG_PRIO);
}
rt_uint32_t nu_crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
......
......@@ -30,7 +30,6 @@
#endif
/* Private typedef --------------------------------------------------------------*/
typedef struct
{
uint8_t *pu8SHATempBuf;
......@@ -72,76 +71,38 @@ static struct rt_mutex s_SHA_mutex;
#if !defined(BSP_USING_TRNG)
static struct rt_mutex s_PRNG_mutex;
static volatile int s_PRNG_done;
#endif
static volatile int s_AES_done;
static volatile int s_TDES_done;
static volatile int s_SHA_done;
static rt_err_t nu_crypto_init(void)
{
rt_err_t result;
rt_err_t result = RT_EOK;
/* Enable Crypto engine interrupt */
NVIC_EnableIRQ(CRPT_IRQn);
AES_ENABLE_INT(CRPT);
TDES_ENABLE_INT(CRPT);
SHA_ENABLE_INT(CRPT);
//init cipher mutex
/* init cipher mutex */
#if defined(RT_HWCRYPTO_USING_AES)
result = rt_mutex_init(&s_AES_mutex, NU_HWCRYPTO_AES_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
AES_ENABLE_INT(CRPT);
#endif
#if defined(RT_HWCRYPTO_USING_3DES)
result = rt_mutex_init(&s_TDES_mutex, NU_HWCRYPTO_TDES_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
TDES_ENABLE_INT(CRPT);
#endif
#if defined(RT_HWCRYPTO_USING_SHA1) || defined(RT_HWCRYPTO_USING_SHA2)
result = rt_mutex_init(&s_SHA_mutex, NU_HWCRYPTO_SHA_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
SHA_ENABLE_INT(CRPT);
#endif
#if !defined(BSP_USING_TRNG)
PRNG_ENABLE_INT(CRPT);
#if defined(RT_HWCRYPTO_USING_RNG) && !defined(BSP_USING_TRNG)
result = rt_mutex_init(&s_PRNG_mutex, NU_HWCRYPTO_PRNG_NAME, RT_IPC_FLAG_PRIO);
RT_ASSERT(result == RT_EOK);
PRNG_ENABLE_INT(CRPT);
#endif
return RT_EOK;
}
//Crypto engine IRQ handler
void CRYPTO_IRQHandler()
{
if (AES_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_AESEIF_Msk) || (CRPT->AES_STS & (CRPT_AES_STS_BUSERR_Msk | CRPT_AES_STS_CNTERR_Msk | (0x1ul << 21))))
rt_kprintf("AES ERROR\n");
s_AES_done = 1;
AES_CLR_INT_FLAG(CRPT);
}
if (TDES_GET_INT_FLAG(CRPT))
{
s_TDES_done = 1;
TDES_CLR_INT_FLAG(CRPT);
}
if (SHA_GET_INT_FLAG(CRPT))
{
if (CRPT->INTSTS & (CRPT_INTSTS_HMACEIF_Msk) || (CRPT->HMAC_STS & (CRPT_HMAC_STS_DMAERR_Msk | (0x1ul << 9))))
rt_kprintf("SHA ERROR\n");
s_SHA_done = 1;
SHA_CLR_INT_FLAG(CRPT);
}
#if !defined(BSP_USING_TRNG)
if (PRNG_GET_INT_FLAG(CRPT))
{
s_PRNG_done = 1;
PRNG_CLR_INT_FLAG(CRPT);
}
#endif
return result;
}
static rt_err_t nu_aes_crypt_run(
......@@ -155,10 +116,9 @@ static rt_err_t nu_aes_crypt_run(
uint32_t u32DataLen
)
{
rt_err_t result;
uint32_t au32SwapKey[8];
uint32_t au32SwapIV[4];
rt_err_t result;
au32SwapKey[0] = nu_get32_be(&pu8Key[0]);
au32SwapKey[1] = nu_get32_be(&pu8Key[4]);
......@@ -187,16 +147,26 @@ static rt_err_t nu_aes_crypt_run(
//Using Channel 0
AES_Open(CRPT, 0, bEncrypt, u32OpMode, u32KeySize, AES_IN_OUT_SWAP);
AES_SetKey(CRPT, 0, (uint32_t *)au32SwapKey, u32KeySize);
AES_SetKey(CRPT, 0, (uint32_t *)&au32SwapKey[0], u32KeySize);
AES_SetInitVect(CRPT, 0, (uint32_t *)au32SwapIV);
//Setup AES DMA
AES_SetDMATransfer(CRPT, 0, (uint32_t)pu8InData, (uint32_t)pu8OutData, u32DataLen);
AES_CLR_INT_FLAG(CRPT);
//Start AES encryption/decryption
s_AES_done = 0;
/* Start AES encryption/decryption */
AES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_AES_done) {};
/* Wait done */
while (!(CRPT->INTSTS & CRPT_INTEN_AESIEN_Msk)) {};
if ((u32DataLen % 16) && (CRPT->AES_STS & (CRPT_AES_STS_OUTBUFEMPTY_Msk | CRPT_AES_STS_INBUFEMPTY_Msk)))
rt_kprintf("AES WARNING - AES Data length(%d) is not enough. -> %d \n", u32DataLen, RT_ALIGN(u32DataLen, 16));
else if (CRPT->INTSTS & (CRPT_INTSTS_AESEIF_Msk) || (CRPT->AES_STS & (CRPT_AES_STS_BUSERR_Msk | CRPT_AES_STS_CNTERR_Msk)))
rt_kprintf("AES ERROR - CRPT->INTSTS-%08x, CRPT->AES_STS-%08x\n", CRPT->INTSTS, CRPT->AES_STS);
/* Clear AES interrupt status */
AES_CLR_INT_FLAG(CRPT);
result = rt_mutex_release(&s_AES_mutex);
RT_ASSERT(result == RT_EOK);
......@@ -213,32 +183,33 @@ static void nu_prng_open(uint32_t u32Seed)
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Open PRNG 64 bits. But always return 32 bits
//Open PRNG 64 bits.
PRNG_Open(CRPT, PRNG_KEY_SIZE_64, PRNG_SEED_RELOAD, u32Seed);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
}
static rt_uint32_t nu_prng_run(void)
{
rt_err_t result;
uint32_t au32RNGValue[2];
rt_err_t result;
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
s_PRNG_done = 0;
PRNG_Start(CRPT);
while (!s_PRNG_done) {};
while ((CRPT->PRNG_CTL & CRPT_PRNG_CTL_BUSY_Msk)) {};
/* Clear PRNG interrupt status */
PRNG_CLR_INT_FLAG(CRPT);
PRNG_Read(CRPT, au32RNGValue);
PRNG_Read(CRPT, &au32RNGValue[0]);
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
return au32RNGValue[0];
return au32RNGValue[0] ^ au32RNGValue[1];
}
#endif
......@@ -251,6 +222,8 @@ static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hw
unsigned char in_align_flag = 0;
unsigned char out_align_flag = 0;
unsigned char iv_temp[16];
RT_ASSERT(symmetric_ctx != RT_NULL);
RT_ASSERT(symmetric_info != RT_NULL);
if ((symmetric_info->length % 4) != 0)
{
......@@ -408,10 +381,11 @@ static rt_err_t nu_des_crypt_run(
//Setup TDES DMA
TDES_SetDMATransfer(CRPT, 0, (uint32_t)pu8InData, (uint32_t)pu8OutData, u32DataLen);
TDES_CLR_INT_FLAG(CRPT);
//Start TDES encryption/decryption
s_TDES_done = 0;
TDES_Start(CRPT, 0, CRYPTO_DMA_ONE_SHOT);
while (!s_TDES_done) {};
/* Wait done */
while (!(CRPT->INTSTS & CRPT_INTEN_TDESIEN_Msk)) {};
result = rt_mutex_release(&s_TDES_mutex);
RT_ASSERT(result == RT_EOK);
......@@ -521,10 +495,6 @@ static void SHABlockUpdate(uint32_t u32OpMode, uint32_t u32SrcAddr, uint32_t u32
//Setup SHA DMA
SHA_SetDMATransfer(CRPT, u32SrcAddr, u32Len);
SHA_CLR_INT_FLAG(CRPT);
//Start SHA
s_SHA_done = 0;
if (u32Mode == CRYPTO_DMA_FIRST)
{
......@@ -547,10 +517,18 @@ static void SHABlockUpdate(uint32_t u32OpMode, uint32_t u32SrcAddr, uint32_t u32
CRPT->HMAC_CTL &= ~CRPT_HMAC_CTL_DMAFIRST_Msk;
}
}
//Start SHA
SHA_CLR_INT_FLAG(CRPT);
SHA_Start(CRPT, u32Mode);
while (!s_SHA_done) {};
/* Wait done */
while (!(CRPT->INTSTS & CRPT_INTSTS_HMACIF_Msk)) {};
if (CRPT->INTSTS & (CRPT_INTSTS_HMACEIF_Msk) || (CRPT->HMAC_STS & (CRPT_HMAC_STS_DMAERR_Msk)))
rt_kprintf("SHA ERROR - CRPT->INTSTS-%08x, CRPT->HMAC_STS-%08x\n", CRPT->INTSTS, CRPT->HMAC_STS);
/* Clear SHA interrupt status */
SHA_CLR_INT_FLAG(CRPT);
}
static rt_err_t nu_sha_hash_run(
......@@ -562,6 +540,9 @@ static rt_err_t nu_sha_hash_run(
{
rt_err_t result;
RT_ASSERT(psSHACtx != RT_NULL);
RT_ASSERT(pu8InData != RT_NULL);
result = rt_mutex_take(&s_SHA_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
......@@ -603,10 +584,8 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
......@@ -634,10 +613,8 @@ static rt_err_t nu_sha_hash_run(
if (psSHACtx->pu8SHATempBuf == RT_NULL)
{
LOG_E("fun[%s] memory allocate %d bytes failed!", __FUNCTION__, psSHACtx->u32BlockSize);
result = rt_mutex_release(&s_SHA_mutex);
RT_ASSERT(result == RT_EOK);
return -RT_ENOMEM;
}
......@@ -659,6 +636,8 @@ static rt_err_t nu_sha_update(struct hwcrypto_hash *hash_ctx, const rt_uint8_t *
uint32_t u32SHAOpMode;
unsigned char *nu_in;
unsigned char in_align_flag = 0;
RT_ASSERT(hash_ctx != RT_NULL);
RT_ASSERT(in != RT_NULL);
//Select SHA operation mode
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
......@@ -713,7 +692,11 @@ static rt_err_t nu_sha_finish(struct hwcrypto_hash *hash_ctx, rt_uint8_t *out, r
unsigned char *nu_out;
unsigned char out_align_flag = 0;
uint32_t u32SHAOpMode;
S_SHA_CONTEXT *psSHACtx = hash_ctx->parent.contex;
S_SHA_CONTEXT *psSHACtx = RT_NULL;
RT_ASSERT(hash_ctx != RT_NULL);
RT_ASSERT(out != RT_NULL);
psSHACtx = hash_ctx->parent.contex;
//Check SHA Hash value buffer length
switch (hash_ctx->parent.type & (HWCRYPTO_MAIN_TYPE_MASK | HWCRYPTO_SUB_TYPE_MASK))
......@@ -857,6 +840,7 @@ static const struct hwcrypto_rng_ops nu_rng_ops =
static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
{
rt_err_t res = RT_EOK;
RT_ASSERT(ctx != RT_NULL);
switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
{
......@@ -890,35 +874,16 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
}
case HWCRYPTO_TYPE_DES:
{
ctx->contex = RT_NULL;
//Setup DES operation
((struct hwcrypto_symmetric *)ctx)->ops = &nu_des_ops;
break;
}
case HWCRYPTO_TYPE_3DES:
{
ctx->contex = RT_NULL;
//Setup 3DES operation
//Setup operation
((struct hwcrypto_symmetric *)ctx)->ops = &nu_des_ops;
break;
}
case HWCRYPTO_TYPE_SHA1:
{
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
if (ctx->contex == RT_NULL)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA1 operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
}
case HWCRYPTO_TYPE_SHA2:
{
ctx->contex = rt_malloc(sizeof(S_SHA_CONTEXT));
......@@ -927,7 +892,7 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
return -RT_ERROR;
rt_memset(ctx->contex, 0, sizeof(S_SHA_CONTEXT));
//Setup SHA2 operation
//Setup operation
((struct hwcrypto_hash *)ctx)->ops = &nu_sha_ops;
break;
}
......@@ -953,11 +918,15 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
break;
}
nu_hwcrypto_reset(ctx);
return res;
}
static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx)
{
RT_ASSERT(ctx != RT_NULL);
if (ctx->contex)
rt_free(ctx->contex);
}
......@@ -965,6 +934,8 @@ static void nu_hwcrypto_destroy(struct rt_hwcrypto_ctx *ctx)
static rt_err_t nu_hwcrypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
{
rt_err_t res = RT_EOK;
RT_ASSERT(des != RT_NULL);
RT_ASSERT(src != RT_NULL);
if (des->contex && src->contex)
{
......@@ -1015,8 +986,8 @@ static void nu_hwcrypto_reset(struct rt_hwcrypto_ctx *ctx)
}
break;
}
#endif
#endif
default:
break;
}
......@@ -1026,6 +997,7 @@ static void nu_hwcrypto_reset(struct rt_hwcrypto_ctx *ctx)
int nu_hwcrypto_device_init(void)
{
rt_err_t result;
static struct rt_hwcrypto_device nu_hwcrypto_dev;
nu_hwcrypto_dev.ops = &nu_hwcrypto_ops;
......@@ -1044,11 +1016,9 @@ int nu_hwcrypto_device_init(void)
nu_trng_init();
#endif
// register hwcrypto operation
if (rt_hwcrypto_register(&nu_hwcrypto_dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
{
return -1;
}
/* register hwcrypto operation */
result = rt_hwcrypto_register(&nu_hwcrypto_dev, RT_HWCRYPTO_DEFAULT_NAME);
RT_ASSERT(result == RT_EOK);
return 0;
}
......
......@@ -20,12 +20,12 @@
#include <string.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
/* Private define ---------------------------------------------------------------*/
......
......@@ -77,10 +77,8 @@ rt_uint32_t nu_trng_rand(struct hwcrypto_rng *ctx)
{
if (!s_i32TRNGEnable)
{
uint32_t u32RNGValue;
//use software rand
u32RNGValue = rand();
return u32RNGValue;
/* Use software rand */
return (rt_uint32_t)rand();
}
return nu_trng_run();
......
......@@ -15,7 +15,11 @@
#include "NuMicro.h"
#include <rtdevice.h>
#include <dfs_posix.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include "drv_adc.h"
#include "touch.h"
......
......@@ -20,12 +20,12 @@
#include <drv_sys.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
/* Private define ---------------------------------------------------------------*/
......
......@@ -17,10 +17,6 @@
#include <rtdevice.h>
#include <lcd_ili9341.h>
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
#define DEF_VRAM_BUFFER_NUMBER 2
#endif
static struct rt_device_graphic_info g_Ili9341Info =
{
.bits_per_pixel = 16,
......@@ -275,16 +271,9 @@ static rt_err_t ili9341_lcd_control(rt_device_t dev, int cmd, void *args)
case RTGRAPHIC_CTRL_RECT_UPDATE:
{
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
struct rt_device_rect_info *psRectInfo = args;
struct rt_device_rect_info *psRectInfo = (struct rt_device_rect_info *)args;
rt_uint16_t *pixels = (rt_uint16_t *)g_Ili9341Info.framebuffer;
RT_ASSERT(args != RT_NULL);
if (psRectInfo->y >= g_Ili9341Info.height)
{
int buf_id = psRectInfo->y / g_Ili9341Info.height;
pixels += g_Ili9341Info.width * g_Ili9341Info.height * buf_id;
psRectInfo->y %= g_Ili9341Info.height;
}
RT_ASSERT(args);
ili9341_fillrect(pixels, psRectInfo);
#else
......@@ -325,7 +314,7 @@ int rt_hw_lcd_ili9341_init(void)
lcd_device.user_data = &ili9341_ops;
#if defined(NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER)
g_Ili9341Info.framebuffer = rt_malloc_align((DEF_VRAM_BUFFER_NUMBER * g_Ili9341Info.pitch * g_Ili9341Info.height) + 32, 32);
g_Ili9341Info.framebuffer = rt_malloc_align((g_Ili9341Info.pitch * g_Ili9341Info.height) + 32, 32);
RT_ASSERT(g_Ili9341Info.framebuffer != RT_NULL);
#endif
......
......@@ -15,7 +15,11 @@
#include "NuMicro.h"
#include <rtdevice.h>
#include <dfs_posix.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include "drv_adc.h"
#include "touch.h"
......
......@@ -57,11 +57,6 @@ static struct rt_mutex s_AES_mutex;
static struct rt_mutex s_SHA_mutex;
static struct rt_mutex s_PRNG_mutex;
static void nu_crypto_isr(int vector, void *param)
{
/* Nothing */
}
static rt_err_t nu_aes_crypt_run(
rt_bool_t bEncrypt,
uint32_t u32OpMode,
......@@ -153,7 +148,7 @@ static void nu_prng_open(uint32_t u32Seed)
result = rt_mutex_take(&s_PRNG_mutex, RT_WAITING_FOREVER);
RT_ASSERT(result == RT_EOK);
//Open PRNG 64 bits. But always return 32 bits
//Open PRNG 64 bits
PRNG_Open(CRPT, PRNG_KEY_SIZE_64, PRNG_SEED_RELOAD, u32Seed);
result = rt_mutex_release(&s_PRNG_mutex);
......@@ -179,7 +174,7 @@ static rt_uint32_t nu_prng_run(void)
result = rt_mutex_release(&s_PRNG_mutex);
RT_ASSERT(result == RT_EOK);
return au32RNGValue[0];
return au32RNGValue[0] ^ au32RNGValue[1];
}
static rt_err_t nu_aes_crypt(struct hwcrypto_symmetric *symmetric_ctx, struct hwcrypto_symmetric_info *symmetric_info)
......@@ -665,6 +660,8 @@ static rt_err_t nu_hwcrypto_create(struct rt_hwcrypto_ctx *ctx)
break;
}
nu_hwcrypto_reset(ctx);
return res;
}
......@@ -770,9 +767,6 @@ int nu_hwcrypto_device_init(void)
result = rt_hwcrypto_register(&nu_hwcrypto_dev, RT_HWCRYPTO_DEFAULT_NAME);
RT_ASSERT(result == RT_EOK);
/* Enable Crypto engine interrupt */
rt_hw_interrupt_install(IRQ_CRYPTO, nu_crypto_isr, RT_NULL, "crypto");
return 0;
}
INIT_DEVICE_EXPORT(nu_hwcrypto_device_init);
......
......@@ -21,12 +21,12 @@
#include <drv_sys.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
/* Private define ---------------------------------------------------------------*/
......
......@@ -33,11 +33,6 @@ static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_colo
rect.width = area->x2 - area->x1 + 1;
rect.height = area->y2 - area->y1 + 1;
if ((uint32_t)info.framebuffer != (uint32_t)color_p)
{
rect.y += info.height;
}
rt_device_control(lcd_device, RTGRAPHIC_CTRL_RECT_UPDATE, &rect);
lv_disp_flush_ready(disp_drv);
}
......@@ -50,8 +45,7 @@ void lcd_perf_monitor(struct _lv_disp_drv_t *disp_drv, uint32_t time, uint32_t p
void lv_port_disp_init(void)
{
rt_err_t result;
void *buf_1 = RT_NULL;
void *buf_2 = RT_NULL;
void *buf1 = RT_NULL;
lcd_device = rt_device_find("lcd");
if (lcd_device == 0)
......@@ -62,7 +56,7 @@ void lv_port_disp_init(void)
/* get framebuffer address */
result = rt_device_control(lcd_device, RTGRAPHIC_CTRL_GET_INFO, &info);
if (result != RT_EOK)
if (result != RT_EOK && info.framebuffer == RT_NULL)
{
LOG_E("error!");
/* get device information failed */
......@@ -72,12 +66,11 @@ void lv_port_disp_init(void)
RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 ||
info.bits_per_pixel == 24 || info.bits_per_pixel == 32);
buf_1 = (void *)info.framebuffer;
buf_2 = (void *)((uint32_t)buf_1 + info.height * info.width * info.bits_per_pixel / 8);
rt_kprintf("LVGL: Use two buffers - buf_1@%08x, buf_2@%08x\n", buf_1, buf_2);
buf1 = (void *)info.framebuffer;
rt_kprintf("LVGL: Use one buffers - buf1@%08x\n", buf1);
/*Initialize `disp_buf` with the buffer(s).*/
lv_disp_draw_buf_init(&disp_buf, buf_1, buf_2, info.width * info.height);
lv_disp_draw_buf_init(&disp_buf, buf1, RT_NULL, info.width * info.height);
result = rt_device_open(lcd_device, 0);
if (result != RT_EOK)
......
......@@ -22,12 +22,12 @@
#include <rtdbg.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
#if defined(PKG_USING_FAL)
......
......@@ -310,8 +310,8 @@ CONFIG_NETDEV_IPV6=0
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP203 is not set
# CONFIG_RT_USING_LWIP202 is not set
CONFIG_RT_USING_LWIP203=y
# CONFIG_RT_USING_LWIP212 is not set
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_MEM_ALIGNMENT=4
......
......@@ -22,12 +22,12 @@
#include <rtdbg.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
#if defined(PKG_USING_FAL)
......
......@@ -22,12 +22,12 @@
#include <rtdbg.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
#if defined(PKG_USING_FAL)
......
......@@ -277,7 +277,6 @@ CONFIG_RT_USB_DEVICE_HID_MOUSE=y
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
......@@ -293,7 +292,9 @@ CONFIG_RT_USING_POSIX_SELECT=y
# CONFIG_RT_USING_POSIX_MMAN is not set
# CONFIG_RT_USING_POSIX_DELAY is not set
# CONFIG_RT_USING_POSIX_CLOCK is not set
# CONFIG_RT_USING_POSIX_TIMER is not set
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Interprocess Communication (IPC)
......@@ -427,7 +428,9 @@ CONFIG_PKG_AT_DEVICE_PATH="/packages/iot/at_device"
# CONFIG_AT_DEVICE_USING_ESP32 is not set
CONFIG_AT_DEVICE_USING_ESP8266=y
CONFIG_AT_DEVICE_ESP8266_INIT_ASYN=y
CONFIG_AT_DEVICE_ESP8266_SOCKET=y
# CONFIG_AT_DEVICE_ESP8266_SAMPLE is not set
# CONFIG_AT_DEVICE_ESP8266_SAMPLE_BSP_TAKEOVER is not set
# CONFIG_AT_DEVICE_USING_RW007 is not set
# CONFIG_AT_DEVICE_USING_SIM800C is not set
# CONFIG_AT_DEVICE_USING_SIM76XX is not set
......@@ -561,6 +564,7 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999
# CONFIG_PKG_USING_MCURSES is not set
# CONFIG_PKG_USING_TERMBOX is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_QRCODE is not set
#
# tools packages
......@@ -571,7 +575,6 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_SEGGER_RTT is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ULOG_FILE is not set
# CONFIG_PKG_USING_LOGMGR is not set
......@@ -622,6 +625,7 @@ CONFIG_PKG_AT_DEVICE_VER_NUM=0x99999
# CONFIG_PKG_USING_POSIX_GETLINE is not set
# CONFIG_PKG_USING_POSIX_WCWIDTH is not set
# CONFIG_PKG_USING_POSIX_ITOA is not set
# CONFIG_PKG_USING_POSIX_STRINGS is not set
#
# acceleration: Assembly language or algorithmic acceleration packages
......@@ -747,6 +751,7 @@ CONFIG_PKG_FAL_VER_NUM=0x99999
# CONFIG_PKG_USING_SSD1306 is not set
# CONFIG_PKG_USING_QKEY is not set
# CONFIG_PKG_USING_RS485 is not set
# CONFIG_PKG_USING_RS232 is not set
# CONFIG_PKG_USING_NES is not set
# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
# CONFIG_PKG_USING_VDEVICE is not set
......@@ -834,19 +839,8 @@ CONFIG_PKG_FAL_VER_NUM=0x99999
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_STATE_MACHINE is not set
# CONFIG_PKG_USING_DESIGN_PATTERN is not set
#
# Nuvoton Packages Config
#
CONFIG_NU_PKG_USING_UTILS=y
CONFIG_NU_PKG_USING_DEMO=y
CONFIG_NU_PKG_USING_BMX055=y
# CONFIG_NU_PKG_USING_MAX31875 is not set
CONFIG_NU_PKG_USING_NAU88L25=y
# CONFIG_NU_PKG_USING_NAU8822 is not set
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
# CONFIG_NU_PKG_USING_SPINAND is not set
# CONFIG_PKG_USING_CONTROLLER is not set
# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
#
# Hardware Drivers Config
......@@ -946,11 +940,11 @@ CONFIG_NU_CRC_USE_PDMA=y
CONFIG_BSP_USING_WDT=y
# CONFIG_BSP_USING_EBI is not set
CONFIG_BSP_USING_USBD=y
# CONFIG_BSP_USING_HSUSBD is not set
CONFIG_BSP_USING_HSUSBD=y
# CONFIG_BSP_USING_USBH is not set
CONFIG_BSP_USING_HSUSBH=y
CONFIG_NU_USBHOST_HUB_POLLING_INTERVAL=100
# CONFIG_BSP_USING_HSOTG is not set
CONFIG_BSP_USING_HSOTG=y
#
# On-board Peripheral Drivers
......@@ -962,6 +956,7 @@ CONFIG_BOARD_USING_BMX055=y
CONFIG_BOARD_USING_NAU88L25=y
CONFIG_BOARD_USING_STORAGE_SDCARD=y
CONFIG_BOARD_USING_STORAGE_SPIFLASH=y
CONFIG_BOARD_USING_USB_D_H=y
# CONFIG_BOARD_USING_HSUSBD is not set
# CONFIG_BOARD_USING_HSUSBD_USBH is not set
# CONFIG_BOARD_USING_HSUSBH is not set
......@@ -973,5 +968,18 @@ CONFIG_BOARD_USING_HSUSBH_USBD=y
#
# CONFIG_BOARD_USING_MAX31875 is not set
# CONFIG_BOARD_USING_LCD_ILI9341 is not set
#
# Nuvoton Packages Config
#
CONFIG_NU_PKG_USING_UTILS=y
CONFIG_NU_PKG_USING_DEMO=y
CONFIG_NU_PKG_USING_BMX055=y
# CONFIG_NU_PKG_USING_MAX31875 is not set
CONFIG_NU_PKG_USING_NAU88L25=y
# CONFIG_NU_PKG_USING_NAU8822 is not set
# CONFIG_NU_PKG_USING_DA9062 is not set
# CONFIG_NU_PKG_USING_ILI9341 is not set
# CONFIG_NU_PKG_USING_SPINAND is not set
CONFIG_BOARD_USE_UTEST=y
CONFIG_UTEST_CMD_PREFIX="bsp.nuvoton.numaker-iot-m487.test.utest."
......@@ -13,12 +13,12 @@
#include <rtthread.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
#if defined(PKG_USING_FAL)
......
......@@ -54,42 +54,49 @@ menu "Hardware Drivers Config"
select BSP_USING_QSPI0
default y
choice
prompt "Select FS/HS USB Ports"
config BOARD_USING_HSUSBD
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0)"
help
Choose this option if you need HSUSBD function mode.
config BOARD_USING_HSUSBD_USBH
select BSP_USING_USBH
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0) and USBH(over USB1.1)"
help
Choose this option if you need HSUSBD and USBH function mode at the same time.
config BOARD_USING_HSUSBH
select BSP_USING_HSUSBH
bool "Enable HSUSBH(over USB2.0)"
help
Choose this option if you need HSUSBH function mode.
config BOARD_USING_HSUSBH_USBD
select BSP_USING_HSUSBH
select BSP_USING_USBD
bool "Enable HSUSBH(over USB2.0) and USBD(over USB1.1)"
help
Choose this option if you need HSUSBH and USBD function mode at the same time.
config BOARD_USING_HSOTG
select BSP_USING_HSOTG
bool "Enable HSOTG(over USB2.0)"
help
Choose this option if you need HSOTG function mode.
endchoice
config BOARD_USING_USB_D_H
select BSP_USING_HSOTG
bool "Enable USB Device or Host function"
help
Choose this option if you need USB function.
if BOARD_USING_USB_D_H
choice
prompt "Select FS/HS USB Ports"
config BOARD_USING_HSUSBD
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0)"
help
Choose this option if you need HSUSBD function mode.
config BOARD_USING_HSUSBD_USBH
select BSP_USING_USBH
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0) and USBH(over USB1.1)"
help
Choose this option if you need HSUSBD and USBH function mode at the same time.
config BOARD_USING_HSUSBH
select BSP_USING_HSUSBH
bool "Enable HSUSBH(over USB2.0)"
help
Choose this option if you need HSUSBH function mode.
config BOARD_USING_HSUSBH_USBD
select BSP_USING_HSUSBH
select BSP_USING_USBD
bool "Enable HSUSBH(over USB2.0) and USBD(over USB1.1)"
help
Choose this option if you need HSUSBH and USBD function mode at the same time.
config BOARD_USING_HSOTG
select BSP_USING_HSOTG
bool "Enable HSOTG(over USB2.0)"
help
Choose this option if you need HSOTG function mode.
endchoice
endif
endmenu
......
......@@ -13,12 +13,12 @@
#include <rtthread.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
#if defined(PKG_USING_FAL)
......
......@@ -3,9 +3,19 @@
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
src = Glob('*.c') + Glob('*.cpp')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')
objs = objs + group
Return('objs')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('LVGL-port', src, depend = ['PKG_USING_LVGL'], CPPPATH = CPPPATH)
Return('group')
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man First version
*/
#ifndef LV_CONF_H
#define LV_CONF_H
#define LV_USE_PERF_MONITOR 1
#define LV_COLOR_DEPTH 16
#define LV_HOR_RES_MAX (320)
#define LV_VER_RES_MAX (240)
#define LV_FONT_MONTSERRAT_12 1
#define LV_FONT_MONTSERRAT_16 1
#define LV_USE_DEMO_RTT_MUSIC 1
#define LV_DEMO_RTT_MUSIC_AUTO_PLAY 1
#define LV_DISP_DEF_REFR_PERIOD 16
//#define CONFIG_LV_LOG_LEVEL LV_LOG_LEVEL_TRACE
#endif
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-17 Meco Man First version
*/
#include <rtthread.h>
#include <lvgl.h>
#define DBG_TAG "LVGL"
#define DBG_LVL DBG_INFO
#include <rtdbg.h>
#ifndef LV_THREAD_STACK_SIZE
#define LV_THREAD_STACK_SIZE 4096
#endif
#ifndef LV_THREAD_PRIO
#define LV_THREAD_PRIO (RT_THREAD_PRIORITY_MAX*2/3)
#endif
static void lvgl_thread(void *parameter)
{
extern void lv_demo_music(void);
lv_demo_music();
while (1)
{
lv_task_handler();
rt_thread_mdelay(1);
}
}
static int lvgl_demo_init(void)
{
rt_thread_t tid;
tid = rt_thread_create("LVGL", lvgl_thread, RT_NULL, LV_THREAD_STACK_SIZE, LV_THREAD_PRIO, 10);
if (tid == RT_NULL)
{
LOG_E("Fail to create 'LVGL' thread");
}
rt_thread_startup(tid);
return 0;
}
INIT_APP_EXPORT(lvgl_demo_init);
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-12-17 Wayne The first version
*/
#include <lvgl.h>
#define LOG_TAG "lvgl.disp"
#define DBG_ENABLE
#define DBG_SECTION_NAME LOG_TAG
#define DBG_LEVEL DBG_ERROR
#define DBG_COLOR
#include <rtdbg.h>
/*A static or global variable to store the buffers*/
static lv_disp_draw_buf_t disp_buf;
static lv_disp_drv_t disp_drv; /*Descriptor of a display driver*/
static rt_device_t lcd_device = 0;
static struct rt_device_graphic_info info;
static void lcd_fb_flush(lv_disp_drv_t *disp_drv, const lv_area_t *area, lv_color_t *color_p)
{
/* Rendering */
struct rt_device_rect_info rect;
rect.x = area->x1;
rect.y = area->y1;
rect.width = area->x2 - area->x1 + 1;
rect.height = area->y2 - area->y1 + 1;
rt_device_control(lcd_device, RTGRAPHIC_CTRL_RECT_UPDATE, &rect);
lv_disp_flush_ready(disp_drv);
}
void lcd_perf_monitor(struct _lv_disp_drv_t *disp_drv, uint32_t time, uint32_t px)
{
rt_kprintf("Elapsed: %dms, Pixel: %d, Bytes:%d\n", time, px, px * sizeof(lv_color_t));
}
void lv_port_disp_init(void)
{
rt_err_t result;
void *buf1 = RT_NULL;
lcd_device = rt_device_find("lcd");
if (lcd_device == 0)
{
LOG_E("error!");
return;
}
/* get framebuffer address */
result = rt_device_control(lcd_device, RTGRAPHIC_CTRL_GET_INFO, &info);
if (result != RT_EOK && info.framebuffer == RT_NULL)
{
LOG_E("error!");
/* get device information failed */
return;
}
RT_ASSERT(info.bits_per_pixel == 8 || info.bits_per_pixel == 16 ||
info.bits_per_pixel == 24 || info.bits_per_pixel == 32);
buf1 = (void *)info.framebuffer;
rt_kprintf("LVGL: Use one buffers - buf1@%08x\n", buf1);
/*Initialize `disp_buf` with the buffer(s).*/
lv_disp_draw_buf_init(&disp_buf, buf1, RT_NULL, info.width * info.height);
result = rt_device_open(lcd_device, 0);
if (result != RT_EOK)
{
LOG_E("error!");
return;
}
lv_disp_drv_init(&disp_drv); /*Basic initialization*/
/*Set the resolution of the display*/
disp_drv.hor_res = info.width;
disp_drv.ver_res = info.height;
/*Set a display buffer*/
disp_drv.draw_buf = &disp_buf;
/*Write the internal buffer (draw_buf) to the display*/
disp_drv.flush_cb = lcd_fb_flush;
/* Called after every refresh cycle to tell the rendering and flushing time + the number of flushed pixels */
//disp_drv.monitor_cb = lcd_perf_monitor;
/*Finally register the driver*/
lv_disp_drv_register(&disp_drv);
}
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#ifndef LV_PORT_DISP_H
#define LV_PORT_DISP_H
#ifdef __cplusplus
extern "C" {
#endif
void lv_port_disp_init(void);
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
* 2021-12-17 Wayne Add input event
*/
#include <lvgl.h>
#include <stdbool.h>
#include <rtdevice.h>
#include "touch.h"
static lv_indev_state_t last_state = LV_INDEV_STATE_REL;
static rt_int16_t last_x = 0;
static rt_int16_t last_y = 0;
static void input_read(lv_indev_drv_t *indev_drv, lv_indev_data_t *data)
{
data->point.x = last_x;
data->point.y = last_y;
data->state = last_state;
}
void nu_touch_inputevent_cb(rt_int16_t x, rt_int16_t y, rt_uint8_t state)
{
switch (state)
{
case RT_TOUCH_EVENT_UP:
last_state = LV_INDEV_STATE_RELEASED;
break;
case RT_TOUCH_EVENT_DOWN:
last_x = x;
last_y = y;
last_state = LV_INDEV_STATE_PRESSED;
break;
case RT_TOUCH_EVENT_MOVE:
last_x = x;
last_y = y;
break;
}
}
void lv_port_indev_init(void)
{
static lv_indev_drv_t indev_drv;
/* Basic initialization */
lv_indev_drv_init(&indev_drv);
indev_drv.type = LV_INDEV_TYPE_POINTER;
indev_drv.read_cb = input_read;
/* Register the driver in LVGL and save the created input device object */
lv_indev_drv_register(&indev_drv);
}
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2021-10-18 Meco Man The first version
*/
#ifndef LV_PORT_INDEV_H
#define LV_PORT_INDEV_H
#ifdef __cplusplus
extern "C" {
#endif
#include <lv_hal_indev.h>
extern lv_indev_t *button_indev;
void lv_port_indev_init(void);
void lv_port_indev_input(rt_int16_t x, rt_int16_t y, lv_indev_state_t state);
#ifdef __cplusplus
} /*extern "C"*/
#endif
#endif
......@@ -61,6 +61,37 @@ menu "Hardware Drivers Config"
endmenu
menu "Board extended module drivers"
config BOARD_USING_LCD_ILI9341
bool "LCD ILI9341 (over spi1)"
select RT_USING_TOUCH
select NU_PKG_USING_ILI9341
select NU_PKG_USING_ILI9341_SPI
select NU_PKG_ILI9341_WITH_OFFSCREEN_FRAMEBUFFER
select NU_PKG_ILI9341_HORIZONTAL
select BSP_USING_SPI1
select PKG_USING_LVGL
select PKG_USING_LV_MUSIC_DEMO
default n
if BOARD_USING_LCD_ILI9341
config BOARD_USING_ILI9341_PIN_BACKLIGHT
int "Specify the pin index of backlight pin index"
range 0 127
default 43
config BOARD_USING_ILI9341_PIN_RESET
int "Specify the pin index of reset pin index"
range 0 127
default 9
config BOARD_USING_ILI9341_PIN_DC
int "Specify the pin index of data&command switching"
range 0 127
default 8
endif
config BOARD_USING_SEGMENT_LCD
bool "Segment LCD supporting.(over lcd)"
select BSP_USING_SLCD
......
......@@ -108,7 +108,12 @@ void nutool_pincfg_deinit_epwm0(void)
void nutool_pincfg_init_epwm1(void)
{
SYS->GPC_MFPH &= ~(SYS_GPC_MFPH_PC12MFP_Msk | SYS_GPC_MFPH_PC11MFP_Msk | SYS_GPC_MFPH_PC10MFP_Msk | SYS_GPC_MFPH_PC9MFP_Msk);
#if !defined(BOARD_USING_LCD_ILI9341)
SYS->GPC_MFPH |= (SYS_GPC_MFPH_PC12MFP_EPWM1_CH0 | SYS_GPC_MFPH_PC11MFP_EPWM1_CH1 | SYS_GPC_MFPH_PC10MFP_EPWM1_CH2 | SYS_GPC_MFPH_PC9MFP_EPWM1_CH3);
#else
SYS->GPC_MFPH |= (SYS_GPC_MFPH_PC12MFP_EPWM1_CH0 | SYS_GPC_MFPH_PC10MFP_EPWM1_CH2 | SYS_GPC_MFPH_PC9MFP_EPWM1_CH3);
#endif
SYS->GPC_MFPL &= ~(SYS_GPC_MFPL_PC1MFP_Msk | SYS_GPC_MFPL_PC0MFP_Msk);
SYS->GPC_MFPL |= (SYS_GPC_MFPL_PC1MFP_EPWM1_CH4 | SYS_GPC_MFPL_PC0MFP_EPWM1_CH5);
......@@ -396,7 +401,9 @@ void nutool_pincfg_init(void)
nutool_pincfg_init_spi0();
nutool_pincfg_init_spi1();
nutool_pincfg_init_uart0();
#if !defined(BOARD_USING_LCD_ILI9341)
nutool_pincfg_init_uart1();
#endif
nutool_pincfg_init_uart4();
nutool_pincfg_init_usb();
......
......@@ -13,6 +13,32 @@
#include <rtdevice.h>
#include <drv_gpio.h>
#if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
#include <lcd_ili9341.h>
#if defined(PKG_USING_GUIENGINE)
#include <rtgui/driver.h>
#endif
int rt_hw_ili9341_port(void)
{
if (rt_hw_lcd_ili9341_spi_init("spi1") != RT_EOK)
return -1;
rt_hw_lcd_ili9341_init();
#if defined(PKG_USING_GUIENGINE)
rt_device_t lcd_ili9341;
lcd_ili9341 = rt_device_find("lcd");
if (lcd_ili9341)
{
rtgui_graphic_set_device(lcd_ili9341);
}
#endif
return 0;
}
INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
#endif /* BOARD_USING_LCD_ILI9341 */
#if defined(BOARD_USING_ESP8266)
#include <at_device_esp8266.h>
......
......@@ -279,7 +279,6 @@ CONFIG_RT_USB_DEVICE_HID_MOUSE=y
#
# POSIX layer and C standard library
#
# CONFIG_RT_USING_MODULE is not set
CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
#
......@@ -295,7 +294,9 @@ CONFIG_RT_USING_POSIX_DEVIO=y
# CONFIG_RT_USING_POSIX_MMAN is not set
# CONFIG_RT_USING_POSIX_DELAY is not set
# CONFIG_RT_USING_POSIX_CLOCK is not set
# CONFIG_RT_USING_POSIX_TIMER is not set
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Interprocess Communication (IPC)
......@@ -343,8 +344,7 @@ CONFIG_NETDEV_IPV6=0
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP203 is not set
CONFIG_RT_USING_LWIP203=y
# CONFIG_RT_USING_LWIP212 is not set
# CONFIG_RT_USING_LWIP_IPV6 is not set
CONFIG_RT_LWIP_MEM_ALIGNMENT=4
......@@ -942,11 +942,11 @@ CONFIG_NU_CRC_USE_PDMA=y
CONFIG_BSP_USING_WDT=y
# CONFIG_BSP_USING_EBI is not set
CONFIG_BSP_USING_USBD=y
# CONFIG_BSP_USING_HSUSBD is not set
CONFIG_BSP_USING_HSUSBD=y
# CONFIG_BSP_USING_USBH is not set
CONFIG_BSP_USING_HSUSBH=y
CONFIG_NU_USBHOST_HUB_POLLING_INTERVAL=100
# CONFIG_BSP_USING_HSOTG is not set
CONFIG_BSP_USING_HSOTG=y
#
# On-board Peripheral Drivers
......@@ -956,6 +956,7 @@ CONFIG_BOARD_USING_IP101GR=y
CONFIG_BOARD_USING_NAU88L25=y
CONFIG_BOARD_USING_STORAGE_SDCARD=y
CONFIG_BOARD_USING_STORAGE_SPIFLASH=y
CONFIG_BOARD_USING_USB_D_H=y
# CONFIG_BOARD_USING_HSUSBD is not set
# CONFIG_BOARD_USING_HSUSBD_USBH is not set
# CONFIG_BOARD_USING_HSUSBH is not set
......
......@@ -13,12 +13,12 @@
#include <rtthread.h>
#if defined(RT_USING_DFS)
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#include <dfs_fs.h>
#include <dfs_file.h>
#include <unistd.h>
#include <stdio.h>
#include <sys/stat.h>
#include <sys/statfs.h>
#endif
#if defined(PKG_USING_FAL)
......
......@@ -37,42 +37,49 @@ menu "Hardware Drivers Config"
select BSP_USING_QSPI0
default y
choice
prompt "Select FS/HS USB Ports"
config BOARD_USING_HSUSBD
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0)"
help
Choose this option if you need HSUSBD function mode.
config BOARD_USING_HSUSBD_USBH
select BSP_USING_USBH
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0) and USBH(over USB1.1)"
help
Choose this option if you need HSUSBD and USBH function mode at the same time.
config BOARD_USING_HSUSBH
select BSP_USING_HSUSBH
bool "Enable HSUSBH(over USB2.0)"
help
Choose this option if you need HSUSBH function mode.
config BOARD_USING_HSUSBH_USBD
select BSP_USING_HSUSBH
select BSP_USING_USBD
bool "Enable HSUSBH(over USB2.0) and USBD(over USB1.1)"
help
Choose this option if you need HSUSBH and USBD function mode at the same time.
config BOARD_USING_HSOTG
select BSP_USING_HSOTG
bool "Enable HSOTG(over USB2.0)"
help
Choose this option if you need HSOTG function mode.
endchoice
config BOARD_USING_USB_D_H
select BSP_USING_HSOTG
bool "Enable USB Device or Host function"
help
Choose this option if you need USB function.
if BOARD_USING_USB_D_H
choice
prompt "Select FS/HS USB Ports"
config BOARD_USING_HSUSBD
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0)"
help
Choose this option if you need HSUSBD function mode.
config BOARD_USING_HSUSBD_USBH
select BSP_USING_USBH
select BSP_USING_HSUSBD
bool "Enable HSUSBD(over USB2.0) and USBH(over USB1.1)"
help
Choose this option if you need HSUSBD and USBH function mode at the same time.
config BOARD_USING_HSUSBH
select BSP_USING_HSUSBH
bool "Enable HSUSBH(over USB2.0)"
help
Choose this option if you need HSUSBH function mode.
config BOARD_USING_HSUSBH_USBD
select BSP_USING_HSUSBH
select BSP_USING_USBD
bool "Enable HSUSBH(over USB2.0) and USBD(over USB1.1)"
help
Choose this option if you need HSUSBH and USBD function mode at the same time.
config BOARD_USING_HSOTG
select BSP_USING_HSOTG
bool "Enable HSOTG(over USB2.0)"
help
Choose this option if you need HSOTG function mode.
endchoice
endif
endmenu
......
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