未验证 提交 7d469384 编写于 作者: W woody 提交者: GitHub

将swm320和swm341整合进synwit (#6290)

* 将swm320和swm341整合进synwit
上级 74912a6b
......@@ -172,8 +172,8 @@ jobs:
# - {RTT_BSP: "stm32/stm32wle5-yizhilian-lm402", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "wch/arm/ch32f103c8-core", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "wch/arm/ch32f203r-evt", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "swm341", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "synwit/swm320", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "synwit/swm341", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "beaglebone", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "zynqmp-r5-axu4ev", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "frdm-k64f", RTT_TOOL_CHAIN: "sourcery-arm"}
......
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-5-26 lik first version
*/
#ifndef __DRV_ADC_H__
#define __DRV_ADC_H__
#include "board.h"
struct swm_adc_cfg
{
const char *name;
ADC_TypeDef *ADCx;
ADC_InitStructure adc_initstruct;
};
struct swm_adc
{
struct swm_adc_cfg *cfg;
struct rt_adc_device adc_device;
};
#ifdef BSP_USING_ADC0
#ifndef ADC0_CFG
#define ADC0_CFG \
{ \
.name = "adc0", \
.ADCx = ADC0, \
.adc_initstruct.clk_src = ADC_CLKSRC_VCO_DIV64, \
.adc_initstruct.clk_div = 25, \
.adc_initstruct.pga_ref = PGA_REF_INTERNAL, \
.adc_initstruct.channels = 0, \
.adc_initstruct.samplAvg = ADC_AVG_SAMPLE1, \
.adc_initstruct.trig_src = ADC_TRIGSRC_SW, \
.adc_initstruct.Continue = 0, \
.adc_initstruct.EOC_IEn = 0, \
.adc_initstruct.OVF_IEn = 0, \
.adc_initstruct.HFULL_IEn = 0, \
.adc_initstruct.FULL_IEn = 0, \
}
#endif /* ADC0_CFG */
#endif /* BSP_USING_ADC0 */
#ifdef BSP_USING_ADC1
#ifndef ADC1_CFG
#define ADC1_CFG \
{ \
.name = "adc1", \
.ADCx = ADC1, \
.adc_initstruct.clk_src = ADC_CLKSRC_VCO_DIV64, \
.adc_initstruct.clk_div = 25, \
.adc_initstruct.pga_ref = PGA_REF_INTERNAL, \
.adc_initstruct.channels = 0, \
.adc_initstruct.samplAvg = ADC_AVG_SAMPLE1, \
.adc_initstruct.trig_src = ADC_TRIGSRC_SW, \
.adc_initstruct.Continue = 0, \
.adc_initstruct.EOC_IEn = 0, \
.adc_initstruct.OVF_IEn = 0, \
.adc_initstruct.HFULL_IEn = 0, \
.adc_initstruct.FULL_IEn = 0, \
}
#endif /* ADC1_CFG */
#endif /* BSP_USING_ADC1 */
#endif /* __DRV_ADC_H__ */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-10 lik first version
*/
#ifndef __DRV_CRYPTO_H__
#define __DRV_CRYPTO_H__
#include "board.h"
/* swm config class */
struct swm_crc_cfg
{
CRC_TypeDef *CRCx;
uint32_t inival;
uint8_t crc_inbits;
uint8_t crc_1632;
uint8_t crc_out_not;
uint8_t crc_out_rev;
};
#ifdef BSP_USING_CRC
#define DEFAULT_CRC (CRC)
#define DEFAULT_INIVAL (0x00000000)
#define DEFAULT_INBITS (2)
#define DEFAULT_CRC1632 (0)
#define DEFAULT_OUT_NOT (0)
#define DEFAULT_OUT_REV (0)
#endif /* BSP_USING_CRC */
int rt_hw_crypto_init(void);
#endif /* __DRV_CRYPTO_H__ */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_HWTIMER_H__
#define __DRV_HWTIMER_H__
#include "board.h"
struct swm_hwtimer_cfg
{
char *name;
TIMR_TypeDef *TIMRx;
};
struct swm_hwtimer
{
struct swm_hwtimer_cfg *cfg;
rt_hwtimer_t time_device;
};
#ifndef TIM_DEV_INFO_CONFIG
#define TIM_DEV_INFO_CONFIG \
{ \
.maxfreq = 120000000, \
.minfreq = 120000000, \
.maxcnt = 0xFFFFFFFF, \
.cntmode = HWTIMER_CNTMODE_DW, \
}
#endif /* TIM_DEV_INFO_CONFIG */
#ifdef BSP_USING_TIM0
#ifndef TIM0_CFG
#define TIM0_CFG \
{ \
.name = "timer0", \
.TIMRx = TIMR0, \
}
#endif /* TIM0_CFG */
#endif /* BSP_USING_TIM0 */
#ifdef BSP_USING_TIM1
#ifndef TIM1_CFG
#define TIM1_CFG \
{ \
.name = "timer1", \
.TIMRx = TIMR1, \
}
#endif /* TIM1_CFG */
#endif /* BSP_USING_TIM1 */
#ifdef BSP_USING_TIM2
#ifndef TIM2_CFG
#define TIM2_CFG \
{ \
.name = "timer2", \
.TIMRx = TIMR2, \
}
#endif /* TIM2_CFG */
#endif /* BSP_USING_TIM2 */
#ifdef BSP_USING_TIM3
#ifndef TIM3_CFG
#define TIM3_CFG \
{ \
.name = "timer3", \
.TIMRx = TIMR3, \
}
#endif /* TIM3_CFG */
#endif /* BSP_USING_TIM3 */
#ifdef BSP_USING_TIM4
#ifndef TIM4_CFG
#define TIM4_CFG \
{ \
.name = "timer4", \
.TIMRx = TIMR4, \
}
#endif /* TIM4_CFG */
#endif /* BSP_USING_TIM4 */
#ifdef BSP_USING_TIM5
#ifndef TIM5_CFG
#define TIM5_CFG \
{ \
.name = "timer5", \
.TIMRx = TIMR5, \
}
#endif /* TIM5_CFG */
#endif /* BSP_USING_TIM5 */
int rt_hw_hwtimer_init(void);
#endif /* __DRV_HWTIMER_H__ */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik format file
*/
#include "drv_pwm.h"
#ifdef RT_USING_PWM
#ifdef BSP_USING_PWM
//#define DRV_DEBUG
#define LOG_TAG "drv.pwm"
#include <drv_log.h>
#define MIN_PERIOD 2
#define MIN_PULSE 1
static struct swm_pwm_cfg pwm_cfg[] =
{
#ifdef BSP_USING_PWM0
PWM0_CFG,
#endif
#ifdef BSP_USING_PWM1
PWM1_CFG,
#endif
#ifdef BSP_USING_PWM2
PWM2_CFG,
#endif
#ifdef BSP_USING_PWM3
PWM3_CFG,
#endif
#ifdef BSP_USING_PWM4
PWM4_CFG,
#endif
#ifdef BSP_USING_PWM5
PWM5_CFG,
#endif
};
static struct swm_pwm pwm_drv[sizeof(pwm_cfg) / sizeof(pwm_cfg[0])] = {0};
static rt_err_t swm_pwm_control(struct rt_device_pwm *pwm_device, int cmd, void *arg);
static struct rt_pwm_ops pwm_ops =
{
swm_pwm_control};
static rt_err_t swm_pwm_enable(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration, rt_bool_t enable)
{
struct swm_pwm_cfg *cfg = RT_NULL;
RT_ASSERT(pwm_device != RT_NULL);
cfg = pwm_device->parent.user_data;
if (!enable)
{
if (PWM_CH_A == configuration->channel)
{
PWM_Stop(cfg->PWMx, 1, 0);
}
if (PWM_CH_B == configuration->channel)
{
PWM_Stop(cfg->PWMx, 0, 1);
}
}
else
{
if (PWM_CH_A == configuration->channel)
{
PWM_Start(cfg->PWMx, 1, 0);
}
if (PWM_CH_B == configuration->channel)
{
PWM_Start(cfg->PWMx, 0, 1);
}
}
return RT_EOK;
}
static rt_err_t swm_pwm_get(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration)
{
rt_uint64_t tim_clock;
tim_clock = SystemCoreClock / 8;
struct swm_pwm_cfg *cfg = RT_NULL;
RT_ASSERT(pwm_device != RT_NULL);
cfg = pwm_device->parent.user_data;
/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
tim_clock /= 1000000UL;
configuration->period = PWM_GetCycle(cfg->PWMx, configuration->channel) * 1000UL / tim_clock;
configuration->pulse = PWM_GetHDuty(cfg->PWMx, configuration->channel) * 1000UL / tim_clock;
return RT_EOK;
}
static rt_err_t swm_pwm_set(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration)
{
rt_uint32_t period, pulse;
rt_uint64_t tim_clock;
tim_clock = SystemCoreClock / 8;
struct swm_pwm_cfg *cfg = RT_NULL;
RT_ASSERT(pwm_device != RT_NULL);
cfg = pwm_device->parent.user_data;
/* Convert nanosecond to frequency and duty cycle. 1s = 1 * 1000 * 1000 * 1000 ns */
/* when SystemCoreClock = 120MHz, configuration->period max 4.369ms */
/* when SystemCoreClock = 20MHz, configuration->period max 26.214ms */
tim_clock /= 1000000UL;
period = (unsigned long long)configuration->period * tim_clock / 1000ULL;
pulse = (unsigned long long)configuration->pulse * tim_clock / 1000ULL;
if (period < MIN_PERIOD)
{
period = MIN_PERIOD;
}
if (pulse < MIN_PULSE)
{
pulse = MIN_PULSE;
}
PWM_SetCycle(cfg->PWMx, configuration->channel, period);
PWM_SetHDuty(cfg->PWMx, configuration->channel, pulse);
return RT_EOK;
}
static rt_err_t swm_pwm_control(struct rt_device_pwm *pwm_device, int cmd, void *arg)
{
RT_ASSERT(pwm_device != RT_NULL);
struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
switch (cmd)
{
case PWM_CMD_ENABLE:
return swm_pwm_enable(pwm_device, configuration, RT_TRUE);
case PWM_CMD_DISABLE:
return swm_pwm_enable(pwm_device, configuration, RT_FALSE);
case PWM_CMD_SET:
return swm_pwm_set(pwm_device, configuration);
case PWM_CMD_GET:
return swm_pwm_get(pwm_device, configuration);
default:
return RT_EINVAL;
}
}
int rt_hw_pwm_init(void)
{
int i = 0;
int result = RT_EOK;
for (i = 0; i < sizeof(pwm_cfg) / sizeof(pwm_cfg[0]); i++)
{
pwm_drv[i].cfg = &pwm_cfg[i];
if (pwm_drv[i].cfg->PWMx == PWM0)
{
#ifdef BSP_USING_PWM0A
PORT_Init(PORTC, PIN2, FUNMUX0_PWM0A_OUT, 0);
#endif
#ifdef BSP_USING_PWM0B
PORT_Init(PORTC, PIN4, FUNMUX0_PWM0B_OUT, 0);
#endif
}
else if (pwm_drv[i].cfg->PWMx == PWM1)
{
#ifdef BSP_USING_PWM1A
PORT_Init(PORTC, PIN3, FUNMUX1_PWM1A_OUT, 0);
#endif
#ifdef BSP_USING_PWM1B
PORT_Init(PORTC, PIN5, FUNMUX1_PWM1B_OUT, 0);
#endif
}
else if (pwm_drv[i].cfg->PWMx == PWM2)
{
#ifdef BSP_USING_PWM2A
PORT_Init(PORTN, PIN4, FUNMUX0_PWM2A_OUT, 0);
#endif
#ifdef BSP_USING_PWM2B
PORT_Init(PORTN, PIN6, FUNMUX0_PWM2B_OUT, 0);
#endif
}
else if (pwm_drv[i].cfg->PWMx == PWM3)
{
#ifdef BSP_USING_PWM3A
PORT_Init(PORTN, PIN3, FUNMUX1_PWM3A_OUT, 0);
#endif
#ifdef BSP_USING_PWM3B
PORT_Init(PORTN, PIN5, FUNMUX1_PWM3B_OUT, 0);
#endif
}
else if (pwm_drv[i].cfg->PWMx == PWM4)
{
#ifdef BSP_USING_PWM4A
PORT_Init(PORTN, PIN8, FUNMUX0_PWM4A_OUT, 0);
#endif
#ifdef BSP_USING_PWM4B
PORT_Init(PORTN, PIN10, FUNMUX0_PWM4B_OUT, 0);
#endif
}
else if (pwm_drv[i].cfg->PWMx == PWM5)
{
#ifdef BSP_USING_PWM5A
PORT_Init(PORTN, PIN7, FUNMUX1_PWM5A_OUT, 0);
#endif
#ifdef BSP_USING_PWM5B
PORT_Init(PORTN, PIN9, FUNMUX1_PWM5B_OUT, 0);
#endif
}
PWM_Init(pwm_drv[i].cfg->PWMx, &(pwm_drv[i].cfg->pwm_initstruct));
if (rt_device_pwm_register(&pwm_drv[i].pwm_device, pwm_drv[i].cfg->name, &pwm_ops, pwm_drv[i].cfg) == RT_EOK)
{
LOG_D("%s register success", pwm_drv[i].cfg->name);
}
else
{
LOG_E("%s register failed", pwm_drv[i].cfg->name);
result = -RT_ERROR;
}
}
return result;
}
INIT_DEVICE_EXPORT(rt_hw_pwm_init);
#endif /* BSP_USING_PWM */
#endif /* RT_USING_PWM */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-07-10 lik first version
*/
#ifndef __DRV_SDIO_H__
#define __DRV_SDIO_H__
#include "board.h"
#define SDIO_BUFF_SIZE 4096
#define SDIO_ALIGN_LEN 4
#ifndef SDIO_MAX_FREQ
#define SDIO_MAX_FREQ (30000000)
#endif
struct sdio_pkg
{
struct rt_mmcsd_cmd *cmd;
void *buff;
rt_uint32_t flag;
};
typedef rt_err_t (*sdio_txconfig)(struct sdio_pkg *pkg, rt_uint32_t *buff, int size);
typedef rt_err_t (*sdio_rxconfig)(struct sdio_pkg *pkg, rt_uint32_t *buff, int size);
typedef rt_uint32_t (*sdio_clk_get)(SDIO_TypeDef *hw_sdio);
struct swm_sdio_des
{
SDIO_TypeDef *hw_sdio;
sdio_txconfig txconfig;
sdio_rxconfig rxconfig;
sdio_clk_get clk_get;
};
#endif /* __DRV_SDIO_H__ */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_SOFT_I2C_H__
#define __DRV_SOFT_I2C_H__
#include "board.h"
/* swm config class */
struct swm_soft_i2c_cfg
{
rt_uint8_t scl;
rt_uint8_t sda;
const char *name;
};
/* swm i2c dirver class */
struct swm_i2c
{
struct rt_i2c_bit_ops ops;
struct rt_i2c_bus_device i2c2_bus;
};
#ifdef BSP_USING_I2C0
#define I2C0_BUS_CFG \
{ \
.scl = BSP_I2C0_SCL_PIN, \
.sda = BSP_I2C0_SDA_PIN, \
.name = "i2c0", \
}
#endif
#ifdef BSP_USING_I2C1
#define I2C1_BUS_CFG \
{ \
.scl = BSP_I2C1_SCL_PIN, \
.sda = BSP_I2C1_SDA_PIN, \
.name = "i2c1", \
}
#endif
int rt_hw_i2c_init(void);
#endif /* __DRV_SOFT_I2C_H__ */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_SPI_H__
#define __DRV_SPI_H__
#include "board.h"
struct swm_spi_cs
{
GPIO_TypeDef *GPIOx;
uint32_t gpio_pin;
};
struct swm_spi_cfg
{
const char *name;
SPI_TypeDef *SPIx;
SPI_InitStructure spi_initstruct;
};
/* swm spi dirver class */
struct swm_spi
{
struct swm_spi_cfg *cfg;
struct rt_spi_configuration *configure;
struct rt_spi_bus spi_bus;
};
#ifdef BSP_USING_SPI0
#ifndef SPI0_BUS_CONFIG
#define SPI0_BUS_CONFIG \
{ \
.name = "spi0", \
.SPIx = SPI0, \
.spi_initstruct.clkDiv = SPI_CLKDIV_32, \
.spi_initstruct.FrameFormat = SPI_FORMAT_SPI, \
.spi_initstruct.SampleEdge = SPI_SECOND_EDGE, \
.spi_initstruct.IdleLevel = SPI_HIGH_LEVEL, \
.spi_initstruct.WordSize = 8, \
.spi_initstruct.Master = 1, \
.spi_initstruct.RXHFullIEn = 0, \
.spi_initstruct.TXEmptyIEn = 0, \
.spi_initstruct.TXCompleteIEn = 0, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
#ifdef BSP_USING_SPI1
#ifndef SPI1_BUS_CONFIG
#define SPI1_BUS_CONFIG \
{ \
.name = "spi1", \
.SPIx = SPI1, \
.spi_initstruct.clkDiv = SPI_CLKDIV_32, \
.spi_initstruct.FrameFormat = SPI_FORMAT_SPI, \
.spi_initstruct.SampleEdge = SPI_SECOND_EDGE, \
.spi_initstruct.IdleLevel = SPI_HIGH_LEVEL, \
.spi_initstruct.WordSize = 8, \
.spi_initstruct.Master = 1, \
.spi_initstruct.RXHFullIEn = 0, \
.spi_initstruct.TXEmptyIEn = 0, \
.spi_initstruct.TXCompleteIEn = 0, \
}
#endif /* SPI1_BUS_CONFIG */
#endif /* BSP_USING_SPI1 */
//cannot be used before completion init
rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, GPIO_TypeDef *GPIOx, uint32_t n);
int rt_hw_spi_init(void);
#endif /* __DRV_SPI_H__ */
/*
* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-10 Zohar_Lee first version
* 2020-07-10 lik rewrite
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#include "board.h"
/* swm config class */
struct swm_uart_cfg
{
const char *name;
UART_TypeDef *UARTx;
IRQn_Type irq;
UART_InitStructure uart_initstruct;
};
/* swm uart dirver class */
struct swm_uart
{
struct swm_uart_cfg *cfg;
struct rt_serial_device serial_device;
};
#ifdef BSP_USING_UART0
#ifndef UART0_CFG
#define UART0_CFG \
{ \
.name = "uart0", \
.UARTx = UART0, \
.irq = UART0_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART0_CFG */
#endif /* BSP_USING_UART0 */
#ifdef BSP_USING_UART1
#ifndef UART1_CFG
#define UART1_CFG \
{ \
.name = "uart1", \
.UARTx = UART1, \
.irq = UART1_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART1_CFG */
#endif /* BSP_USING_UART1 */
#ifdef BSP_USING_UART2
#ifndef UART2_CFG
#define UART2_CFG \
{ \
.name = "uart2", \
.UARTx = UART2, \
.irq = UART2_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART2_CFG */
#endif /* BSP_USING_UART2 */
#ifdef BSP_USING_UART3
#ifndef UART3_CFG
#define UART3_CFG \
{ \
.name = "uart3", \
.UARTx = UART3, \
.irq = UART3_IRQn, \
.uart_initstruct.Baudrate = 115200, \
.uart_initstruct.DataBits = UART_DATA_8BIT, \
.uart_initstruct.Parity = UART_PARITY_NONE, \
.uart_initstruct.StopBits = UART_STOP_1BIT, \
.uart_initstruct.RXThreshold = 0, \
.uart_initstruct.RXThresholdIEn = 1, \
.uart_initstruct.TXThresholdIEn = 0, \
.uart_initstruct.TimeoutTime = 10, \
.uart_initstruct.TimeoutIEn = 1, \
}
#endif /* UART3_CFG */
#endif /* BSP_USING_UART3 */
int rt_hw_serial_init(void);
#endif /* __DRV_UART_H__ */
#ifndef __SYSTEM_SWM320_H__
#define __SYSTEM_SWM320_H__
#ifdef __cplusplus
extern "C"
{
#endif
extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
extern uint32_t CyclesPerUs; // Cycles per micro second
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
extern void switchCLK_20MHz(void);
extern void switchCLK_40MHz(void);
extern void switchCLK_32KHz(void);
extern void switchCLK_XTAL(void);
extern void switchCLK_PLL(void);
extern void PLLInit(void);
#ifdef __cplusplus
}
#endif
#endif //__SYSTEM_SWM320_H__
#ifndef __SWM320_ADC_H__
#define __SWM320_ADC_H__
typedef struct
{
uint8_t clk_src; //ADC转换时钟源:ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32
uint8_t clk_div; //ADC转换时钟分频,取值1--31
uint8_t pga_ref; //PGA基准:PGA_REF_INTERNAL、PGA_REF_EXTERNAL
uint8_t channels; //ADC转换通道选中,ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合(即“按位或”运算)
uint8_t samplAvg; //采样取平均,触发启动ADC转换后,ADC在一个通道上连续采样、转换多次,并将它们的平均值作为该通道转换结果
uint8_t trig_src; //ADC触发方式:ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3
uint8_t Continue; //在软件触发模式下:1 连续转换模式,启动后一直采样、转换,直到软件清除START位
// 0 单次转换模式,转换完成后START位自动清除停止转换
uint8_t EOC_IEn; //EOC中断使能,可针对每个通道设置,其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合(即“按位或”运算)
uint8_t OVF_IEn; //OVF中断使能,可针对每个通道设置,其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合(即“按位或”运算)
uint8_t HFULL_IEn; //FIFO半满中断使能,可针对每个通道设置,其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合(即“按位或”运算)
uint8_t FULL_IEn; //FIFO 满中断使能,可针对每个通道设置,其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合(即“按位或”运算)
} ADC_InitStructure;
#define ADC_CH0 0x01
#define ADC_CH1 0x02
#define ADC_CH2 0x04
#define ADC_CH3 0x08
#define ADC_CH4 0x10
#define ADC_CH5 0x20
#define ADC_CH6 0x40
#define ADC_CH7 0x80
#define ADC_CLKSRC_HRC 1
#define ADC_CLKSRC_VCO_DIV16 2
#define ADC_CLKSRC_VCO_DIV32 3
#define ADC_CLKSRC_VCO_DIV64 4
#define ADC_AVG_SAMPLE1 0
#define ADC_AVG_SAMPLE2 1 //一次启动连续采样、转换2次,并计算两次结果的平均值作为转换结果
#define ADC_AVG_SAMPLE4 3
#define ADC_AVG_SAMPLE8 7
#define ADC_AVG_SAMPLE16 15
#define ADC_TRIGSRC_SW 0 //软件触发,即ADC->START.GO写1启动转换
#define ADC_TRIGSRC_PWM 1
#define PGA_REF_INTERNAL 1 //PGA输入共模电平由内部电路产生,ADC_REFP和ADC_REFN可悬空
#define PGA_REF_EXTERNAL 0 //PGA输入共模电平由外部引脚提供,(ADC_REFP + ADC_REFN) 电平值须与量程相同
void ADC_Init(ADC_TypeDef *ADCx, ADC_InitStructure *initStruct); //ADC模数转换器初始化
void ADC_Open(ADC_TypeDef *ADCx); //ADC开启,可以软件启动、或硬件触发ADC转换
void ADC_Close(ADC_TypeDef *ADCx); //ADC关闭,无法软件启动、或硬件触发ADC转换
void ADC_Start(ADC_TypeDef *ADCx); //启动指定ADC,开始模数转换
void ADC_Stop(ADC_TypeDef *ADCx); //关闭指定ADC,停止模数转换
uint32_t ADC_Read(ADC_TypeDef *ADCx, uint32_t chn); //从指定通道读取转换结果
uint32_t ADC_IsEOC(ADC_TypeDef *ADCx, uint32_t chn); //指定通道是否End Of Conversion
void ADC_ChnSelect(ADC_TypeDef *ADCx, uint32_t chns);
void ADC_IntEOCEn(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断使能
void ADC_IntEOCDis(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断禁止
void ADC_IntEOCClr(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断标志清除
uint32_t ADC_IntEOCStat(ADC_TypeDef *ADCx, uint32_t chn); //转换完成中断状态
void ADC_IntOVFEn(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断使能
void ADC_IntOVFDis(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断禁止
void ADC_IntOVFClr(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断标志清除
uint32_t ADC_IntOVFStat(ADC_TypeDef *ADCx, uint32_t chn); //数据溢出中断状态
void ADC_IntHFULLEn(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断使能
void ADC_IntHFULLDis(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断禁止
void ADC_IntHFULLClr(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断标志清除
uint32_t ADC_IntHFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO半满中断状态
void ADC_IntFULLEn(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断使能
void ADC_IntFULLDis(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断禁止
void ADC_IntFULLClr(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断标志清除
uint32_t ADC_IntFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断状态
#endif //__SWM320_ADC_H__
#ifndef __SWM320_CAN_H__
#define __SWM320_CAN_H__
#define CAN_FRAME_STD 0
#define CAN_FRAME_EXT 1
typedef struct
{
uint8_t Mode; //CAN_MODE_NORMAL、CAN_MODE_LISTEN、CAN_MODE_SELFTEST
uint8_t CAN_BS1; //CAN_BS1_1tq、CAN_BS1_2tq、... ... 、CAN_BS1_16tq
uint8_t CAN_BS2; //CAN_BS2_1tq、CAN_BS2_2tq、... ... 、CAN_BS2_8tq
uint8_t CAN_SJW; //CAN_SJW_1tq、CAN_SJW_2tq、CAN_SJW_3tq、CAN_SJW_4tq
uint32_t Baudrate; //波特率,即位传输速率,取值1--1000000
uint8_t FilterMode; //CAN_FILTER_16b、CAN_FILTER_32b
union
{
uint32_t FilterMask32b; //FilterCheck & (~FilterMask) == ID & (~FilterMask)的Message通过过滤
struct
{ // 0 must match 1 don't care
uint16_t FilterMask16b1;
uint16_t FilterMask16b2;
};
};
union
{
uint32_t FilterCheck32b;
struct
{
uint16_t FilterCheck16b1;
uint16_t FilterCheck16b2;
};
};
uint8_t RXNotEmptyIEn; //接收FIFO非空,有数据可读
uint8_t RXOverflowIEn; //接收FIFO溢出,有数据丢失
uint8_t ArbitrLostIEn; //控制器丢失仲裁变成接收方
uint8_t ErrPassiveIEn; //接收/发送错误计数值达到127
} CAN_InitStructure;
#define CAN_MODE_NORMAL 0 //常规模式
#define CAN_MODE_LISTEN 1 //监听模式
#define CAN_MODE_SELFTEST 2 //自测模式
#define CAN_BS1_1tq 0
#define CAN_BS1_2tq 1
#define CAN_BS1_3tq 2
#define CAN_BS1_4tq 3
#define CAN_BS1_5tq 4
#define CAN_BS1_6tq 5
#define CAN_BS1_7tq 6
#define CAN_BS1_8tq 7
#define CAN_BS1_9tq 8
#define CAN_BS1_10tq 9
#define CAN_BS1_11tq 10
#define CAN_BS1_12tq 11
#define CAN_BS1_13tq 12
#define CAN_BS1_14tq 13
#define CAN_BS1_15tq 14
#define CAN_BS1_16tq 15
#define CAN_BS2_1tq 0
#define CAN_BS2_2tq 1
#define CAN_BS2_3tq 2
#define CAN_BS2_4tq 3
#define CAN_BS2_5tq 4
#define CAN_BS2_6tq 5
#define CAN_BS2_7tq 6
#define CAN_BS2_8tq 7
#define CAN_SJW_1tq 0
#define CAN_SJW_2tq 1
#define CAN_SJW_3tq 2
#define CAN_SJW_4tq 3
#define CAN_FILTER_16b 0 //两个16位过滤器
#define CAN_FILTER_32b 1 //一个32位过滤器
typedef struct
{
uint32_t id; //消息ID
uint8_t format; //帧格式:CAN_FRAME_STD、CAN_FRAME_EXT
uint8_t remote; //消息是否为远程帧
uint8_t size; //接收到的数据个数
uint8_t data[8]; //接收到的数据
} CAN_RXMessage;
void CAN_Init(CAN_TypeDef *CANx, CAN_InitStructure *initStruct);
void CAN_Open(CAN_TypeDef *CANx);
void CAN_Close(CAN_TypeDef *CANx);
void CAN_Transmit(CAN_TypeDef *CANx, uint32_t format, uint32_t id, uint8_t data[], uint32_t size, uint32_t once);
void CAN_TransmitRequest(CAN_TypeDef *CANx, uint32_t format, uint32_t id, uint32_t once);
void CAN_Receive(CAN_TypeDef *CANx, CAN_RXMessage *msg);
uint32_t CAN_TXComplete(CAN_TypeDef *CANx);
uint32_t CAN_TXSuccess(CAN_TypeDef *CANx);
void CAN_AbortTransmit(CAN_TypeDef *CANx);
uint32_t CAN_TXBufferReady(CAN_TypeDef *CANx);
uint32_t CAN_RXDataAvailable(CAN_TypeDef *CANx);
void CAN_SetBaudrate(CAN_TypeDef *CANx, uint32_t baudrate, uint32_t CAN_BS1, uint32_t CAN_BS2, uint32_t CAN_SJW);
void CAN_SetFilter32b(CAN_TypeDef *CANx, uint32_t check, uint32_t mask);
void CAN_SetFilter16b(CAN_TypeDef *CANx, uint16_t check1, uint16_t mask1, uint16_t check2, uint16_t mask2);
void CAN_INTRXNotEmptyEn(CAN_TypeDef *CANx);
void CAN_INTRXNotEmptyDis(CAN_TypeDef *CANx);
void CAN_INTTXBufEmptyEn(CAN_TypeDef *CANx);
void CAN_INTTXBufEmptyDis(CAN_TypeDef *CANx);
void CAN_INTErrWarningEn(CAN_TypeDef *CANx);
void CAN_INTErrWarningDis(CAN_TypeDef *CANx);
void CAN_INTRXOverflowEn(CAN_TypeDef *CANx);
void CAN_INTRXOverflowDis(CAN_TypeDef *CANx);
void CAN_INTRXOverflowClear(CAN_TypeDef *CANx);
void CAN_INTWakeupEn(CAN_TypeDef *CANx);
void CAN_INTWakeupDis(CAN_TypeDef *CANx);
void CAN_INTErrPassiveEn(CAN_TypeDef *CANx);
void CAN_INTErrPassiveDis(CAN_TypeDef *CANx);
void CAN_INTArbitrLostEn(CAN_TypeDef *CANx);
void CAN_INTArbitrLostDis(CAN_TypeDef *CANx);
void CAN_INTBusErrorEn(CAN_TypeDef *CANx);
void CAN_INTBusErrorDis(CAN_TypeDef *CANx);
uint32_t CAN_INTStat(CAN_TypeDef *CANx);
#endif //__SWM320_CAN_H__
#ifndef __SWM320_DMA_H__
#define __SWM320_DMA_H__
#define DMA_CH0 0
#define DMA_CH1 1
#define DMA_CH2 2
void DMA_CHM_Config(uint32_t chn, uint32_t src_addr, uint32_t src_addr_incr, uint32_t dst_addr, uint32_t dst_addr_incr, uint32_t num_word, uint32_t int_en); //DMA通道配置,用于存储器间(如Flash和RAM间)搬运数据
void DMA_CH_Open(uint32_t chn); //DMA通道打开
void DMA_CH_Close(uint32_t chn); //DMA通道关闭
void DMA_CH_INTEn(uint32_t chn); //DMA中断使能,数据搬运完成后触发中断
void DMA_CH_INTDis(uint32_t chn); //DMA中断禁止,数据搬运完成后不触发中断
void DMA_CH_INTClr(uint32_t chn); //DMA中断标志清除
uint32_t DMA_CH_INTStat(uint32_t chn); //DMA中断状态查询,1 数据搬运完成 0 数据搬运未完成
#endif //__SWM320_DMA_H__
#ifndef __SWM320_EXTI_H__
#define __SWM320_EXTI_H__
void EXTI_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t mode); //指定引脚外部中断初始化
void EXTI_Open(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚外部中断打开(即使能)
void EXTI_Close(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚外部中断关闭(即禁能)
uint32_t EXTI_State(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚是否触发了中断
uint32_t EXTI_RawState(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚是否满足过/了中断触发条件,当此中断关闭时可通过调用此函数以查询的方式检测引脚上是否满足过/了中断触发条件
void EXTI_Clear(GPIO_TypeDef *GPIOx, uint32_t n); //指定引脚外部中断清除(即清除中断标志,以免再次进入此中断)
#define EXTI_FALL_EDGE 0x00 //下降沿触发中断
#define EXTI_RISE_EDGE 0x01 //上升沿触发中断
#define EXTI_BOTH_EDGE 0x02 //双边沿触发中断
#define EXTI_LOW_LEVEL 0x10 //低电平触发中断
#define EXTI_HIGH_LEVEL 0x11 //高电平触发中断
#endif //__SWM320_EXTI_H__
#ifndef __SWM320_GPIO_H__
#define __SWM320_GPIO_H__
void GPIO_Init(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t dir, uint32_t pull_up, uint32_t pull_down); //引脚初始化,包含引脚方向、上拉电阻、下拉电阻
void GPIO_SetBit(GPIO_TypeDef *GPIOx, uint32_t n); //将参数指定的引脚电平置高
void GPIO_ClrBit(GPIO_TypeDef *GPIOx, uint32_t n); //将参数指定的引脚电平置低
void GPIO_InvBit(GPIO_TypeDef *GPIOx, uint32_t n); //将参数指定的引脚电平反转
uint32_t GPIO_GetBit(GPIO_TypeDef *GPIOx, uint32_t n); //读取参数指定的引脚的电平状态
void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平置高
void GPIO_ClrBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平置低
void GPIO_InvBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //将参数指定的从n开始的w位连续引脚的电平反转
uint32_t GPIO_GetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w); //读取参数指定的从n开始的w位连续引脚的电平状态
void GPIO_AtomicSetBit(GPIO_TypeDef *GPIOx, uint32_t n);
void GPIO_AtomicClrBit(GPIO_TypeDef *GPIOx, uint32_t n);
void GPIO_AtomicInvBit(GPIO_TypeDef *GPIOx, uint32_t n);
void GPIO_AtomicSetBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
void GPIO_AtomicClrBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
void GPIO_AtomicInvBits(GPIO_TypeDef *GPIOx, uint32_t n, uint32_t w);
#endif //__SWM320_GPIO_H__
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......@@ -8,7 +8,7 @@ config BSP_DIR
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
default "../../.."
config PKGS_DIR
string
......
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