add LPC4330 BSP based on NGX xplorer development board

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2487 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/xplorer4330/applications/SConscript

+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/xplorer4330/applications/application.c

+/*
+ * File      : application.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      the first version
+ */
+
+/**
+ * @addtogroup LPC4330
+ */
+
+/*@{*/
+
+#include <rtthread.h>
+
+#ifdef RT_USING_COMPONENTS_INIT
+#include <components.h>
+#endif
+
+#include "board_ngx_xplorer_18304330.h"
+
+static void rt_init_thread_entry(void *parameter)
+{
+    Board_LED_Init();
+
+#ifdef RT_USING_COMPONENTS_INIT
+    /* initialization RT-Thread Components */
+    rt_components_init();
+#endif
+
+    while (1)
+    {
+        Board_LED_Set(0, 1);
+        rt_thread_delay(50);
+        Board_LED_Set(0, 0);
+        rt_thread_delay(50);
+    }
+}
+
+void rt_application_init(void)
+{
+    rt_thread_t tid;
+
+    tid = rt_thread_create("init",
+                           rt_init_thread_entry,
+                           RT_NULL,
+                           2048,
+                           RT_THREAD_PRIORITY_MAX / 3,
+                           20);
+
+    if (tid != RT_NULL)
+        rt_thread_startup(tid);
+}
+
+/*@}*/

bsp/xplorer4330/applications/startup.c

+/*
+ * File      : startup.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2009-01-05     Bernard      first implementation
+ * 2012-12-11     lgnq         modified for LPC4330
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "platform.h"
+
+/**
+ * @addtogroup LPC4330
+ */
+
+/*@{*/
+
+extern int  rt_application_init(void);
+
+#ifdef __CC_ARM
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define LPC4300_SRAM_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="HEAP"
+#define LPC4300_SRAM_BEGIN    (__segment_end("HEAP"))
+#else
+extern int __bss_end;
+#define LPC4300_SRAM_BEGIN    (&__bss_end)
+#endif
+
+/**
+ * This function will startup RT-Thread RTOS.
+ */
+void rtthread_startup(void)
+{
+    /* init board */
+    rt_hw_board_init();
+
+    /* show version */
+    rt_show_version();
+
+#ifdef RT_USING_HEAP
+    /* initialize memory system */
+    rt_system_heap_init((void *)LPC4300_SRAM_BEGIN, (void *)(0x10000000 + 1024*128));
+#endif
+
+    /* init scheduler system */
+    rt_system_scheduler_init();
+
+#ifdef RT_USING_DEVICE
+    /* init all device */
+    rt_device_init_all();
+#endif
+
+    /* init application */
+    rt_application_init();
+
+    /* init timer thread */
+    rt_system_timer_thread_init();
+
+    /* init idle thread */
+    rt_thread_idle_init();
+
+    /* start scheduler */
+    rt_system_scheduler_start();
+
+    /* never reach here */
+    return ;
+}
+
+int main(void)
+{
+    /* disable interrupt first */
+    rt_hw_interrupt_disable();
+
+    /* startup RT-Thread RTOS */
+    rtthread_startup();
+
+    return 0;
+}
+
+/*@}*/

bsp/xplorer4330/drivers/SConscript

+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+
+# remove no need file.
+if GetDepend('RT_USING_SERIAL') == False:
+    SrcRemove(src, 'usart.c')
+
+CPPPATH = [cwd]
+
+group = DefineGroup('drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/xplorer4330/drivers/platform.c

+/*
+ * File      : board.c
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012 RT-Thread Develop Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2012-12-13     lgnq         first implementation
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+#include "cmsis.h"
+
+#ifdef RT_USING_SERIAL
+#include "usart.h"
+#endif
+
+/**
+ * @addtogroup LPC4330
+ */
+
+/*@{*/
+
+/**
+ * This is the timer interrupt service routine.
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+/**
+ * This function will initialize the LPC4330 Xplorer board.
+ */
+void rt_hw_board_init(void)
+{
+    Board_Init();
+
+    /* Configure the SysTick - Generate interrupt @ 100 Hz*/
+    SysTick_Config(Chip_Clock_GetRate(CLK_MX_MXCORE) / 100);
+
+#ifdef RT_USING_SERIAL
+    rt_hw_serial_init();
+
+#ifdef RT_USING_CONSOLE
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+#endif
+}
+
+/*@}*/

bsp/xplorer4330/drivers/platform.h

+/*
+ * File      : platform.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ */
+
+#ifndef __PLATFORM_H__
+#define __PLATFORM_H__
+
+void rt_hw_board_init(void);
+
+#endif

bsp/xplorer4330/drivers/usart.c

+/*
+ * File      : usart.c
+ * mb9bf506r uart driver
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2012-11-30     lgnq         first  version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include "usart.h"
+#include "uart_18xx_43xx.h"
+#include "scu_18xx_43xx.h"
+
+#if defined(RT_USING_UART0)
+/* UART0 device driver structure */
+struct serial_ringbuffer uart0_int_rx;
+struct uart_device uart0 =
+{
+    LPC_USART0,
+    USART0_IRQn,
+};
+struct rt_serial_device serial0;
+
+void UART0_IRQHandler(void)
+{
+    UART_Int_Status status;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    status = Chip_UART_GetIntStatus(LPC_USART0);
+
+    /* error */
+    if (status == UART_ERROR)
+    {
+        return;
+    }
+
+    /* ready for Read Data */
+    if (status & READY_TO_RECEIVE)
+    {
+        rt_hw_serial_isr(&serial0);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(RT_USING_UART1)
+/* UART1 device driver structure */
+struct serial_ringbuffer uart1_int_rx;
+struct uart_device uart1 =
+{
+    LPC_UART1,
+    USART1_IRQn,
+};
+struct rt_serial_device serial1;
+
+void UART1_IRQHandler(void)
+{
+    UART_Int_Status status;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    status = Chip_UART_GetIntStatus(LPC_UART1);
+
+    /* error */
+    if (status == UART_ERROR)
+    {
+        return;
+    }
+
+    /* ready for Read Data */
+    if (status & READY_TO_RECEIVE)
+    {
+        rt_hw_serial_isr(&serial1);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(RT_USING_UART2)
+/* UART2 device driver structure */
+struct serial_ringbuffer uart2_int_rx;
+struct uart_device uart2 =
+{
+    LPC_USART2,
+    USART2_IRQn,
+};
+struct rt_serial_device serial2;
+
+void UART2_IRQHandler(void)
+{
+    UART_Int_Status status;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    status = Chip_UART_GetIntStatus(LPC_USART2);
+
+    /* error */
+    if (status == UART_ERROR)
+    {
+        return;
+    }
+
+    /* ready for Read Data */
+    if (status & READY_TO_RECEIVE)
+    {
+        rt_hw_serial_isr(&serial2);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+#if defined(RT_USING_UART3)
+/* UART3 device driver structure */
+struct serial_ringbuffer uart3_int_rx;
+struct uart_device uart3 =
+{
+    LPC_USART3,
+    USART3_IRQn,
+};
+struct rt_serial_device serial3;
+
+void UART3_IRQHandler(void)
+{
+    UART_Int_Status status;
+
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    status = Chip_UART_GetIntStatus(LPC_USART3);
+
+    /* error */
+    if (status == UART_ERROR)
+    {
+        return;
+    }
+
+    /* ready for Read Data */
+    if (status & READY_TO_RECEIVE)
+    {
+        rt_hw_serial_isr(&serial3);
+    }
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+#endif
+
+void uart_pin_setup(void)
+{
+#if defined(RT_USING_UART0)
+    Chip_SCU_PinMux(0x6, 4, MD_PDN, FUNC2);                   /* P6.5 : UART0_TXD */
+    Chip_SCU_PinMux(0x6, 5, MD_PLN | MD_EZI | MD_ZI, FUNC2);  /* P6.4 : UART0_RXD */
+#endif
+
+#if defined(RT_USING_UART1)
+    Chip_SCU_PinMux(0x1, 13, MD_PDN, FUNC2);                  /* P1.13 : UART1_TXD */
+    Chip_SCU_PinMux(0x1, 14, MD_PLN | MD_EZI | MD_ZI, FUNC2); /* P1.14 : UART1_RX */
+#endif
+}
+
+static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    struct uart_device *uart;
+    UART_DATABIT_Type   databit;
+    UART_STOPBIT_Type   stopbit;
+    UART_PARITY_Type    parity;
+
+    /* UART FIFO configuration Struct variable */
+    UART_FIFO_CFG_Type UARTFIFOConfigStruct;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    uart = (struct uart_device *)serial->parent.user_data;
+
+    Chip_UART_Init(uart->uart_regs);
+
+    Chip_UART_SetBaud(uart->uart_regs, cfg->baud_rate);
+
+    /* set stop bits */
+    switch (cfg->stop_bits)
+    {
+    case STOP_BITS_1:
+        stopbit = UART_STOPBIT_1;
+        break;
+    case STOP_BITS_2:
+        stopbit = UART_STOPBIT_2;
+        break;
+    default:
+        return RT_ERROR;
+    }
+
+    /* set data bits */
+    switch (cfg->data_bits)
+    {
+    case DATA_BITS_5:
+        databit = UART_DATABIT_5;
+        break;
+    case DATA_BITS_6:
+        databit = UART_DATABIT_6;
+        break;
+    case DATA_BITS_7:
+        databit = UART_DATABIT_7;
+        break;
+    case DATA_BITS_8:
+        databit = UART_DATABIT_8;
+        break;
+    default:
+        return RT_ERROR;
+    }
+
+    /* set parity */
+    switch (cfg->parity)
+    {
+    case PARITY_NONE:
+        parity = UART_PARITY_NONE;
+        break;
+    case PARITY_EVEN:
+        parity = UART_PARITY_EVEN;
+        break;
+    case PARITY_ODD:
+        parity = UART_PARITY_ODD;
+        break;
+    default:
+        return RT_ERROR;
+    }
+
+    Chip_UART_ConfigData(uart->uart_regs, databit, parity, stopbit);
+
+    /* Enable UART Transmit */
+    Chip_UART_TxCmd(uart->uart_regs, ENABLE);
+
+    Chip_UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
+
+    /* Enable DMA mode in UART */
+    UARTFIFOConfigStruct.FIFO_DMAMode = ENABLE;
+    /* Initialize FIFO for UART0 peripheral */
+    Chip_UART_FIFOConfig(uart->uart_regs, &UARTFIFOConfigStruct);
+
+    /* Enable UART Rx interrupt */
+    Chip_UART_IntConfig(uart->uart_regs, UART_INTCFG_RBR, ENABLE);
+    /* Enable UART line status interrupt */
+    Chip_UART_IntConfig(uart->uart_regs, UART_INTCFG_RLS, ENABLE);
+
+    /* Enable Interrupt for UART channel */
+    /* Priority = 1 */
+    NVIC_SetPriority(uart->irq_num, 1);
+
+    return RT_EOK;
+}
+
+static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    struct uart_device *uart;
+
+    RT_ASSERT(serial != RT_NULL);
+    uart = (struct uart_device *)serial->parent.user_data;
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        UART_DISABLE_IRQ(uart->irq_num);
+        break;
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        UART_ENABLE_IRQ(uart->irq_num);
+        break;
+    }
+
+    return (RT_EOK);
+}
+
+static int uart_putc(struct rt_serial_device *serial, char c)
+{
+    struct uart_device *uart;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    uart = (struct uart_device *)serial->parent.user_data;
+
+    /* wait send buffer is empty */
+    while (!(uart->uart_regs->LSR & UART_LSR_THRE))
+        ;
+    /* write to send buffer */
+    uart->uart_regs->THR = c & UART_THR_MASKBIT;
+
+    return (1);
+}
+
+static int uart_getc(struct rt_serial_device *serial)
+{
+    struct uart_device *uart;
+    uint8_t ch;
+
+    RT_ASSERT(serial != RT_NULL);
+    
+    uart = (struct uart_device *)serial->parent.user_data;
+
+    /* receive buffer is full */
+    if (uart->uart_regs->LSR & UART_LSR_RDR)
+    {
+        ch = uart->uart_regs->RBR & UART_RBR_MASKBIT;
+
+        return (ch);
+    }
+    else
+        return (-1);
+}
+
+static struct rt_uart_ops uart_ops =
+{
+    uart_configure,
+    uart_control,
+    uart_putc,
+    uart_getc,
+};
+
+void rt_hw_serial_init(void)
+{
+    struct serial_configure config;
+
+    config.baud_rate = BAUD_RATE_115200;
+    config.data_bits = DATA_BITS_8;
+    config.parity    = PARITY_NONE;
+    config.stop_bits = STOP_BITS_1;
+
+    uart_pin_setup();
+
+#if defined(RT_USING_UART0)
+    serial0.ops    = &uart_ops;
+    serial0.int_rx = &uart0_int_rx;
+    serial0.config = config;
+
+    /* register UART0 device */
+    rt_hw_serial_register(&serial0,
+                          "uart0",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          &uart0);
+#endif
+
+#if defined(RT_USING_UART1)
+    serial1.ops    = &uart_ops;
+    serial1.int_rx = &uart1_int_rx;
+    serial1.config = config;
+
+    /* register UART1 device */
+    rt_hw_serial_register(&serial1,
+                          "uart1",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          &uart1);
+#endif
+
+#if defined(RT_USING_UART2)
+    serial2.ops    = &uart_ops;
+    serial2.int_rx = &uart2_int_rx;
+    serial2.config = config;
+
+    /* register UART2 device */
+    rt_hw_serial_register(&serial2,
+                          "uart2",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          &uart2);
+#endif
+
+#if defined(RT_USING_UART3)
+    serial3.ops    = &uart_ops;
+    serial3.int_rx = &uart3_int_rx;
+    serial3.config = config;
+
+    /* register UART3 device */
+    rt_hw_serial_register(&serial3,
+                          "uart3",
+                          RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                          &uart3);
+#endif
+}

bsp/xplorer4330/drivers/usart.h

+/*
+ * File      : usart.h
+ * This file is part of RT-Thread RTOS
+ * COPYRIGHT (C) 2006, RT-Thread Development Team
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rt-thread.org/license/LICENSE
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2011-05-15     lgnq         modified according bernard's implementaion.
+ */
+
+#ifndef __USART_H__
+#define __USART_H__
+
+#include <rtthread.h>
+
+#include "chip_lpc43xx.h"
+#include "cmsis.h"
+
+/**
+ *  Enable/DISABLE Interrupt Controller
+ */
+#define UART_ENABLE_IRQ(n)            NVIC_EnableIRQ((n))
+#define UART_DISABLE_IRQ(n)           NVIC_DisableIRQ((n))
+
+struct uart_device
+{
+    LPC_USART_Type *uart_regs;
+
+    /* irq number */
+    IRQn_Type irq_num;
+};
+
+void rt_hw_serial_init(void);
+
+#endif

bsp/xplorer4330/libraries/SConscript

+# for module compiling
+import os
+from building import *
+
+cwd  = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/xplorer4330/libraries/lpc_board/SConscript

+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+
+#src = Glob('board_common/*.c')
+src  = []
+path = [cwd + '/board_common']
+
+if rtconfig.LPC43xx_BOARD == 'NGX_XPLORER_4330':
+    src  += ['boards_18xx_43xx/ngx_xplorer_18304330/board_ngx_xplorer_18304330.c',
+             'boards_18xx_43xx/ngx_xplorer_18304330/sysinit_ngx_xplorer_18304330.c']
+    path += [cwd + '/boards_18xx_43xx/ngx_xplorer_18304330',
+             cwd + '/boards_18xx_43xx/ngx_xplorer_18304330/ngx_xplorer_4330']
+elif rtconfig.LPC43xx_BOARD == 'NGX_XPLORER_1830':
+    src  += ['boards_18xx_43xx/ngx_xplorer_18304330/board_ngx_xplorer_18304330.c',
+             'boards_18xx_43xx/ngx_xplorer_18304330/sysinit_ngx_xplorer_18304330.c']
+    path += [cwd + '/boards_18xx_43xx/ngx_xplorer_18304330',
+             cwd + '/boards_18xx_43xx/ngx_xplorer_18304330/ngx_xplorer_1830']
+elif rtconfig.LPC43xx_BOARD == 'KEIL_MCB_4357':
+    src  += ['boards_18xx_43xx/keil_mcb_18574357/board_keil_mcb_18574357.c',
+             'boards_18xx_43xx/keil_mcb_18574357/sysinit_keil_mcb_18574357.c']
+    path += [cwd + '/boards_18xx_43xx/keil_mcb_18574357',
+             cwd + '/boards_18xx_43xx/keil_mcb_18574357/keil_mcb_4357']
+elif rtconfig.LPC43xx_BOARD == 'KEIL_MCB_1857':
+    src  += ['boards_18xx_43xx/keil_mcb_18574357/board_keil_mcb_18574357.c',
+             'boards_18xx_43xx/keil_mcb_18574357/sysinit_keil_mcb_18574357.c']
+    path += [cwd + '/boards_18xx_43xx/keil_mcb_18574357',
+             cwd + '/boards_18xx_43xx/keil_mcb_18574357/keil_mcb_1857']
+elif rtconfig.LPC43xx_BOARD == 'HITEX_EVA_4350':
+    src  += ['boards_18xx_43xx/hitex_eva_18504350/board_hitex_eva_18504350.c',
+             'boards_18xx_43xx/hitex_eva_18504350/sysinit_hitex_eva_18504350.c']
+    path += [cwd + '/boards_18xx_43xx/hitex_eva_18504350',
+             cwd + '/boards_18xx_43xx/hitex_eva_18504350/hitex_eva_4350']
+elif rtconfig.LPC43xx_BOARD == 'HITEX_EVA_1850':
+    src  += ['boards_18xx_43xx/hitex_eva_18504350/board_hitex_eva_18504350.c',
+             'boards_18xx_43xx/hitex_eva_18504350/sysinit_hitex_eva_18504350.c']
+    path += [cwd + '/boards_18xx_43xx/hitex_eva_18504350',
+             cwd + '/boards_18xx_43xx/hitex_eva_18504350/hitex_eva_1850']
+
+group = DefineGroup('lpc_board', src, depend = [''], CPPPATH = path)
+
+Return('group')

bsp/xplorer4330/libraries/lpc_board/board_common/Retarget.c

+/*
+ * @brief	IO redirection support
+ *
+ * This file adds re-direction support to the library for various
+ * projects. It can be configured in one of 3 ways - no redirection,
+ * redirection via a UART, or redirection via semihosting. If DEBUG
+ * is not defined, all printf statements will do nothing with the
+ * output being throw away. If DEBUG is defined, then the choice of
+ * output is selected by the DEBUG_SEMIHOSTING define. If the
+ * DEBUG_SEMIHOSTING is not defined, then output is redirected via
+ * the UART. If DEBUG_SEMIHOSTING is defined, then output will be
+ * attempted to be redirected via semihosting. If the UART method
+ * is used, then the Board_UARTPutChar and Board_UARTGetChar
+ * functions must be defined to be used by this driver and the UART
+ * must already be initialized to the correct settings.
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#include "sys_config.h"
+#include "board.h"
+
+/* Keil (Realview) support */
+#if defined(__CC_ARM)
+
+#include <stdio.h>
+#include <rt_misc.h>
+
+#if defined(DEBUG)
+#if defined(DEBUG_SEMIHOSTING)
+#define ITM_Port8(n)    (*((volatile unsigned char *) (0xE0000000 + 4 * n)))
+#define ITM_Port16(n)   (*((volatile unsigned short *) (0xE0000000 + 4 * n)))
+#define ITM_Port32(n)   (*((volatile unsigned long *) (0xE0000000 + 4 * n)))
+
+#define DEMCR           (*((volatile unsigned long *) (0xE000EDFC)))
+#define TRCENA          0x01000000
+
+/* Write to SWO */
+void _ttywrch(int ch)
+{
+	if (DEMCR & TRCENA) {
+		while (ITM_Port32(0) == 0) {}
+		ITM_Port8(0) = ch;
+	}
+}
+
+#else
+static INLINE void BoardOutChar(char ch)
+{
+	Board_UARTPutChar(ch);
+}
+
+#endif /* defined(DEBUG_SEMIHOSTING) */
+#endif /* defined(DEBUG) */
+
+struct __FILE {
+	int handle;
+};
+
+FILE __stdout;
+FILE __stdin;
+FILE __stderr;
+
+void *_sys_open(const char *name, int openmode)
+{
+	return 0;
+}
+
+int fputc(int c, FILE *f)
+{
+#if defined(DEBUG)
+#if defined(DEBUG_SEMIHOSTING)
+	_ttywrch(c);
+#else
+	BoardOutChar((char) c);
+#endif
+#endif
+	return 0;
+}
+
+int fgetc(FILE *f)
+{
+#if defined(DEBUG) && !defined(DEBUG_SEMIHOSTING)
+	return Board_UARTGetChar();
+#else
+	return 0;
+#endif
+}
+
+int ferror(FILE *f)
+{
+	return EOF;
+}
+
+void _sys_exit(int return_code)
+{
+label:  goto label;	/* endless loop */
+}
+
+#endif /* defined (__CC_ARM) */
+
+/* IAR support */
+#if defined(__ICCARM__)
+/*******************
+ *
+ * Copyright 1998-2003 IAR Systems.  All rights reserved.
+ *
+ * $Revision: 30870 $
+ *
+ * This is a template implementation of the "__write" function used by
+ * the standard library.  Replace it with a system-specific
+ * implementation.
+ *
+ * The "__write" function should output "size" number of bytes from
+ * "buffer" in some application-specific way.  It should return the
+ * number of characters written, or _LLIO_ERROR on failure.
+ *
+ * If "buffer" is zero then __write should perform flushing of
+ * internal buffers, if any.  In this case "handle" can be -1 to
+ * indicate that all handles should be flushed.
+ *
+ * The template implementation below assumes that the application
+ * provides the function "MyLowLevelPutchar".  It should return the
+ * character written, or -1 on failure.
+ *
+ ********************/
+
+#include <yfuns.h>
+
+_STD_BEGIN
+
+#pragma module_name = "?__write"
+
+#if defined(DEBUG)
+#if defined(DEBUG_SEMIHOSTING)
+#error Semihosting support not yet working on IAR
+#endif /* defined(DEBUG_SEMIHOSTING) */
+#endif /* defined(DEBUG) */
+
+/*
+   If the __write implementation uses internal buffering, uncomment
+   the following line to ensure that we are called with "buffer" as 0
+   (i.e. flush) when the application terminates. */
+size_t __write(int handle, const unsigned char *buffer, size_t size)
+{
+#if defined(DEBUG)
+	size_t nChars = 0;
+
+	if (buffer == 0) {
+		/*
+		   This means that we should flush internal buffers.  Since we
+		   don't we just return.  (Remember, "handle" == -1 means that all
+		   handles should be flushed.)
+		 */
+		return 0;
+	}
+
+	/* This template only writes to "standard out" and "standard err",
+	   for all other file handles it returns failure. */
+	if (( handle != _LLIO_STDOUT) && ( handle != _LLIO_STDERR) ) {
+		return _LLIO_ERROR;
+	}
+
+	for ( /* Empty */; size != 0; --size) {
+		Board_UARTPutChar(*buffer++);
+		++nChars;
+	}
+
+	return nChars;
+#else
+	return size;
+#endif /* defined(DEBUG) */
+}
+
+_STD_END
+
+#endif /* defined (__ICCARM__) */
+
+#if defined( __GNUC__ )
+/* Include stdio.h to pull in __REDLIB_INTERFACE_VERSION__ */
+#include <stdio.h>
+
+#if (__REDLIB_INTERFACE_VERSION__ >= 20000)
+/* We are using new Redlib_v2 semihosting interface */
+	#define WRITEFUNC __sys_write
+	#define READFUNC __sys_readc
+#else
+/* We are using original Redlib semihosting interface */
+	#define WRITEFUNC __write
+	#define READFUNC __readc
+#endif
+
+#if defined(DEBUG)
+#if defined(DEBUG_SEMIHOSTING)
+/* Do nothing, semihosting is enabled by default in LPCXpresso */
+#endif /* defined(DEBUG_SEMIHOSTING) */
+#endif /* defined(DEBUG) */
+
+#if !defined(DEBUG_SEMIHOSTING)
+int WRITEFUNC(int iFileHandle, char *pcBuffer, int iLength)
+{
+#if defined(DEBUG)
+	unsigned int i;
+	for (i = 0; i < iLength; i++) {
+		Board_UARTPutChar(pcBuffer[i]);
+	}
+#endif
+
+	return iLength;
+}
+
+/* Called by bottom level of scanf routine within RedLib C library to read
+   a character. With the default semihosting stub, this would read the character
+   from the debugger console window (which acts as stdin). But this version reads
+   the character from the LPC1768/RDB1768 UART. */
+int READFUNC(void)
+{
+#if defined(DEBUG)
+	char c = Board_UARTGetChar();
+	return (int) c;
+
+#else
+	return (int) -1;
+#endif
+}
+
+#endif /* !defined(DEBUG_SEMIHOSTING) */
+#endif /* defined ( __GNUC__ ) */

bsp/xplorer4330/libraries/lpc_board/board_common/board_api.h

+/*
+ * @brief Common board API functions
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __BOARD_API_H_
+#define __BOARD_API_H_
+
+#include "lpc_types.h"
+#include <stdio.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @defgroup BOARD_COMMON_API BOARD: Common board functions
+ * @ingroup BOARD_Common
+ * This file contains common board definitions that are shared across
+ * boards and devices. All of these functions do not need to be
+ * impemented for a specific board, but if they are implemented, they
+ * should use this API standard.
+ * @{
+ */
+
+/**
+ * @brief	Set up and initialize all required blocks and functions related to the board hardware.
+ * @return	None
+ */
+void Board_Init(void);
+
+/**
+ * @brief	Initializes board UART for output, required for printf redirection
+ * @return	None
+ */
+void Board_Debug_Init(void);
+
+/**
+ * @brief	Sends a single character on the UART, required for printf redirection
+ * @param	ch	: character to send
+ * @return	None
+ */
+void Board_UARTPutChar(char ch);
+
+/**
+ * @brief	Get a single character from the UART, required for scanf input
+ * @return	EOF if not character was received, or character value
+ */
+int Board_UARTGetChar(void);
+
+/**
+ * @brief	Prints a string to the UART
+ * @param	str	: Terminated string to output
+ * @return	None
+ */
+void Board_UARTPutSTR(char *str);
+
+/**
+ * @brief	Initializes board LED(s)
+ * @return	None
+ */
+void Board_LED_Init(void);
+
+/**
+ * @brief	Sets the state of a board LED to on or off
+ * @param	LEDNumber	: LED number to set state for
+ * @param	State		: true for on, false for off
+ * @return	None
+ */
+void Board_LED_Set(uint8_t LEDNumber, bool State);
+
+/**
+ * @brief	Returns the current state of a board LED
+ * @param	LEDNumber	: LED number to set state for
+ * @return	true if the LED is on, otherwise false
+ */
+bool Board_LED_Test(uint8_t LEDNumber);
+
+/**
+ * @brief	Toggles the current state of a board LED
+ * @param	LEDNumber	: LED number to change state for
+ * @return	None
+ */
+STATIC INLINE void Board_LED_Toggle(uint8_t LEDNumber)
+{
+	Board_LED_Set(LEDNumber, !Board_LED_Test(LEDNumber));
+}
+
+
+/**
+ * @brief	Current system clock rate, mainly used for sysTick
+ */
+extern uint32_t SystemCoreClock;
+
+/**
+ * @brief	Update system core clock rate, should be called if the
+ *			system has a clock rate change
+ * @return	None
+ */
+void SystemCoreClockUpdate(void);
+
+/**
+ * @brief	Turn on Board LCD Backlight
+ * @param	Intensity	: Backlight intensity (0 = off, >=1 = on)
+ * @return	None
+ * On boards where a GPIO is used to control backlight on/off state, a '0' or '1'
+ * value will turn off or on the backlight. On some boards, a non-0 value will
+ * control backlight intensity via a PWN. For PWM systems, the intensity value
+ * is a percentage value between 0 and 100%.
+ */
+void Board_LCD_Set_Backlight(uint8_t Intensity);
+
+/**
+ * @brief Function prototype for a MS delay function. Board layers or example code may
+ *        define this function as needed.
+ */
+typedef void (*p_msDelay_func_t)(uint32_t);
+
+/* The DEBUG* functions are selected based on system configuration.
+   Code that uses the DEBUG* functions will have their I/O routed to
+   the UART, semihosting, or nowhere. */
+#if defined(DEBUG)
+#if defined(DEBUG_SEMIHOSTING)
+#define DEBUGINIT()
+#define DEBUGOUT(...) printf(__VA_ARGS__)
+#define DEBUGSTR(str) printf(str)
+#define DEBUGIN() (int) EOF
+
+#else
+#define DEBUGINIT() Board_Debug_Init()
+#define DEBUGOUT(...) printf(__VA_ARGS__)
+#define DEBUGSTR(str) Board_UARTPutSTR(str)
+#define DEBUGIN() Board_UARTGetChar()
+#endif /* defined(DEBUG_SEMIHOSTING) */
+
+#else
+#define DEBUGINIT()
+#define DEBUGOUT(...)
+#define DEBUGSTR(str)
+#define DEBUGIN() (int) EOF
+#endif /* defined(DEBUG) */
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BOARD_API_H_ */

bsp/xplorer4330/libraries/lpc_board/board_common/lpc_phy.h

+/*
+ * @brief Common PHY functions
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __LPC_PHY_H_
+#define __LPC_PHY_H_
+
+#include "board.h"
+#include "chip.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @defgroup BOARD_PHY BOARD: Board specific PHY drivers
+ * @ingroup BOARD_Common
+ * The simple PHY function API provides simple non-blocking PHY status
+ * monitoring and initialization support for various Ethernet PHYs.
+ * To initialize the PHY, call lpc_phy_init() once. lpc_phy_init() requires
+ * several standard functions from the MAC driver for interfacing to the
+ * PHY via a MII link (Chip_ENET_Start_MII_Write(), Chip_ENET_Is_MII_Busy(),
+ * Chip_ENET_Start_MII_Read(), and Chip_ENET_Read_MII_Data()).
+ *
+ * Once initialized, just preiodically call the lpcPHYStsPoll() function
+ * from the background loop or a thread and monitor the returned status
+ * to determine if the PHY state has changed and the current PHY state.
+ * @{
+ */
+#define PHY_LINK_ERROR     (1 << 0)	/*!< PHY status bit for link error */
+#define PHY_LINK_BUSY      (1 << 1)	/*!< PHY status bit for MII link busy */
+#define PHY_LINK_CHANGED   (1 << 2)	/*!< PHY status bit for changed state (not persistent) */
+#define PHY_LINK_CONNECTED (1 << 3)	/*!< PHY status bit for connected state */
+#define PHY_LINK_SPEED100  (1 << 4)	/*!< PHY status bit for 100Mbps mode */
+#define PHY_LINK_FULLDUPLX (1 << 5)	/*!< PHY status bit for full duplex mode */
+
+/**
+ * @brief	Phy status update state machine
+ * @return	An Or'ed value of PHY_LINK_* statuses
+ * This function can be called at any rate and will poll the the PHY status. Multiple
+ * calls may be needed to determine PHY status.
+ */
+uint32_t lpcPHYStsPoll(void);
+
+/**
+ * @brief	Initialize the PHY
+ * @param	rmii			: Initializes PHY for RMII mode if true, MII if false
+ * @param	pDelayMsFunc	: Delay function (in mS) used for this driver
+ * @return	PHY_LINK_ERROR or 0 on success
+ * This function initializes the PHY. It will block until complete. It will not
+ * wait for the PHY to detect a connected cable and remain busy. Use lpcPHYStsPoll to
+ * detect cable insertion.
+ */
+uint32_t lpc_phy_init(bool rmii, p_msDelay_func_t pDelayMsFunc);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __LPC_PHY_H_ */

bsp/xplorer4330/libraries/lpc_board/board_common/lpc_phy_dp83848.c

+/*
+ * @brief Mational DP83848 simple PHY driver
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#include "chip.h"
+#include "lpc_phy.h"
+
+/** @defgroup DP83848_PHY	BOARD: PHY status and control driver for the DP83848
+ * @ingroup BOARD_PHY
+ * Various functions for controlling and monitoring the status of the
+ * DP83848 PHY.
+ * @{
+ */
+
+/** @brief  DP83848 PHY register offsets */
+#define DP8_BMCR_REG        0x0	/*!< Basic Mode Control Register */
+#define DP8_BMSR_REG        0x1	/*!< Basic Mode Status Reg */
+#define DP8_ANADV_REG       0x4	/*!< Auto_Neg Advt Reg  */
+#define DP8_ANLPA_REG       0x5	/*!< Auto_neg Link Partner Ability Reg */
+#define DP8_ANEEXP_REG      0x6	/*!< Auto-neg Expansion Reg  */
+#define DP8_PHY_STAT_REG    0x10/*!< PHY Status Register  */
+#define DP8_PHY_INT_CTL_REG 0x11/*!< PHY Interrupt Control Register */
+#define DP8_PHY_RBR_REG     0x17/*!< PHY RMII and Bypass Register  */
+#define DP8_PHY_STS_REG     0x19/*!< PHY Status Register  */
+
+/* DP83848 Control register definitions */
+#define DP8_RESET          (1 << 15)	/*!< 1= S/W Reset */
+#define DP8_LOOPBACK       (1 << 14)	/*!< 1=loopback Enabled */
+#define DP8_SPEED_SELECT   (1 << 13)	/*!< 1=Select 100MBps */
+#define DP8_AUTONEG        (1 << 12)	/*!< 1=Enable auto-negotiation */
+#define DP8_POWER_DOWN     (1 << 11)	/*!< 1=Power down PHY */
+#define DP8_ISOLATE        (1 << 10)	/*!< 1=Isolate PHY */
+#define DP8_RESTART_AUTONEG (1 << 9)	/*!< 1=Restart auto-negoatiation */
+#define DP8_DUPLEX_MODE    (1 << 8)		/*!< 1=Full duplex mode */
+#define DP8_COLLISION_TEST (1 << 7)		/*!< 1=Perform collsion test */
+
+/* DP83848 Status register definitions */
+#define DP8_100BASE_T4     (1 << 15)	/*!< T4 mode */
+#define DP8_100BASE_TX_FD  (1 << 14)	/*!< 100MBps full duplex */
+#define DP8_100BASE_TX_HD  (1 << 13)	/*!< 100MBps half duplex */
+#define DP8_10BASE_T_FD    (1 << 12)	/*!< 100Bps full duplex */
+#define DP8_10BASE_T_HD    (1 << 11)	/*!< 10MBps half duplex */
+#define DP8_MF_PREAMB_SUPPR (1 << 6)	/*!< Preamble suppress */
+#define DP8_AUTONEG_COMP   (1 << 5)		/*!< Auto-negotation complete */
+#define DP8_RMT_FAULT      (1 << 4)		/*!< Fault */
+#define DP8_AUTONEG_ABILITY (1 << 3)	/*!< Auto-negotation supported */
+#define DP8_LINK_STATUS    (1 << 2)		/*!< 1=Link active */
+#define DP8_JABBER_DETECT  (1 << 1)		/*!< Jabber detect */
+#define DP8_EXTEND_CAPAB   (1 << 0)		/*!< Supports extended capabilities */
+
+/* DP83848 PHY RBR MII dode definitions */
+#define DP8_RBR_RMII_MODE  (1 << 5)		/*!< Use RMII mode */
+
+/* DP83848 PHY status definitions */
+#define DP8_REMOTEFAULT    (1 << 6)		/*!< Remote fault */
+#define DP8_FULLDUPLEX     (1 << 2)		/*!< 1=full duplex */
+#define DP8_SPEED10MBPS    (1 << 1)		/*!< 1=10MBps speed */
+#define DP8_VALID_LINK     (1 << 0)		/*!< 1=Link active */
+
+/* DP83848 PHY ID register definitions */
+#define DP8_PHYID1_OUI     0x2000		/*!< Expected PHY ID1 */
+#define DP8_PHYID2_OUI     0x5c90		/*!< Expected PHY ID2 */
+
+/* DP83848 PHY update flags */
+static uint32_t physts, olddphysts;
+
+/* PHY update counter for state machine */
+static int32_t phyustate;
+
+/* Pointer to delay function used for this driver */
+static p_msDelay_func_t pDelayMs;
+
+/* Write to the PHY. Will block for delays based on the pDelayMs function. Returns
+   true on success, or false on failure */
+static Status lpc_mii_write(uint8_t reg, uint16_t data)
+{
+	Status sts = ERROR;
+	int32_t mst = 250;
+
+	/* Write value for register */
+	Chip_ENET_Start_MII_Write(reg, data);
+
+	/* Wait for unbusy status */
+	while (mst > 0) {
+		if (Chip_ENET_Is_MII_Busy()) {
+			mst--;
+			pDelayMs(1);
+		}
+		else {
+			mst = 0;
+			sts = SUCCESS;
+		}
+	}
+
+	return sts;
+}
+
+/* Read from the PHY. Will block for delays based on the pDelayMs function. Returns
+   true on success, or false on failure */
+static Status lpc_mii_read(uint8_t reg, uint16_t *data)
+{
+	Status sts = ERROR;
+	int32_t mst = 250;
+
+	/* Start register read */
+	Chip_ENET_Start_MII_Read(reg);
+
+	/* Wait for unbusy status */
+	while (mst > 0) {
+		if (!Chip_ENET_Is_MII_Busy()) {
+			mst = 0;
+			*data = Chip_ENET_Read_MII_Data();
+			sts = SUCCESS;
+		}
+		else {
+			mst--;
+			pDelayMs(1);
+		}
+	}
+
+	return sts;
+}
+
+/* Update PHY status from passed value */
+static void lpc_update_phy_sts(uint16_t linksts)
+{
+	/* Update link active status */
+	if (linksts & DP8_VALID_LINK) {
+		physts |= PHY_LINK_CONNECTED;
+	}
+	else {
+		physts &= ~PHY_LINK_CONNECTED;
+	}
+
+	/* Full or half duplex */
+	if (linksts & DP8_FULLDUPLEX) {
+		physts |= PHY_LINK_FULLDUPLX;
+	}
+	else {
+		physts &= ~PHY_LINK_FULLDUPLX;
+	}
+
+	/* Configure 100MBit/10MBit mode. */
+	if (linksts & DP8_SPEED10MBPS) {
+		physts &= ~PHY_LINK_SPEED100;
+	}
+	else {
+		physts |= PHY_LINK_SPEED100;
+	}
+
+	/* If the status has changed, indicate via change flag */
+	if ((physts & (PHY_LINK_SPEED100 | PHY_LINK_FULLDUPLX | PHY_LINK_CONNECTED)) !=
+		(olddphysts & (PHY_LINK_SPEED100 | PHY_LINK_FULLDUPLX | PHY_LINK_CONNECTED))) {
+		olddphysts = physts;
+		physts |= PHY_LINK_CHANGED;
+	}
+}
+
+/* Initialize the DP83848 PHY */
+uint32_t lpc_phy_init(bool rmii, p_msDelay_func_t pDelayMsFunc)
+{
+	uint16_t tmp;
+	int32_t i;
+
+	pDelayMs = pDelayMsFunc;
+
+	/* Initial states for PHY status and state machine */
+	olddphysts = physts = phyustate = 0;
+
+	/* Only first read and write are checked for failure */
+	/* Put the DP83848C in reset mode and wait for completion */
+	if (lpc_mii_write(DP8_BMCR_REG, DP8_RESET) != SUCCESS) {
+		return ERROR;
+	}
+	i = 400;
+	while (i > 0) {
+		pDelayMs(1);
+		if (lpc_mii_read(DP8_BMCR_REG, &tmp) != SUCCESS) {
+			return ERROR;
+		}
+
+		if (!(tmp & (DP8_RESET | DP8_POWER_DOWN))) {
+			i = -1;
+		}
+		else {
+			i--;
+		}
+	}
+	/* Timeout? */
+	if (i == 0) {
+		return ERROR;
+	}
+
+#if 0
+	/* Setup link based on configuration options */
+#if PHY_USE_AUTONEG == 1
+	tmp = DP8_AUTONEG;
+#else
+	tmp = 0;
+#endif
+#if PHY_USE_100MBS == 1
+	tmp |= DP8_SPEED_SELECT;
+#endif
+#if PHY_USE_FULL_DUPLEX == 1
+	tmp |= DP8_DUPLEX_MODE;
+#endif
+
+#else
+	tmp = DP8_AUTONEG;
+#endif
+
+	lpc_mii_write(DP8_BMCR_REG, tmp);
+
+	/* Enable RMII mode for PHY */
+	if (rmii) {
+		lpc_mii_write(DP8_PHY_RBR_REG, DP8_RBR_RMII_MODE);
+	}
+
+	/* The link is not set active at this point, but will be detected
+	   later */
+
+	return SUCCESS;
+}
+
+/* Phy status update state machine */
+uint32_t lpcPHYStsPoll(void)
+{
+	switch (phyustate) {
+	default:
+	case 0:
+		/* Read BMSR to clear faults */
+		Chip_ENET_Start_MII_Read(DP8_PHY_STAT_REG);
+		physts &= ~PHY_LINK_CHANGED;
+		physts = physts | PHY_LINK_BUSY;
+		phyustate = 1;
+		break;
+
+	case 1:
+		/* Wait for read status state */
+		if (!Chip_ENET_Is_MII_Busy()) {
+			/* Update PHY status */
+			physts &= ~PHY_LINK_BUSY;
+			lpc_update_phy_sts(Chip_ENET_Read_MII_Data());
+			phyustate = 0;
+		}
+		break;
+	}
+
+	return physts;
+}
+
+/**
+ * @}
+ */

bsp/xplorer4330/libraries/lpc_board/board_common/lpc_phy_smsc87x0.c

+/*
+ * @brief SMSC 87x0 simple PHY driver
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#include "chip.h"
+#include "lpc_phy.h"
+
+/** @defgroup SMSC87X0_PHY BOARD: PHY status and control driver for the SMSC 87x0
+ * @ingroup BOARD_PHY
+ * Various functions for controlling and monitoring the status of the
+ * SMSC 87x0 PHY.
+ * @{
+ */
+
+/* LAN8720 PHY register offsets */
+#define LAN8_BCR_REG        0x0	/*!< Basic Control Register */
+#define LAN8_BSR_REG        0x1	/*!< Basic Status Reg */
+#define LAN8_PHYID1_REG     0x2	/*!< PHY ID 1 Reg  */
+#define LAN8_PHYID2_REG     0x3	/*!< PHY ID 2 Reg */
+#define LAN8_PHYSPLCTL_REG  0x1F/*!< PHY special control/status Reg */
+
+/* LAN8720 BCR register definitions */
+#define LAN8_RESET          (1 << 15)	/*!< 1= S/W Reset */
+#define LAN8_LOOPBACK       (1 << 14)	/*!< 1=loopback Enabled */
+#define LAN8_SPEED_SELECT   (1 << 13)	/*!< 1=Select 100MBps */
+#define LAN8_AUTONEG        (1 << 12)	/*!< 1=Enable auto-negotiation */
+#define LAN8_POWER_DOWN     (1 << 11)	/*!< 1=Power down PHY */
+#define LAN8_ISOLATE        (1 << 10)	/*!< 1=Isolate PHY */
+#define LAN8_RESTART_AUTONEG (1 << 9)	/*!< 1=Restart auto-negoatiation */
+#define LAN8_DUPLEX_MODE    (1 << 8)	/*!< 1=Full duplex mode */
+
+/* LAN8720 BSR register definitions */
+#define LAN8_100BASE_T4     (1 << 15)	/*!< T4 mode */
+#define LAN8_100BASE_TX_FD  (1 << 14)	/*!< 100MBps full duplex */
+#define LAN8_100BASE_TX_HD  (1 << 13)	/*!< 100MBps half duplex */
+#define LAN8_10BASE_T_FD    (1 << 12)	/*!< 100Bps full duplex */
+#define LAN8_10BASE_T_HD    (1 << 11)	/*!< 10MBps half duplex */
+#define LAN8_AUTONEG_COMP   (1 << 5)	/*!< Auto-negotation complete */
+#define LAN8_RMT_FAULT      (1 << 4)	/*!< Fault */
+#define LAN8_AUTONEG_ABILITY (1 << 3)	/*!< Auto-negotation supported */
+#define LAN8_LINK_STATUS    (1 << 2)	/*!< 1=Link active */
+#define LAN8_JABBER_DETECT  (1 << 1)	/*!< Jabber detect */
+#define LAN8_EXTEND_CAPAB   (1 << 0)	/*!< Supports extended capabilities */
+
+/* LAN8720 PHYSPLCTL status definitions */
+#define LAN8_SPEEDMASK      (7 << 2)	/*!< Speed and duplex mask */
+#define LAN8_SPEED100F      (6 << 2)	/*!< 100BT full duplex */
+#define LAN8_SPEED10F       (5 << 2)	/*!< 10BT full duplex */
+#define LAN8_SPEED100H      (2 << 2)	/*!< 100BT half duplex */
+#define LAN8_SPEED10H       (1 << 2)	/*!< 10BT half duplex */
+
+/* LAN8720 PHY ID 1/2 register definitions */
+#define LAN8_PHYID1_OUI     0x0007		/*!< Expected PHY ID1 */
+#define LAN8_PHYID2_OUI     0xC0F0		/*!< Expected PHY ID2, except last 4 bits */
+
+/* DP83848 PHY update flags */
+static uint32_t physts, olddphysts;
+
+/* PHY update counter for state machine */
+static int32_t phyustate;
+
+/* Pointer to delay function used for this driver */
+static p_msDelay_func_t pDelayMs;
+
+/* Write to the PHY. Will block for delays based on the pDelayMs function. Returns
+   true on success, or false on failure */
+static Status lpc_mii_write(uint8_t reg, uint16_t data)
+{
+	Status sts = ERROR;
+	int32_t mst = 250;
+
+	/* Write value for register */
+	Chip_ENET_Start_MII_Write(reg, data);
+
+	/* Wait for unbusy status */
+	while (mst > 0) {
+		if (Chip_ENET_Is_MII_Busy()) {
+			mst--;
+			pDelayMs(1);
+		}
+		else {
+			mst = 0;
+			sts = SUCCESS;
+		}
+	}
+
+	return sts;
+}
+
+/* Read from the PHY. Will block for delays based on the pDelayMs function. Returns
+   true on success, or false on failure */
+static Status lpc_mii_read(uint8_t reg, uint16_t *data)
+{
+	Status sts = ERROR;
+	int32_t mst = 250;
+
+	/* Start register read */
+	Chip_ENET_Start_MII_Read(reg);
+
+	/* Wait for unbusy status */
+	while (mst > 0) {
+		if (!Chip_ENET_Is_MII_Busy()) {
+			mst = 0;
+			*data = Chip_ENET_Read_MII_Data();
+			sts = SUCCESS;
+		}
+		else {
+			mst--;
+			pDelayMs(1);
+		}
+	}
+
+	return sts;
+}
+
+/* Update PHY status from passed value */
+static void smsc_update_phy_sts(uint16_t linksts, uint16_t sdsts)
+{
+	/* Update link active status */
+	if (linksts & LAN8_LINK_STATUS) {
+		physts |= PHY_LINK_CONNECTED;
+	}
+	else {
+		physts &= ~PHY_LINK_CONNECTED;
+	}
+
+	switch (sdsts & LAN8_SPEEDMASK) {
+	case LAN8_SPEED100F:
+	default:
+		physts |= PHY_LINK_SPEED100;
+		physts |= PHY_LINK_FULLDUPLX;
+		break;
+
+	case LAN8_SPEED10F:
+		physts &= ~PHY_LINK_SPEED100;
+		physts |= PHY_LINK_FULLDUPLX;
+		break;
+
+	case LAN8_SPEED100H:
+		physts |= PHY_LINK_SPEED100;
+		physts &= ~PHY_LINK_FULLDUPLX;
+		break;
+
+	case LAN8_SPEED10H:
+		physts &= ~PHY_LINK_SPEED100;
+		physts &= ~PHY_LINK_FULLDUPLX;
+		break;
+	}
+
+	/* If the status has changed, indicate via change flag */
+	if ((physts & (PHY_LINK_SPEED100 | PHY_LINK_FULLDUPLX | PHY_LINK_CONNECTED)) !=
+		(olddphysts & (PHY_LINK_SPEED100 | PHY_LINK_FULLDUPLX | PHY_LINK_CONNECTED))) {
+		olddphysts = physts;
+		physts |= PHY_LINK_CHANGED;
+	}
+}
+
+/* Initialize the SMSC 87x0 PHY */
+uint32_t lpc_phy_init(bool rmii, p_msDelay_func_t pDelayMsFunc)
+{
+	uint16_t tmp;
+	int32_t i;
+
+	pDelayMs = pDelayMsFunc;
+
+	/* Initial states for PHY status and state machine */
+	olddphysts = physts = phyustate = 0;
+
+	/* Only first read and write are checked for failure */
+	/* Put the DP83848C in reset mode and wait for completion */
+	if (lpc_mii_write(LAN8_BCR_REG, LAN8_RESET) != SUCCESS) {
+		return ERROR;
+	}
+	i = 400;
+	while (i > 0) {
+		pDelayMs(1);
+		if (lpc_mii_read(LAN8_BCR_REG, &tmp) != SUCCESS) {
+			return ERROR;
+		}
+
+		if (!(tmp & (LAN8_RESET | LAN8_POWER_DOWN))) {
+			i = -1;
+		}
+		else {
+			i--;
+		}
+	}
+	/* Timeout? */
+	if (i == 0) {
+		return ERROR;
+	}
+
+	/* Setup link */
+	lpc_mii_write(LAN8_BCR_REG, LAN8_AUTONEG);
+
+	/* The link is not set active at this point, but will be detected
+	   later */
+
+	return SUCCESS;
+}
+
+/* Phy status update state machine */
+uint32_t lpcPHYStsPoll(void)
+{
+	static uint16_t sts;
+
+	switch (phyustate) {
+	default:
+	case 0:
+		/* Read BMSR to clear faults */
+		Chip_ENET_Start_MII_Read(LAN8_BSR_REG);
+		physts &= ~PHY_LINK_CHANGED;
+		physts = physts | PHY_LINK_BUSY;
+		phyustate = 1;
+		break;
+
+	case 1:
+		/* Wait for read status state */
+		if (!Chip_ENET_Is_MII_Busy()) {
+			/* Get PHY status with link state */
+			sts = Chip_ENET_Read_MII_Data();
+			Chip_ENET_Start_MII_Read(LAN8_PHYSPLCTL_REG);
+			phyustate = 2;
+		}
+		break;
+
+	case 2:
+		/* Wait for read status state */
+		if (!Chip_ENET_Is_MII_Busy()) {
+			/* Update PHY status */
+			physts &= ~PHY_LINK_BUSY;
+			smsc_update_phy_sts(sts, Chip_ENET_Read_MII_Data());
+			phyustate = 0;
+		}
+		break;
+	}
+
+	return physts;
+}
+
+/**
+ * @}
+ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/boards_18xx43xx.dox

+/*
+ * @brief LPCOpen 18xx/43xx board support page
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+/** @defgroup BOARDS_18XX_43XX BOARD: LPC18XX and LPC43XX boards
+ * @ingroup Board_Layer
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/*!
+ * @page LPCOPEN_BSP_18XX43XX Supported 18xx/43xx platforms
+ *
+ * <b>Device Support</b><br/>
+ * All LPC18xx and LPC43xx device variants are supported.<br/><br/>
+ * <a href="http://www.lpcware.com/gfiles/docs?tid_1[]=103">LPC18xx documentation links</a><br/>
+ * <a href="http://www.lpcware.com/gfiles/docs?tid_1[]=104">LPC43xx documentation links</a><br/><br/>
+ * <b>Board Support</b><br/>
+ * Hitex, Keil, and NGX boards for both 18xx and 43xx variants are supported.
+ * Click <a href="http://www.lpcware.com/content/project/lpcopen-platform-nxp-lpc-microcontrollers/lpcopen-build-procedures/lpc18xx/43xx-lpco">here</a> for LPCOpen build procedures and default jumper configuration for supported boards.<br/><br/>
+ * <a href="http://www.hitex.com/index.php?id=3455/">Hitex LPC1857 and LPC4357 evaluation boards </a><br/>
+ * <a href="http://www.keil.com/mcb1800/">Keil MCB1800</a> and <a href="http://www.keil.com/mcb4300/">Keil MCB4300 boards</a><br/>
+ * <a href="http://ngxtech.com/knowledgebase/index.php?title=LPC1830-Xplorer_Quick_Start_Guide">NGX LPC1830 Xplorer</a> and 
+ * <a href="http://ngxtech.com/knowledgebase/index.php?title=LPC4330-Xplorer_Quick_Start_Guide">NGX LPC4330 Xplorer boards</a><br/>
+ *
+ * <b>Toolchain Support</b><br/>
+ * Code Red Xpresso, IAR EWARM, and Keil MDK are all supported. See the <a href="http://www.lpcware.com/content/project/lpcopen-platform-nxp-lpc-microcontrollers/lpcopen-build-procedures/lpc18xx/43xx-lpco#Supported_toolchains">build support pages</a>
+ * for information on specific versions of the toolchains tested with the LPCOpen platform.<br/><br/>
+ * <a href="http://www.iar.com/en/Products/IAR-Embedded-Workbench/ARM/">IAR EWARM</a><br/>
+ * <a href="http://www.keil.com/arm/mdk.asp">ARM MDK-ARM</a><br/>
+ * <a href="http://code-red-tech.com/lpcxpresso">LPCXpresso</a>
+ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/hitex_eva_18504350/board.h

+/*
+ * @brief Hitex EVA 1850/4350 board file
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __BOARD_H_
+#define __BOARD_H_
+
+#include "board_hitex_eva_18504350.h"
+
+#endif /* __BOARD_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/hitex_eva_18504350/board_hitex_eva_18504350.h

+/*
+ * @brief Hitex EVA 1850/4350 board file
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __BOARD_HITEX_EVA_18504350_H_
+#define __BOARD_HITEX_EVA_18504350_H_
+
+#include "chip.h"
+#include "board_api.h"
+#include "lpc_phy.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @defgroup BOARD_HITEX_EVA_18504350 LPC1850 and LPC4350 Hitex EVA board support functions
+ * @ingroup BOARDS_18XX_43XX
+ * @{
+ */
+
+/** @defgroup BOARD_HITEX_EVA_18504350_OPTIONS BOARD: LPC1850 and LPC4350 Hitex EVA board builds options
+ * The NGX board has options that configure it's operation at build-time.<br/>
+ * CHIP_LPC*
+ *  - One of @ref CHIP_LPC18XX or @ref CHIP_LPC43XX must be defined for this board
+ * DEBUG:<br/>
+ * - When defined, DEBUGOUT and DEBUGSTR functions are routed to the UART defined by DEBUG_UART<br/>
+ * - When not defined, DEBUGOUT and DEBUGSTR are null functions<br/><p>
+ * DEBUG_UART:<br/>
+ *  - This defines the UART used for debug output when DEBUG is defined, example: @ref LPC_USART0<br/><p>
+ * CRYSTAL_MAIN_FREQ_IN:<br/>
+ *  - This define specifies the crystal input clock into the chip, example: 12000000<br/><p>
+ * CRYSTAL_32K_FREQ_IN:<br/>
+ *  - This define specifies the RTC crystal input clock into the chip, example: 32768<br/><p>
+ * EXTERNAL_CLKIN_FREQ_IN:<br/>
+ *  - This define specifies the clock rate input into the EXTCLKIN pin, example: 28000000<br/><p>
+ * MAX_CLOCK_FREQ:<br/>
+ *  - When defined, this will be used to configure the CPU clock rate, example: 150000000<br/>
+ *  - When not defined, the system will use the maximum CPU clokc rate<br/><p>
+ * USE_RMII:<br/>
+ *  - When defined, the system will be configured for RMII mode for Ethernet<br/>
+ *  - When not defined, the system will be configured for MII mode for Ethernet<br/><p>
+ * BOARD_HITEX_EVA_18504350:<br/>
+ *  - When building for Hitex boards, BOARD_HITEX_EVA_18504350 is defined<br/>
+ * <br/><p>
+ * For more information on driver options see @ref LPCOPEN_DESIGN_ARPPROACH<br/>
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+/**
+ * HITEX board defintion, can be used in examples for board specific code
+ */
+#define BOARD_HITEX_EVA_18504350
+
+/* For USBLIB examples */
+#define LEDS_LED1           0x01
+#define LEDS_LED2           0x02
+#define LEDS_LED3           0x04
+#define LEDS_LED4           0x08
+#define LEDS_NO_LEDS        0x00
+#define BUTTONS_BUTTON1     0x01
+#define JOY_UP              0x01
+#define JOY_DOWN            0x02
+#define JOY_LEFT            0x04
+#define JOY_RIGHT           0x08
+#define JOY_PRESS           0x10
+#define NO_BUTTON_PRESSED   0x00
+
+#define BUTTONS_BUTTON1_GPIO_PORT_NUM   6
+#define BUTTONS_BUTTON1_GPIO_BIT_NUM    21
+
+#define I2CDEV_PCA9502_ADDR     (0x9A >> 1)
+#define PCA9502_REG_IODIR       0x0A
+#define PCA9502_REG_IOSTATE     0x0B
+#define PCA9502_REG_IOINTENA    0x0C
+#define PCA9502_REG_IOCONTROL   0x0E
+#define PCA9502_REG_ADDR(x)     (((x) & 0x0F) << 3)
+
+/**
+ * Address of I2C device (UDA1380 CODEC) on board
+ */
+#define I2CDEV_UDA1380_ADDR     (0x34 >> 1)
+
+/**
+ * Default location of LCD buffer is in DRAM
+ */
+#define FRAMEBUFFER_ADDR        0x28000000
+
+/**
+ * LCD configuration data
+ */
+extern const LCD_Config_Type EA320x240;
+
+/**
+ * Default LCD configuration data for examples
+ */
+#define BOARD_LCD EA320x240
+
+/**
+ * CODEC audio input sources
+ */
+typedef enum {
+	MCB_18XX_AUDIO_MIC_SELECT = 1 << 2 | 1 << 3,
+	MCB_18XX_AUDIO_LINE_IN_SELECT = 0x00,
+} Board_Audio_Input_Sel_Type;
+
+/**
+ * @brief	Initialize pin muxing for a UART
+ * @param	UARTx	: Pointer to UART register block for UART pins to init
+ * @return	Nothing
+ */
+void Board_UART_Init(LPC_USART_Type *UARTx);
+
+/**
+ * @brief	Initialize button(s) interface on board
+ * @return	Nothing
+ */
+void Board_Buttons_Init(void);
+
+/**
+ * @brief	Returns button(s) state on board
+ * @return	Returns BUTTONS_BUTTON1 if button1 is pressed
+ */
+uint32_t Buttons_GetStatus(void);
+
+/**
+ * @brief	Initialize joystick interface on board
+ * @return	Nothing
+ */
+void Board_Joystick_Init(void);
+
+/**
+ * @brief	Returns joystick states on board
+ * @return	Returns a JOY_* value, ir JOY_PRESS or JOY_UP
+ */
+uint8_t Joystick_GetStatus(void);
+
+/**
+ * @brief	Returns the MAC address assigned to this board
+ * @param	mcaddr : Pointer to 6-byte character array to populate with MAC address
+ * @return	Nothing
+ */
+void Board_ENET_GetMacADDR(uint8_t *mcaddr);
+
+/**
+ * @brief	Sets up board specific ADC interface
+ * @return	Nothing
+ */
+void Board_ADC_Init(void);
+
+/**
+ * @brief	Sets up board specific I2C interface
+ * @param	I2Cx	: Pointer to I2C interface to initialize
+ * @return	Nothing
+ */
+void Board_I2C_Init(LPC_I2C_Type *I2Cx);
+
+/**
+ * @brief	Initialize the LCD interface
+ * @return	Nothing
+ */
+void Board_LCD_Init(void);
+
+/**
+ * @brief	Initialize TSC2046 touchscreen controller
+ * @return	Nothing
+ */
+void Init_Touch_Controller(void);
+
+/**
+ * @brief	Get Touch coordinates
+ * @param	pX	: Pointer to x-Coord to populate
+ * @param	pY	: Pointer to y-Coord to populate
+ * @return	Nothing
+ */
+bool GetTouchPos(int16_t *pX, int16_t *pY);
+
+/**
+ * @brief	Initialize pin muxing for SDMMC interface
+ * @return	Nothing
+ */
+void Board_SDMMC_Init(void);
+
+/**
+ * @brief	Initialize pin muxing for SSP interface
+ * @param	SSPx	: Pointer to SSP interface to initialize
+ * @return	Nothing
+ */
+void Board_SSP_Init(LPC_SSP_Type *SSPx);
+
+/**
+ * @brief	Initialize I2S interface for the board and UDA1380
+ * @param	I2Sx			: Pointer to I2S register interface used on this board
+ * @param	audio_in_sel	: Audio input selection
+ * @return	Nothing
+ */
+void Board_Audio_Init(LPC_I2S_Type *I2Sx, Board_Audio_Input_Sel_Type audio_in_sel);
+
+/**
+ * @brief	FIXME
+ * @param	Stream	: FIXME
+ * @return	Nothing
+ */
+void Serial_CreateStream(void *Stream);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BOARD_HITEX_EVA_18504350_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/hitex_eva_18504350/hitex_eva_1850/sys_config.h

+/*
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __SYS_CONFIG_H_
+#define __SYS_CONFIG_H_
+
+// #define USE_RMII
+#define CHIP_LPC18XX
+
+/* Enable DEBUG for IO support via the UART */
+#define DEBUG
+
+/* Enable DEBUG_SEMIHOSTING along with DEBUG to enable IO support
+   via semihosting */
+// #define DEBUG_SEMIHOSTING
+
+/* Board UART used for debug output */
+#define DEBUG_UART LPC_USART0
+
+/* Crystal frequency into device */
+#define CRYSTAL_MAIN_FREQ_IN 12000000
+
+/* Crystal frequency into device for RTC/32K input */
+#define CRYSTAL_32K_FREQ_IN 32768
+
+/* Frequency on external clock in pin */
+#define EXTERNAL_CLKIN_FREQ_IN 0
+
+/* Default CPU clock frequency */
+#define MAX_CLOCK_FREQ (180000000)
+
+#endif /* __SYS_CONFIG_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/hitex_eva_18504350/hitex_eva_4350/sys_config.h

+/*
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __SYS_CONFIG_H_
+#define __SYS_CONFIG_H_
+
+// #define USE_RMII
+#define CHIP_LPC43XX
+
+/* Enable DEBUG for IO support via the UART */
+#define DEBUG
+
+/* Enable DEBUG_SEMIHOSTING along with DEBUG to enable IO support
+   via semihosting */
+// #define DEBUG_SEMIHOSTING
+
+/* Board UART used for debug output */
+#define DEBUG_UART LPC_USART0
+
+/* Crystal frequency into device */
+#define CRYSTAL_MAIN_FREQ_IN 12000000
+
+/* Crystal frequency into device for RTC/32K input */
+#define CRYSTAL_32K_FREQ_IN 32768
+
+/* Frequency on external clock in pin */
+#define EXTERNAL_CLKIN_FREQ_IN 0
+
+/* Default CPU clock frequency */
+#define MAX_CLOCK_FREQ (204000000)
+
+#endif /* __SYS_CONFIG_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/hitex_eva_18504350/sysinit_hitex_eva_18504350.c

+/*
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#include "board.h"
+
+/** @defgroup BOARD_HITEX_EVA_18504350_SYSINIT LPC1850 and LPC4350 Hitex EVA board System Init code
+ * @ingroup BOARD_HITEX_EVA_18504350
+ * The System initialization code is called prior to the application and
+ * initializes the board for run-time operation. Board initialization
+ * for the Hitex EVA boards includes clock setup, default pin muxing, and
+ * memory configuration.
+ *
+ * With the exception of stack space, no RW memory is used for this call.
+ *
+ * LPC1850 and LPC4350 Hitex EVA setup<BR>
+ *  Clocking:<BR>
+ *   All base clocks enabled by default (Save power by disabling un-needed clocks)<BR>
+ *   CPU PLL set to maximum clock frequency (as defined by MAX_CLOCK_FREQ value)<BR>
+ *   SPIFI FLASH clock setup for fastest speed<BR>
+ *  Pin muxing:<BR>
+ *   Sets up various pin mux functions for the board (Ethernet, LEDs, etc.)<BR>
+ *   Sets up the external memory controller signals<BR>
+ *  Memory:<BR>
+ *   Sets up DRAM, static RAM, and NOR FLASH.
+ * @{
+ */
+
+#ifndef CORE_M0
+/* SCR pin definitions for pin muxing */
+typedef struct {
+	uint8_t pingrp;	/* Pin group */
+	uint8_t pinnum;	/* Pin number */
+	uint8_t pincfg;	/* Pin configuration for SCU */
+	uint8_t funcnum;/* Function number */
+} PINMUX_GRP_T;
+
+/* Structure for initial base clock states */
+struct CLK_BASE_STATES {
+	CGU_BASE_CLK_T clk;	/* Base clock */
+	CGU_CLKIN_T clkin;	/* Base clock source, see UM for allowable souorces per base clock */
+	bool autoblock_enab;/* Set to true to enable autoblocking on frequency change */
+	bool powerdn;		/* Set to true if the base clock is initially powered down */
+};
+
+/* Initial base clock states are mostly on */
+STATIC const struct CLK_BASE_STATES InitClkStates[] = {
+	{CLK_BASE_SAFE, CLKIN_IRC, true, false},
+	{CLK_BASE_APB1, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_APB3, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_USB0, CLKIN_USBPLL, true, false},
+#if defined(CHIP_LPC43XX)
+	{CLK_BASE_PERIPH, CLKIN_MAINPLL, true, false},
+#endif
+	{CLK_BASE_USB1, CLKIN_USBPLL, true, false},
+#if defined(CHIP_LPC43XX)
+	{CLK_BASE_SPI, CLKIN_MAINPLL, true, false},
+#endif
+	{CLK_BASE_PHY_TX, CLKIN_ENET_TX, true, false},
+#if defined(USE_RMII)
+	{CLK_BASE_PHY_RX, CLKIN_ENET_TX, true, false},
+#else
+	{CLK_BASE_PHY_RX, CLKIN_ENET_RX, true, false},
+#endif
+	{CLK_BASE_LCD, CLKIN_MAINPLL, true, true},
+#if defined(CHIP_LPC43XX)
+	{CLK_BASE_VADC, CLKIN_MAINPLL, true, true},
+#endif
+	{CLK_BASE_SDIO, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_SSP0, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_SSP1, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_UART0, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_UART1, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_UART2, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_UART3, CLKIN_MAINPLL, true, false},
+	{CLK_BASE_OUT, CLKINPUT_PD, true, false},
+	{CLK_BASE_APLL, CLKINPUT_PD, true, false},
+	{CLK_BASE_CGU_OUT0, CLKINPUT_PD, true, false},
+	{CLK_BASE_CGU_OUT1, CLKINPUT_PD, true, false}
+};
+
+/* SPIFI high speed pin mode setup */
+STATIC const PINMUX_GRP_T spifipinmuxing[] = {
+	{0x3, 3,  (MD_PLN_FAST),  FUNC3},	/* SPIFI CLK */
+	{0x3, 4,  (MD_PLN_FAST),  FUNC3},	/* SPIFI D3 */
+	{0x3, 5,  (MD_PLN_FAST),  FUNC3},	/* SPIFI D2 */
+	{0x3, 6,  (MD_PLN_FAST),  FUNC3},	/* SPIFI D1 */
+	{0x3, 7,  (MD_PLN_FAST),  FUNC3},	/* SPIFI D0 */
+	{0x3, 8,  (MD_PLN_FAST),  FUNC3}	/* SPIFI CS/SSEL */
+};
+
+/* Setup system clocking */
+STATIC void SystemSetupClocking(void)
+{
+	int i;
+
+	/* Switch main system clocking to crystal */
+	Chip_Clock_EnableCrystal();
+	Chip_Clock_SetBaseClock(CLK_BASE_MX, CLKIN_CRYSTAL, true, false);
+
+	/* Setup PLL for 100MHz and switch main system clocking */
+	Chip_Clock_SetupMainPLLHz(CLKIN_CRYSTAL, CRYSTAL_MAIN_FREQ_IN, 100 * 1000000, 100 * 1000000);
+	Chip_Clock_SetBaseClock(CLK_BASE_MX, CLKIN_MAINPLL, true, false);
+
+	/* Setup PLL for maximum clock */
+	Chip_Clock_SetupMainPLLHz(CLKIN_CRYSTAL, CRYSTAL_MAIN_FREQ_IN, MAX_CLOCK_FREQ, MAX_CLOCK_FREQ);
+
+	/* Setup system base clocks and initial states. This won't enable and
+	   disable individual clocks, but sets up the base clock sources for
+	   each individual peripheral clock. */
+	for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++) {
+		Chip_Clock_SetBaseClock(InitClkStates[i].clk, InitClkStates[i].clkin,
+								InitClkStates[i].autoblock_enab, InitClkStates[i].powerdn);
+	}
+
+	/* Reset and enable 32Khz oscillator */
+	LPC_CREG->CREG0 &= ~((1 << 3) | (1 << 2));
+	LPC_CREG->CREG0 |= (1 << 1) | (1 << 0);
+
+	/* SPIFI pin setup is done prior to setting up system clocking */
+	for (i = 0; i < (sizeof(spifipinmuxing) / sizeof(spifipinmuxing[0])); i++) {
+		Chip_SCU_PinMux(spifipinmuxing[i].pingrp, spifipinmuxing[i].pinnum,
+						spifipinmuxing[i].pincfg, spifipinmuxing[i].funcnum);
+	}
+
+	/* Setup a divider E for main PLL clock switch SPIFI clock to that divider.
+	   Divide rate is based on CPU speed and speed of SPI FLASH part. */
+#if (MAX_CLOCK_FREQ > 180000000)
+	Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 5);
+#else
+	Chip_Clock_SetDivider(CLK_IDIV_E, CLKIN_MAINPLL, 4);
+#endif
+	Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false);
+}
+
+STATIC const PINMUX_GRP_T pinmuxing[] = {
+#if defined(USE_RMII)
+	/* RMII pin group */
+	{0x1, 19, (MD_EHS | MD_PLN | MD_EZI | MD_ZI),  FUNC0},
+	{0x0, 1,  (MD_EHS | MD_PLN | MD_ZI),           FUNC6},
+	{0x1, 18, (MD_EHS | MD_PLN | MD_ZI),           FUNC3},
+	{0x1, 20, (MD_EHS | MD_PLN | MD_ZI),           FUNC3},
+	{0x1, 17, (MD_EHS | MD_PLN | MD_EZI | MD_ZI),  FUNC3},
+	{0xC, 1,  (MD_EHS | MD_PLN | MD_ZI),           FUNC3},
+	{0x1, 16, (MD_EHS | MD_PLN | MD_EZI | MD_ZI),  FUNC7},
+	{0x1, 15, (MD_EHS | MD_PLN | MD_EZI | MD_ZI),  FUNC3},
+	{0x0, 0,  (MD_EHS | MD_PLN | MD_EZI | MD_ZI),  FUNC2},
+#else
+	/* MII pin group */
+	{0x1, 19, (MD_PLN | MD_EZI),                   FUNC0},
+	{0x0, 1,  (MD_PLN),                            FUNC6},
+	{0x1, 18, (MD_PLN),                            FUNC3},
+	{0x1, 20, (MD_PLN),                            FUNC3},
+	{0x1, 17, (MD_PLN | MD_EZI),                   FUNC3},
+	{0xC, 1,  (MD_PLN),                            FUNC3},
+	{0x1, 16, (MD_PLN | MD_EZI),                   FUNC7},
+	{0x1, 15, (MD_PLN | MD_EZI),                   FUNC3},
+	{0x0, 0,  (MD_PLN | MD_EZI),                   FUNC2},
+	{0x9, 4,  (MD_PLN),                            FUNC5},
+	{0x9, 5,  (MD_PLN),                            FUNC5},
+	{0xC, 0,  (MD_PLN | MD_EZI),                   FUNC3},
+	{0x9, 0,  (MD_PLN | MD_EZI),                   FUNC5},
+	{0x9, 1,  (MD_PLN | MD_EZI),                   FUNC5},
+	{0x9, 6,  (MD_PLN | MD_EZI),                   FUNC5},
+	{0x9, 3,  (MD_PLN | MD_EZI),                   FUNC5},
+	{0x9, 2,  (MD_PLN | MD_EZI),                   FUNC5},
+	{0xC, 8,  (MD_PLN | MD_EZI),                   FUNC4},
+#endif
+	/* External data lines D0 .. D15 */
+	{0x1, 7,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 8,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 9,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 10, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 11, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 12, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 13, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 14, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x5, 4,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 5,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 6,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 7,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 0,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 1,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 2,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x5, 3,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	/* Address lines A0 .. A23 */
+	{0x2, 9,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x2, 10, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x2, 11, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x2, 12, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x2, 13, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 0,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x1, 1,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x1, 2,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x2, 8,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x2, 7,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x2, 6,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x2, 2,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x2, 1,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x2, 0,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x6, 8,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC1},
+	{0x6, 7,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC1},
+	{0xD, 16, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0xD, 15, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0xE, 0,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0xE, 1,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0xE, 2,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0xE, 3,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0xE, 4,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0xA, 4,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	/* EMC control signals */
+	{0x1, 4,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x6, 6,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC1},
+	{0xD, 13, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0xD, 10, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0x6, 9,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 6,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x6, 4,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x6, 5,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{PINMUX_CLK, 0,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC0},
+	{PINMUX_CLK, 1,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC0},
+	{PINMUX_CLK, 2,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC0},
+	{PINMUX_CLK, 3,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC0},
+	{0x6, 11, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x6, 12, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x6, 10, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0xD, 0,  (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC2},
+	{0xE, 13, (MD_PLN | MD_EZI | MD_ZI | MD_EHS),  FUNC3},
+	{0x1, 3,  MD_PLN_FAST,                         FUNC3},
+	{0x1, 4,  MD_PLN_FAST,                         FUNC3},
+	{0x6, 6,  MD_PLN_FAST,                         FUNC3},
+	{0x1, 5,  MD_PLN_FAST,                         FUNC3},
+	/* LCD interface, 24bpp */
+	{0x7, 7,  MD_PUP,                              FUNC3},
+	{0x4, 7,  MD_PUP,                              FUNC0},
+	{0x4, 5,  MD_PUP,                              FUNC2},
+	{0x4, 6,  MD_PUP,                              FUNC2},
+	{0x7, 6,  MD_PUP,                              FUNC3},
+	{0x4, 1,  MD_PUP,                              FUNC2},
+	{0x4, 4,  MD_PUP,                              FUNC2},
+	{0x4, 2,  MD_PUP,                              FUNC2},
+	{0x8, 7,  MD_PUP,                              FUNC3},
+	{0x8, 6,  MD_PUP,                              FUNC3},
+	{0x8, 5,  MD_PUP,                              FUNC3},
+	{0x8, 4,  MD_PUP,                              FUNC3},
+	{0x7, 5,  MD_PUP,                              FUNC3},
+	{0x4, 8,  MD_PUP,                              FUNC2},
+	{0x4, 10, MD_PUP,                              FUNC2},
+	{0x4, 9,  MD_PUP,                              FUNC2},
+	{0x8, 3,  MD_PUP,                              FUNC3},
+	{0xB, 6,  MD_PUP,                              FUNC2},
+	{0xB, 5,  MD_PUP,                              FUNC2},
+	{0xB, 4,  MD_PUP,                              FUNC2},
+	{0x7, 4,  MD_PUP,                              FUNC3},
+	{0x7, 2,  MD_PUP,                              FUNC3},
+	{0x7, 1,  MD_PUP,                              FUNC3},
+	{0xB, 3,  MD_PUP,                              FUNC2},
+	{0xB, 2,  MD_PUP,                              FUNC2},
+	{0xB, 1,  MD_PUP,                              FUNC2},
+	{0xB, 0,  MD_PUP,                              FUNC2},
+	{0x7, 0,  MD_PUP,                              FUNC3},
+	{0x4, 4,  MD_PUP,                              FUNC0},
+	{0x7, 3,  MD_PUP,                              FUNC0},
+	{0x4, 1,  MD_PUP,                              FUNC0},
+	/* Board LEDs */
+	{0x8, 1,  MD_PDN,                              FUNC0},
+	{0xE, 6,  MD_PDN,                              FUNC4},	/* GPIO7.6, green */
+	{0xE, 8,  MD_PDN,                              FUNC4},	/* GPIO7.8, blue */
+	{0xE, 5,  MD_PDN,                              FUNC4},	/* GPIO7.5, red */
+	/* Board ADC */
+	{0xF, 9,  MD_PLN,                              FUNC7},
+	/*  I2S  */
+	{0x3, 0,  MD_PLN_FAST,                         FUNC2},
+	{0x6, 0,  MD_PLN_FAST,                         FUNC4},
+	{0x7, 2,  MD_PLN_FAST,                         FUNC2},
+	{0x6, 2,  MD_PLN_FAST,                         FUNC3},
+	{0x7, 1,  MD_PLN_FAST,                         FUNC2},
+	{0x6, 1,  MD_PLN_FAST,                         FUNC3},
+};
+
+/* Sets up system pin muxing */
+STATIC void SystemSetupMuxing(void)
+{
+	int i;
+
+	/* Setup system level pin muxing */
+	for (i = 0; i < (sizeof(pinmuxing) / sizeof(pinmuxing[0])); i++) {
+		Chip_SCU_PinMux(pinmuxing[i].pingrp, pinmuxing[i].pinnum,
+						pinmuxing[i].pincfg, pinmuxing[i].funcnum);
+	}
+}
+
+/* EMC clock delay */
+#define CLK0_DELAY 7
+
+/* Hitex SDRAM timing and chip Config */
+STATIC const IP_EMC_DYN_CONFIG_Type IS42S16400_config = {
+	EMC_NANOSECOND(64000000 / 4096),	/* Row refresh time */
+	0x01,	/* Command Delayed */
+	EMC_NANOSECOND(20),
+	EMC_NANOSECOND(60),
+	EMC_NANOSECOND(63),
+	EMC_CLOCK(0x05),
+	EMC_CLOCK(0x05),
+	EMC_CLOCK(0x04),
+	EMC_NANOSECOND(63),
+	EMC_NANOSECOND(63),
+	EMC_NANOSECOND(63),
+	EMC_NANOSECOND(14),
+	EMC_CLOCK(0x02),
+	{
+		{
+			EMC_ADDRESS_DYCS0,	/* Hitex Board uses DYCS0 for SDRAM */
+			3,	/* RAS */
+
+			EMC_DYN_MODE_WBMODE_PROGRAMMED |
+			EMC_DYN_MODE_OPMODE_STANDARD |
+			EMC_DYN_MODE_CAS_3 |
+			EMC_DYN_MODE_BURST_TYPE_SEQUENTIAL |
+			EMC_DYN_MODE_BURST_LEN_8,
+
+			EMC_DYN_CONFIG_DATA_BUS_16 |
+			EMC_DYN_CONFIG_LPSDRAM |
+			EMC_DYN_CONFIG_4Mx16_4BANKS_12ROWS_8COLS |
+			EMC_DYN_CONFIG_MD_SDRAM
+		},
+		{0, 0, 0, 0},
+		{0, 0, 0, 0},
+		{0, 0, 0, 0}
+	}
+};
+
+/* Hitex Static RAM timing and chip Config */
+STATIC const IP_EMC_STATIC_CONFIG_Type IS62WV25616_config = {
+	2,
+	EMC_STATIC_CONFIG_MEM_WIDTH_16 |
+	EMC_STATIC_CONFIG_CS_POL_ACTIVE_LOW |
+	EMC_STATIC_CONFIG_BLS_HIGH /* |
+							      EMC_CONFIG_BUFFER_ENABLE*/,
+
+	EMC_NANOSECOND(0),
+	EMC_NANOSECOND(30),
+	EMC_NANOSECOND(90),
+	EMC_NANOSECOND(55),
+	EMC_NANOSECOND(55),
+	EMC_NANOSECOND(55)
+};
+
+/* Hitex NorFlash timing and chip Config */
+STATIC const IP_EMC_STATIC_CONFIG_Type SST39VF320_config = {
+	0,
+	EMC_STATIC_CONFIG_MEM_WIDTH_16 |
+	EMC_STATIC_CONFIG_CS_POL_ACTIVE_LOW |
+	EMC_STATIC_CONFIG_BLS_HIGH /* |
+							      EMC_CONFIG_BUFFER_ENABLE*/,
+
+	EMC_NANOSECOND(0),
+	EMC_NANOSECOND(35),
+	EMC_NANOSECOND(70),
+	EMC_NANOSECOND(70),
+	EMC_NANOSECOND(40),
+	EMC_CLOCK(4)
+};
+
+/* Setup external memories */
+STATIC void SystemSetupMemory(void)
+{
+	/* Setup EMC Delays */
+	/* Move all clock delays together */
+	LPC_SCU->EMCDELAYCLK = ((CLK0_DELAY) | (CLK0_DELAY << 4) | (CLK0_DELAY << 8) | (CLK0_DELAY << 12));
+
+	/* Setup EMC Clock Divider for divide by 2 */
+	Chip_Clock_EnableOpts(CLK_MX_EMC_DIV, true, true, 2);
+	LPC_CREG->CREG6 |= (1 << 16);
+	Chip_Clock_Enable(CLK_MX_EMC);
+
+	/* Init EMC Controller -Enable-LE mode- clock ratio 1:1 */
+	Chip_EMC_Init(1, 0, 0);
+	/* Init EMC Dynamic Controller */
+	Chip_EMC_Dynamic_Init((IP_EMC_DYN_CONFIG_Type *) &IS42S16400_config);
+	/* Init EMC Static Controller CS2 */
+	Chip_EMC_Static_Init((IP_EMC_STATIC_CONFIG_Type *) &IS62WV25616_config);
+	/* Init EMC Static Controller CS0 */
+	Chip_EMC_Static_Init((IP_EMC_STATIC_CONFIG_Type *) &SST39VF320_config);
+
+	/* Enable Buffer for External Flash */
+	LPC_EMC->STATICCONFIG0 |= 1 << 19;
+}
+
+#endif
+
+/**
+ * @brief	Setup the system
+ *			SystemInit() is called prior to the application and sets up system
+ *			clocking, memory, and any resources needed prior to the application
+ *			starting.
+ * @return	none
+ */
+void SystemInit(void)
+{
+#if defined(CORE_M3) || defined(CORE_M4)
+	unsigned int *pSCB_VTOR = (unsigned int *) 0xE000ED08;
+
+#if defined(__IAR_SYSTEMS_ICC__)
+	extern void *__vector_table;
+
+	*pSCB_VTOR = (unsigned int) &__vector_table;
+#elif defined(__CODE_RED)
+	extern void *g_pfnVectors;
+
+	*pSCB_VTOR = (unsigned int) &g_pfnVectors;
+#elif defined(__ARMCC_VERSION)
+	extern void *__Vectors;
+
+	*pSCB_VTOR = (unsigned int) &__Vectors;
+#endif
+
+#if defined(__FPU_PRESENT) && __FPU_PRESENT == 1
+	fpuInit();
+#endif
+
+	/* Setup system clocking and memory. This is done early to allow the
+	   application and tools to clear memory and use scatter loading to
+	   external memory. */
+	SystemSetupClocking();
+	SystemSetupMuxing();
+	SystemSetupMemory();
+#endif
+}
+
+/**
+ * @}
+ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/keil_mcb_18574357/board.h

+/*
+ * @brief Keil MCB 1857/4357 board file
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __BOARD_H_
+#define __BOARD_H_
+
+#include "board_keil_mcb_18574357.h"
+
+#endif /* __BOARD_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/keil_mcb_18574357/board_keil_mcb_18574357.h

+/*
+ * @brief Keil MCB 1857/4357 board file
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __BOARD_KEIL_MCB_18574357_H_
+#define __BOARD_KEIL_MCB_18574357_H_
+
+#include "chip.h"
+#include "board_api.h"
+#include "lpc_phy.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @defgroup BOARD_KEIL_MCB_18574357 LPC1857 and LPC4357 Keil MCB board support functions
+ * @ingroup BOARDS_18XX_43XX
+ * @{
+ */
+
+/** @defgroup BOARD_KEIL_MCB_18574357_OPTIONS BOARD: LPC1857 and LPC4357 Keil MCB board builds options
+ * The NGX board has options that configure it's operation at build-time.<br/>
+ * CHIP_LPC*
+ *  - One of @ref CHIP_LPC18XX or @ref CHIP_LPC43XX must be defined for this board
+ * DEBUG:<br/>
+ * - When defined, DEBUGOUT and DEBUGSTR functions are routed to the UART defined by DEBUG_UART<br/>
+ * - When not defined, DEBUGOUT and DEBUGSTR are null functions<br/><p>
+ * DEBUG_UART:<br/>
+ *  - This defines the UART used for debug output when DEBUG is defined, example: @ref LPC_USART0<br/><p>
+ * CRYSTAL_MAIN_FREQ_IN:<br/>
+ *  - This define specifies the crystal input clock into the chip, example: 12000000<br/><p>
+ * CRYSTAL_32K_FREQ_IN:<br/>
+ *  - This define specifies the RTC crystal input clock into the chip, example: 32768<br/><p>
+ * EXTERNAL_CLKIN_FREQ_IN:<br/>
+ *  - This define specifies the clock rate input into the EXTCLKIN pin, example: 28000000<br/><p>
+ * MAX_CLOCK_FREQ:<br/>
+ *  - When defined, this will be used to configure the CPU clock rate, example: 150000000<br/>
+ *  - When not defined, the system will use the maximum CPU clokc rate<br/><p>
+ * BOARD_HITEX_EVA_18504350:<br/>
+ *  - When building for Keil boards, BOARD_KEIL_MCB_18574357 is defined<br/>
+ * <br/><p>
+ * For more information on driver options see @ref LPCOPEN_DESIGN_ARPPROACH<br/>
+ * @{
+ */
+
+/**
+ * @}
+ */
+
+#define BOARD_KEIL_MCB_18574357
+
+#define LED_NUMBER_OF 1
+
+#define BUTTONS_BUTTON1_GPIO_PORT_NUM			2
+#define BUTTONS_BUTTON1_GPIO_BIT_NUM			0
+#define JOYSTICK_UP_GPIO_PORT_NUM               6
+#define JOYSTICK_UP_GPIO_BIT_NUM                10
+#define JOYSTICK_DOWN_GPIO_PORT_NUM             6
+#define JOYSTICK_DOWN_GPIO_BIT_NUM              11
+#define JOYSTICK_LEFT_GPIO_PORT_NUM             6
+#define JOYSTICK_LEFT_GPIO_BIT_NUM              12
+#define JOYSTICK_RIGHT_GPIO_PORT_NUM            6
+#define JOYSTICK_RIGHT_GPIO_BIT_NUM             13
+#define JOYSTICK_PRESS_GPIO_PORT_NUM            6
+#define JOYSTICK_PRESS_GPIO_BIT_NUM             8
+
+#define JOY_UP              0x01
+#define JOY_DOWN            0x02
+#define JOY_LEFT            0x04
+#define JOY_RIGHT           0x08
+#define JOY_PRESS           0x10
+#define NO_BUTTON_PRESSED   0x00
+
+#define BUTTONS_BUTTON1     0x01
+
+#define LEDS_LED1           0x01
+#define LEDS_LED2           0x02
+#define LEDS_LED3           0x04
+#define LEDS_LED4           0x08
+#define LEDS_NO_LEDS        0x00
+
+/** UDA1380 register values */
+#define UDA1380_REG_EVALCLK_DEFAULT_VALUE   (0xF << 8 | 0x3 << 4 | 1 << 1)
+#define UDA1380_REG_I2S_DEFAULT_VALUE           0x0000
+
+#define UDA1380_REG_PWRCTRL_DEFAULT_VALUE	(1 << 15 | 1 << 13 | 1 << 10 | 1 << 8 | 1 << 6 | 1 << 4 | 0x0F)
+#define UDA1380_REG_ANAMIX_DEFAULT_VALUE	0x0000
+#define UDA1380_REG_HEADAMP_DEFAULT_VALUE	( 1 << 9 | 2)
+
+#define UDA1380_REG_MSTRVOL_DEFAULT_VALUE	0x0000
+#define UDA1380_REG_MIXVOL_DEFAULT_VALUE	0x0000
+#define UDA1380_REG_MODEBBT_DEFAULT_VALUE	0x0000
+#define UDA1380_REG_MSTRMUTE_DEFAULT_VALUE	(2 << 8 | 2)
+#define UDA1380_REG_MIXSDO_DEFAULT_VALUE	0x0000
+
+#define UDA1380_REG_DECVOL_DEFAULT_VALUE	0xE4E4			/* Decrease Volume -28dB */
+#define UDA1380_REG_PGA_DEFAULT_VALUE		0x0000
+#define UDA1380_REG_ADC_DEFAULT_VALUE		0x0001			/* Apply 0bB VGA Gain, enable DC Filter */
+#define UDA1380_REG_AGC_DEFAULT_VALUE		0x0000
+
+#define UDA1380_REG_L3_DEFAULT_VALUE		0x0000
+
+/* UDA1380 address */
+#define I2CDEV_UDA1380_ADDR     (0x34 >> 1)
+
+/* UDA1380 Register Address */
+typedef enum {
+	UDA_EVALM_CLK = 0x00,
+	UDA_BUS_CTRL,
+	UDA_POWER_CTRL,
+	UDA_ANALOG_CTRL,
+	UDA_HPAMP_CTRL,
+	UDA_MASTER_VOL_CTRL = 0x10,
+	UDA_MIXER_VOL_CTRL,
+	UDA_MODE_CTRL,
+	UDA_MUTE_CTRL,
+	UDA_MIXER_FILTER_CTRL,
+	UDA_DEC_VOL_CTRL = 0x20,
+	UDA_PGA_CTRL,
+	UDA_ADC_CTRL,
+	UDA_AGC_CTRL,
+	UDA_TOTAL_REG
+} UDA1380_REG;
+
+/* Frame buffer address for lcd */
+#define FRAMEBUFFER_ADDR        0x28000000
+
+extern const LCD_Config_Type MCB4300_LCD;
+#define BOARD_LCD MCB4300_LCD
+
+/** Audio input select structure */
+typedef enum {
+	MCB_18XX_AUDIO_MIC_SELECT = 1 << 2 | 1 << 3,
+	MCB_18XX_AUDIO_LINE_IN_SELECT = 0x00,
+} Board_Audio_Input_Sel_Type;
+
+/** LCD controller definitions */
+#define SSP_ID LPC_SSP0
+#define C_GLCD_H_SIZE   240
+#define C_GLCD_V_SIZE   320
+
+/** Private types/definitions for touch screen controller (STMPE811) */
+
+#define TSC_I2C_ADDR    (0x82 >> 1)	/* Touchscreen 7-bit I2C address */
+
+/** STMPE811 Register addresses */
+#define SYS_CTRL1       0x03
+#define SYS_CTRL2       0x04
+#define INT_CTRL        0x09
+#define INT_EN          0x0A
+#define INT_STA         0x0B
+#define GPIO_ALT_FUNCT  0x17
+#define ADC_CTRL1       0x20
+#define ADC_CTRL2       0x21
+#define TSC_CTRL        0x40
+#define TSC_CFG         0x41
+#define FIFO_TH         0x4A
+#define FIFO_STA        0x4B
+#define FIFO_SIZE       0x4C
+#define DATA_X          0x4D
+#define DATA_Y          0x4F
+#define DATA_Z          0x51
+#define TSC_FRACTION_Z  0x56
+#define TSC_I_DRIVE     0x58
+#define TSC_SHIELD      0x59
+#define DATA_XYZ        0xD7
+
+/**
+ * @brief	Sets up board specific ADC interface
+ * @return	Nothing
+ */
+void Board_ADC_Init(void);
+
+/**
+ * @brief	Sets up board specific I2C interface
+ * @param	I2Cx	: Pointer to I2C interface to initialize
+ * @return	Nothing
+ */
+void Board_I2C_Init(LPC_I2C_Type *I2Cx);
+
+/**
+ * @brief	Initializes board specific GPIO Interrupt
+ * @return	Nothing
+ */
+void Board_GPIO_Int_Init(void);
+
+/**
+ * @brief	Sets up board specific SDMMC interface
+ * @return	Nothing
+ */
+void Board_SDMMC_Init(void);
+
+/**
+ * @brief	Sets up board specific SSP interface
+ * @param	SSPx	: Pointer to SSP interface to initialize
+ * @return	Nothing
+ */
+void Board_SSP_Init(LPC_SSP_Type *SSPx);
+
+/**
+ * @brief	Returns the MAC address assigned to this board
+ * @param	mcaddr	: Pointer to 6-byte character array to populate with MAC address
+ * @return	Nothing
+ */
+void Board_ENET_GetMacADDR(uint8_t *mcaddr);
+
+/**
+ * @brief	Initialize pin muxing for a UART
+ * @param	UARTx	: Pointer to UART register block for UART pins to init
+ * @return	Nothing
+ */
+void Board_UART_Init(LPC_USART_Type *UARTx);
+
+/**
+ * @brief	Initialize the LCD interface
+ * @return	Nothing
+ */
+void Board_LCD_Init(void);
+
+/**
+ * @brief	Initializes the STMPE811 touch screen controller
+ * @return	Nothing
+ */
+void Init_Touch_Controller(void);
+
+/**
+ * @brief	Get touch screen position
+ * @param	pX	: pointer to X position
+ * @param	pY	: pointer to Y position
+ * @return	true if touch is detected or false if otherwise
+ */
+bool GetTouchPos(int16_t *pX, int16_t *pY);
+
+/**
+ * @brief	Initializes board specific buttons
+ * @return	Nothing
+ */
+void Board_Buttons_Init (void);
+
+/**
+ * @brief	Initializes board specific joystick
+ * @return	Nothing
+ */
+void Board_Joystick_Init (void);
+
+/**
+ * @brief	Initialize joystick interface on board
+ * @return	joystick status: up, down, left or right
+ */
+uint8_t Joystick_GetStatus (void);
+
+/**
+ * @brief	Returns button(s) state on board
+ * @return	Returns BUTTONS_BUTTON1 if button1 is pressed
+ */
+uint32_t Buttons_GetStatus(void);
+
+/**
+ * @brief	Sets up board specific I2S interface and UDA1380
+ * @param	I2Sx			: Pointer to I2S interface to initialize
+ * @param	audio_in_sel	: audio input selection
+ * @return	Nothing
+ */
+void Board_Audio_Init(LPC_I2S_Type *I2Sx, Board_Audio_Input_Sel_Type audio_in_sel);
+
+//FIXME Should we remove this function?
+void Serial_CreateStream(void *Stream);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __BOARD_KEIL_MCB_18574357_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/keil_mcb_18574357/keil_mcb_1857/sys_config.h

+/*
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __SYS_CONFIG_H_
+#define __SYS_CONFIG_H_
+
+#define USE_RMII
+#define CHIP_LPC18XX
+
+/* Enable DEBUG for IO support via the UART */
+#define DEBUG
+
+/* Enable DEBUG_SEMIHOSTING along with DEBUG to enable IO support
+   via semihosting */
+// #define DEBUG_SEMIHOSTING
+
+/* Board UART used for debug output */
+#define DEBUG_UART LPC_USART3
+
+/* Crystal frequency into device */
+#define CRYSTAL_MAIN_FREQ_IN 12000000
+
+/* Crystal frequency into device for RTC/32K input */
+#define CRYSTAL_32K_FREQ_IN 32768
+
+/* Frequency on external clock in pin */
+#define EXTERNAL_CLKIN_FREQ_IN 0
+
+/* Default CPU clock frequency */
+#define MAX_CLOCK_FREQ (180000000)
+
+#endif /* __SYS_CONFIG_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/keil_mcb_18574357/keil_mcb_4357/sys_config.h

+/*
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __SYS_CONFIG_H_
+#define __SYS_CONFIG_H_
+
+#define USE_RMII
+#define CHIP_LPC43XX
+
+/* Enable DEBUG for IO support via the UART */
+#define DEBUG
+
+/* Enable DEBUG_SEMIHOSTING along with DEBUG to enable IO support
+   via semihosting */
+// #define DEBUG_SEMIHOSTING'
+
+/* Board UART used for debug output */
+#define DEBUG_UART LPC_USART3
+
+/* Crystal frequency into device */
+#define CRYSTAL_MAIN_FREQ_IN 12000000
+
+/* Crystal frequency into device for RTC/32K input */
+#define CRYSTAL_32K_FREQ_IN 32768
+
+/* Frequency on external clock in pin */
+#define EXTERNAL_CLKIN_FREQ_IN 0
+
+/* Default CPU clock frequency */
+#define MAX_CLOCK_FREQ (204000000)
+
+#endif /* __SYS_CONFIG_H_ */

bsp/xplorer4330/libraries/lpc_board/boards_18xx_43xx/ngx_xplorer_18304330/board.h

+/*
+ * @brief NGX Xplorer 1830/4330 board file
+ *
+ * @note
+ * Copyright(C) NXP Semiconductors, 2012
+ * All rights reserved.
+ *
+ * @par
+ * Software that is described herein is for illustrative purposes only
+ * which provides customers with programming information regarding the
+ * LPC products.  This software is supplied "AS IS" without any warranties of
+ * any kind, and NXP Semiconductors and its licensor disclaim any and
+ * all warranties, express or implied, including all implied warranties of
+ * merchantability, fitness for a particular purpose and non-infringement of
+ * intellectual property rights.  NXP Semiconductors assumes no responsibility
+ * or liability for the use of the software, conveys no license or rights under any
+ * patent, copyright, mask work right, or any other intellectual property rights in
+ * or to any products. NXP Semiconductors reserves the right to make changes
+ * in the software without notification. NXP Semiconductors also makes no
+ * representation or warranty that such application will be suitable for the
+ * specified use without further testing or modification.
+ *
+ * @par
+ * Permission to use, copy, modify, and distribute this software and its
+ * documentation is hereby granted, under NXP Semiconductors' and its
+ * licensor's relevant copyrights in the software, without fee, provided that it
+ * is used in conjunction with NXP Semiconductors microcontrollers.  This
+ * copyright, permission, and disclaimer notice must appear in all copies of
+ * this code.
+ */
+
+#ifndef __BOARD_H_
+#define __BOARD_H_
+
+#include "board_ngx_xplorer_18304330.h"
+
+#endif /* __BOARD_H_ */

bsp/xplorer4330/libraries/lpc_chip/SConscript

+Import('RTT_ROOT')
+Import('rtconfig')
+from building import *
+
+cwd = GetCurrentDir()
+
+src = Glob('chip_18xx_43xx/*.c')
+src += Glob('chip_common/*.c')
+
+path = [cwd + '/chip_18xx_43xx',
+        cwd + '/chip_common']
+
+group = DefineGroup('lpc_chip', src, depend = [], CPPPATH = path)
+
+Return('group')

bsp/xplorer4330/libraries/lpc_ip/SConscript

+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c')
+CPPPATH = [cwd]
+
+group = DefineGroup('lpc_ip', src, depend = [], CPPPATH = CPPPATH)
+
+Return('group')