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体验新版 GitCode,发现更多精彩内容 >>
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2396515f
编写于
12月 11, 2018
作者:
H
Hao Zhu
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差异文件
[bsp][stm32] 添加野火stm32f767开发板bsp
上级
9d340ec6
变更
6
隐藏空白更改
内联
并排
Showing
6 changed file
with
14 addition
and
111 deletion
+14
-111
bsp/stm32/docs/STM32系列BSP添加教程.md
bsp/stm32/docs/STM32系列BSP添加教程.md
+1
-0
bsp/stm32/stm32f767-fire-challenger/README.md
bsp/stm32/stm32f767-fire-challenger/README.md
+2
-2
bsp/stm32/stm32f767-fire-challenger/board/Kconfig
bsp/stm32/stm32f767-fire-challenger/board/Kconfig
+0
-33
bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h
bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h
+0
-34
bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h
bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h
+11
-11
bsp/stm32/stm32f767-fire-challenger/board/ports/spi_flash_init.c
...32/stm32f767-fire-challenger/board/ports/spi_flash_init.c
+0
-31
未找到文件。
bsp/stm32/docs/STM32系列BSP添加教程.md
浏览文件 @
2396515f
...
...
@@ -59,6 +59,7 @@ STM32 BSP 由三部分组成,分别是 (1) 通用库、(2) BSP 模板和 (3)
| ------- | ---- |
| libraries/templates/stm32f10x | F1系列芯片模板 |
| libraries/templates/stm32f4xx | F4系列芯片模板 |
| libraries/templates/stm32f7xx | F7系列芯片模板 |
| libraries/templates/stm32l4xx | L4系列芯片模板 |
拷贝
`stm32/libraries/templates/stm32f10x`
文件夹并改名为
`stm32/stm32f103-atk-nano`
。如下图所示:
...
...
bsp/stm32/stm32f767-fire-challenger/README.md
浏览文件 @
2396515f
...
...
@@ -40,8 +40,8 @@
|
**板载外设**
|
**支持情况**
|
**备注**
|
| :----------------- | :----------: | :------------------------------------- |
| USB 转串口 | 支持 | |
|
SPI Flash | 支持
| |
| 以太网 |
支持
| |
|
QSPI Flash | 暂不支持
| |
| 以太网 |
暂不支持
| |
| SD卡 | 暂不支持 | |
| CAN | 暂不支持 | |
|
**片上外设**
|
**支持情况**
|
**备注**
|
...
...
bsp/stm32/stm32f767-fire-challenger/board/Kconfig
浏览文件 @
2396515f
...
...
@@ -17,39 +17,6 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_UART2
default n
config BSP_USING_SDRAM
bool "Enable SDRAM"
default n
config BSP_USING_SPI_FLASH
bool "Enable SPI FLASH (W25Q128 spi5)"
select BSP_USING_SPI5
select RT_USING_SFUD
select RT_SFUD_USING_SFDP
default n
config BSP_USING_MPU6050
bool "Enable MPU6050 (i2c1)"
select BSP_USING_I2C1
select PKG_USING_MPU6XXX
default n
config BSP_USING_ETH
bool "Enable Ethernet"
default n
select RT_USING_LWIP
if BSP_USING_ETH
config EXTERNAL_PHY_ADDRESS
hex
default 0x00
endif
config BSP_USING_POT
bool "Enable potentiometer"
select BSP_USING_ADC
select BSP_USING_ADC1
default n
endmenu
menu "On-chip Peripheral Drivers"
...
...
bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h
已删除
100644 → 0
浏览文件 @
9d340ec6
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-5 SummerGift first version
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtthread.h>
#include <board.h>
extern
const
struct
fal_flash_dev
stm32_onchip_flash
;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&stm32_onchip_flash, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WROD, "app", "onchip_flash", 0, 1008 * 1024, 0},\
{FAL_PART_MAGIC_WROD, "param", "onchip_flash", 1008* 1024 , 16 * 1024, 0},\
}
#endif
/* FAL_PART_HAS_TABLE_CFG */
#endif
/* _FAL_CFG_H_ */
bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h
浏览文件 @
2396515f
...
...
@@ -23,9 +23,9 @@
/* row bit numbers: 11, 12, 13 */
#define SDRAM_ROW_BITS 12
/* cas latency clock number: 1, 2, 3 */
#define SDRAM_CAS_LATENCY
3
#define SDRAM_CAS_LATENCY
2
/* read pipe delay: 0, 1, 2 */
#define SDRAM_RPIPE_DELAY
1
#define SDRAM_RPIPE_DELAY
0
/* clock divid: 2, 3 */
#define SDCLOCK_PERIOD 2
/* refresh rate counter */
...
...
@@ -33,21 +33,21 @@
#define SDRAM_SIZE ((uint32_t)0x800000)
/* Timing configuration for IS42S16400J */
/*
90 MHz of SD clock frequency (180
MHz/2) */
/*
108 MHz of SD clock frequency (216
MHz/2) */
/* TMRD: 2 Clock cycles */
#define LOADTOACTIVEDELAY 2
/* TXSR:
7x11.90
ns */
#define EXITSELFREFRESHDELAY
7
/* TRAS:
4x11.90
ns */
#define SELFREFRESHTIME
4
/* TRC: 7x
11.90
ns */
/* TXSR:
8x9.25
ns */
#define EXITSELFREFRESHDELAY
8
/* TRAS:
5x9.25
ns */
#define SELFREFRESHTIME
5
/* TRC: 7x
9.25
ns */
#define ROWCYCLEDELAY 7
/* TWR: 2 Clock cycles */
#define WRITERECOVERYTIME 2
/* TRP: 2x
11.90
ns */
/* TRP: 2x
9.25
ns */
#define RPDELAY 2
/* TRCD: 2x
11.90
ns */
#define RCDDELAY
2
/* TRCD: 2x
9.25
ns */
#define RCDDELAY
3
/* memory mode register */
#define SDRAM_MODEREG_BURST_LENGTH_1 ((uint16_t)0x0000)
...
...
bsp/stm32/stm32f767-fire-challenger/board/ports/spi_flash_init.c
已删除
100644 → 0
浏览文件 @
9d340ec6
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-27 SummerGift add spi flash port file
*/
#include <rtthread.h>
#include "spi_flash.h"
#include "spi_flash_sfud.h"
#include "drv_spi.h"
#if defined(BSP_USING_SPI_FLASH)
static
int
rt_hw_spi_flash_init
(
void
)
{
__HAL_RCC_GPIOF_CLK_ENABLE
();
rt_hw_spi_device_attach
(
"spi5"
,
"spi50"
,
GPIOF
,
GPIO_PIN_6
);
if
(
RT_NULL
==
rt_sfud_flash_probe
(
"W25Q128"
,
"spi50"
))
{
return
-
RT_ERROR
;
}
return
RT_EOK
;
}
INIT_COMPONENT_EXPORT
(
rt_hw_spi_flash_init
);
#endif
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