- 15 1月, 2020 5 次提交
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由 bigmagic 提交于
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由 bigmagic 提交于
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由 bigmagic 提交于
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由 Kevin Peng 提交于
This demo shows how protected storage works in RTT. It tests by write and read data over PSA APIs, then check the integrity. The test will run repeatedly, each time with different data. The TFM package does not support LPC55S69 board officially yet. Change-Id: Ib1cd4fc8166b21e3f774f092c95d2811d51123fe Signed-off-by: NKevin Peng <kevin.peng@arm.com> Signed-off-by: NKarl Zhang <karl.zhang@arm.com>
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由 Karl Zhang 提交于
Link TFM PS APIs and veneer library. This is a preparation to add a demo in RTT which can call into TFM for secure services. Change-Id: I19ea617690d174a28af29b1804674bcaae59f838 Signed-off-by: NKarl Zhang <karl.zhang@arm.com>
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- 13 1月, 2020 1 次提交
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由 wangyq2018 提交于
2.adapt to the new power management interface. 3.rename es32f0654 folder to essemi_es32f0654 folder. 4.add can driver.
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- 10 1月, 2020 4 次提交
- 09 1月, 2020 1 次提交
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由 chenxuuu 提交于
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- 08 1月, 2020 1 次提交
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由 linyiyang8475 提交于
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- 07 1月, 2020 1 次提交
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由 ethan.du 提交于
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- 06 1月, 2020 8 次提交
- 03 1月, 2020 9 次提交
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由 liuxinaliang 提交于
Signed-off-by: Nliuxinaliang <liuxianliang@rt-thread.com>
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由 amy qian 提交于
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由 amy qian 提交于
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由 amy qian 提交于
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由 amy qian 提交于
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由 Karl Zhang 提交于
RTT fits in NS flash when enabled TF-M for secure. Change-Id: Icfd796b7fbe8fba76f713f9d5a14bbdcb5dcd9d5 Signed-off-by: NKarl Zhang <karl.zhang@arm.com>
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由 Kevin Peng 提交于
This patch enables TF-M running on secure side and RT-Thread running on NS side by: 1. Updates the VTOR address 2. Remove a HW initialization which is already done in TF-M 3. Add a new project and linker script to build RTT in NS Note: There are no secure service calls to TF-M in this patch Change-Id: I4023a082cfb5c8df8a4f0ecc7ffee850daaadeb4 Signed-off-by: NKevin Peng <kevin.peng@arm.com> Signed-off-by: NKarl Zhang <karl.zhang@arm.com>
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由 liuxinaliang 提交于
Signed-off-by: Nliuxinaliang <liuxianliang@rt-thread.com>
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由 liuxinaliang 提交于
Signed-off-by: Nliuxinaliang <liuxianliang@rt-thread.com>
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- 02 1月, 2020 1 次提交
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由 Bernard Xiong 提交于
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- 30 12月, 2019 2 次提交
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由 lymzzyh 提交于
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由 liuxinaliang 提交于
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- 21 12月, 2019 1 次提交
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由 Bernard Xiong 提交于
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- 20 12月, 2019 2 次提交
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由 a1012112796 提交于
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由 tyustli 提交于
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- 17 12月, 2019 1 次提交
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由 Jiaxun Yang 提交于
LS1C selfboot feature have been rewiritten, and we changed bare boot base to 0x80000000 to better utilize memory. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com>
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- 12 12月, 2019 1 次提交
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由 HubretXie 提交于
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- 11 12月, 2019 2 次提交
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由 Jiaxun Yang 提交于
This bsp is used for test MIPS base code in simutator, implemented basic MIPS cpuport and serial port driver. Signed-off-by: NJiaxun Yang <jiaxun.yang@flygoat.com>
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由 armink_ztl 提交于
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