- 24 5月, 2013 1 次提交
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由 Grissiom 提交于
We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.
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- 08 1月, 2013 1 次提交
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由 Ming, Bai 提交于
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- 23 12月, 2011 1 次提交
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由 wuyangyong 提交于
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1869 bbd45198-f89e-11dd-88c7-29a3b14d5316
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- 23 6月, 2011 1 次提交
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由 qiuyiuestc 提交于
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1530 bbd45198-f89e-11dd-88c7-29a3b14d5316
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- 26 11月, 2010 1 次提交
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由 qiuyiuestc 提交于
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1118 bbd45198-f89e-11dd-88c7-29a3b14d5316
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- 25 12月, 2009 1 次提交
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由 qiuyiuestc 提交于
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@229 bbd45198-f89e-11dd-88c7-29a3b14d5316
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- 03 7月, 2009 1 次提交
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由 bernard.xiong 提交于
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@6 bbd45198-f89e-11dd-88c7-29a3b14d5316
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