Merge branch 'RT-Thread:master' into master

.github/workflows/action.yml

@@ -79,6 +79,7 @@ jobs:
          - {RTT_BSP: "stm32/stm32f103-yf-ufun", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32f107-uc-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32f207-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32f302-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32f401-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32f405-smdz-breadfruit", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32f407-atk-explorer", RTT_TOOL_CHAIN: "sourcery-arm"}
@@ -108,6 +109,7 @@ jobs:
          - {RTT_BSP: "stm32/stm32h747-st-discovery", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32h750-artpi-h750", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32l4r9-st-eval", RTT_TOOL_CHAIN: "sourcery-arm"}
+         - {RTT_BSP: "stm32/stm32l4r9-st-sensortile-box", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32l010-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32l053-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}
          - {RTT_BSP: "stm32/stm32l412-st-nucleo", RTT_TOOL_CHAIN: "sourcery-arm"}

.github/workflows/action_utest.yml

@@ -12,6 +12,7 @@ jobs:
       matrix:
        legs:
          - {UTEST: "kernel/mem",       RTT_BSP: "bsp/qemu-vexpress-a9",    QEMU_ARCH: "arm",      QEMU_MACHINE: "vexpress-a9", CONFIG_FILE: "kernel/mem.conf",     SD_FILE: "sd.bin"}
+         - {UTEST: "kernel/ipc",       RTT_BSP: "bsp/qemu-vexpress-a9",    QEMU_ARCH: "arm",      QEMU_MACHINE: "vexpress-a9", CONFIG_FILE: "kernel/ipc.conf",     SD_FILE: "sd.bin"}
          - {UTEST: "components/utest", RTT_BSP: "bsp/qemu-vexpress-a9",    QEMU_ARCH: "arm",      QEMU_MACHINE: "vexpress-a9", CONFIG_FILE: "utest_self/self.conf", SD_FILE: "sd.bin"}
          - {UTEST: "kernel/mem/riscv64", RTT_BSP: "bsp/qemu-riscv-virt64", QEMU_ARCH: "riscv64",  QEMU_MACHINE: "virt",  CONFIG_FILE: "kernel/mem.conf",   SD_FILE: "None"}
     env:

.ignore_format.yml

@@ -10,4 +10,5 @@ dir_path:
 - components/net/lwip-1.4.1
 - components/net/lwip-2.0.2
 - components/net/lwip-2.0.3
-- components/net/lwip-2.1.2
\ No newline at end of file
+- components/net/lwip-2.1.2
+- bsp/mm32f327x/Libraries

bsp/bluetrum/ab32vg1-ab-prougen/.config

@@ -29,6 +29,7 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=256
 #
 # CONFIG_RT_KSERVICE_USING_STDLIB is not set
 # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+# CONFIG_RT_USING_ASM_MEMCPY is not set
 CONFIG_RT_DEBUG=y
 # CONFIG_RT_DEBUG_COLOR is not set
 # CONFIG_RT_DEBUG_INIT_CONFIG is not set
@@ -74,6 +75,7 @@ CONFIG_RT_USING_DEVICE_OPS=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
+# CONFIG_RT_PRINTF_LONGLONG is not set
 CONFIG_RT_VER_NUM=0x40004
 # CONFIG_RT_USING_CPU_FFS is not set
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@@ -162,7 +164,7 @@ CONFIG_RT_USING_PIN=y
 CONFIG_RT_USING_LIBC=y
 # CONFIG_RT_USING_PTHREADS is not set
 # CONFIG_RT_USING_MODULE is not set
-CONFIG_RT_LIBC_FIXED_TIMEZONE=8
+CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 
 #
 # Network
@@ -568,6 +570,7 @@ CONFIG_RT_LIBC_FIXED_TIMEZONE=8
 #
 CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART0=y
+CONFIG_BSP_UART0_FIFO_SIZE=10
 # CONFIG_BSP_USING_UART1 is not set
 # CONFIG_BSP_USING_UART2 is not set
 # CONFIG_BSP_USING_SDIO is not set

bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig

 menu "Hardware Drivers Config"
 
+config SOC_AB32VG1
+    bool
+    select PKG_USING_BLUETRUM_SDK
+    default y
+
 menu "Onboard Peripheral Drivers"
 
     menuconfig BSP_USING_AUDIO
@@ -29,20 +34,40 @@ endmenu
 
 menu "On-chip Peripheral Drivers"
     menuconfig BSP_USING_UART
-		bool "Enable UART"
+        bool "Enable UART"
         if BSP_USING_UART
             config BSP_USING_UART0
                 bool "Enable UART0"
                 select RT_USING_SERIAL
                 default y
+            if BSP_USING_UART0
+                config BSP_UART0_FIFO_SIZE
+                    int "BSP_UART0_FIFO_SIZE"
+                    range 5 255
+                    default 10
+            endif
+
             config BSP_USING_UART1
                 bool "Enable UART1"
                 select RT_USING_SERIAL
                 default n
+            if BSP_USING_UART1
+                config BSP_UART1_FIFO_SIZE
+                    int "BSP_UART1_FIFO_SIZE"
+                    range 5 255
+                    default 10
+            endif
+
             config BSP_USING_UART2
                 bool "Enable UART2"
                 select RT_USING_SERIAL
                 default n
+            if BSP_USING_UART2
+                config BSP_UART2_FIFO_SIZE
+                    int "BSP_UART2_FIFO_SIZE"
+                    range 5 255
+                    default 10
+            endif
         endif
 
     config BSP_USING_SDIO
@@ -174,12 +199,12 @@ menu "On-chip Peripheral Drivers"
         default n
         if BSP_USING_ONCHIP_RTC
             config RTC_USING_INTERNAL_CLK
-            bool "Using internal clock RTC"
-            default y
+                bool "Using internal clock RTC"
+                default y
             config RTC_USING_1S_INT
-            bool "Using 1 second interrupt"
-            depends on RT_USING_ALARM
-            default n
+                bool "Using 1 second interrupt"
+                depends on RT_USING_ALARM
+                default n
         endif
 
     menuconfig BSP_USING_ADC

bsp/bluetrum/ab32vg1-ab-prougen/board/board.c

@@ -21,6 +21,7 @@ void set_cpu_irq_comm(void (*irq_hook)(void));
 void load_cache();
 void os_cache_init(void);
 void sys_error_hook(uint8_t err_no);
+void huart_timer_isr(void);
 
 typedef void (*spiflash_init_func)(uint8_t sf_read, uint8_t dummy);
 
@@ -29,6 +30,7 @@ static struct rt_mutex mutex_cache = {0};
 extern volatile rt_uint8_t rt_interrupt_nest;
 extern uint32_t __heap_start, __heap_end;
 
+#ifdef RT_USING_CONSOLE
 void hal_printf(const char *fmt, ...)
 {
     rt_device_t console = rt_console_get_device();
@@ -64,6 +66,7 @@ void hal_printf(const char *fmt, ...)
 #endif
     va_end(args);
 }
+#endif
 
 RT_SECTION(".irq.timer")
 void timer0_isr(int vector, void *param)
@@ -71,6 +74,9 @@ void timer0_isr(int vector, void *param)
     rt_interrupt_enter();
     TMR0CPND = BIT(9);
     rt_tick_increase();
+#ifdef RT_USING_SERIAL
+    huart_timer_isr();
+#endif
     rt_interrupt_leave();
 }
 
@@ -206,8 +212,10 @@ void exception_isr(void)
     extern long list_thread(void);
     sys_error_hook(1);
 
+#ifdef RT_USING_CONSOLE
     rt_console_set_device(RT_NULL);
     rt_kprintf(stack_info, rt_thread_self()->sp, rt_thread_self()->name);
+#endif
 
     while(1);
 }

bsp/bluetrum/ab32vg1-ab-prougen/rtconfig.h

@@ -91,7 +91,7 @@
 /* POSIX layer and C standard library */
 
 #define RT_USING_LIBC
-#define RT_LIBC_FIXED_TIMEZONE 8
+#define RT_LIBC_DEFAULT_TIMEZONE 8
 
 /* Network */
 
@@ -176,6 +176,7 @@
 
 #define BSP_USING_UART
 #define BSP_USING_UART0
+#define BSP_UART0_FIFO_SIZE 10
 
 /* Board extended module Drivers */
 

bsp/bluetrum/libraries/hal_drivers/SConscript

@@ -4,6 +4,7 @@ from building import *
 
 cwd     = GetCurrentDir()
 src     = []
+src    += ['drv_common.c']
 path    = [cwd]
 path   += [cwd + '/config']
 

bsp/bluetrum/libraries/hal_drivers/drv_common.c

+#include "drv_common.h"
+
+#define DRV_THREAD_PRIORITY         18
+#define DRV_THREAD_STACK_SIZE       512
+#define DRV_THREAD_TIMESLICE        5
+
+enum {
+    MSG_UART0_IRQ,
+    MSG_UART1_IRQ,
+    MSG_UART2_IRQ,
+};
+
+static rt_thread_t drv_tid = RT_NULL;
+static rt_mq_t drv_mq = RT_NULL;
+
+void uart0_irq_process(void);
+void uart1_irq_process(void);
+
+RT_SECTION(".irq.uart")
+void uart0_irq_post(void)
+{
+    uint8_t mq_msg = MSG_UART0_IRQ;
+    rt_mq_send(drv_mq, &mq_msg, 1);
+}
+
+RT_SECTION(".irq.uart")
+void uart1_irq_post(void)
+{
+    uint8_t mq_msg = MSG_UART1_IRQ;
+    rt_mq_send(drv_mq, &mq_msg, 1);
+}
+
+RT_SECTION(".irq.uart")
+void uart2_irq_post(void)
+{
+    uint8_t mq_msg = MSG_UART2_IRQ;
+    rt_mq_send(drv_mq, &mq_msg, 1);
+}
+
+static void drv_thread_entry(void *parameter)
+{
+    uint8_t mq_msg = 0;
+    while (1) {
+        rt_mq_recv(drv_mq, &mq_msg, 1, RT_WAITING_FOREVER);
+        switch (mq_msg) {
+#ifdef BSP_USING_UART0
+            case MSG_UART0_IRQ:
+                uart0_irq_process();
+                break;
+#endif
+#ifdef BSP_USING_UART1
+            case MSG_UART1_IRQ:
+                uart1_irq_process();
+                break;
+#endif
+#ifdef BSP_USING_UART2
+            case MSG_UART2_IRQ:
+                uart2_irq_process();
+                break;
+#endif
+            default:
+                break;
+        }
+    }
+}
+
+static int drv_thread_init(void)
+{
+    drv_mq = rt_mq_create("drv", 1, 128, RT_IPC_FLAG_FIFO);
+    drv_tid = rt_thread_create("drv",
+            drv_thread_entry,
+            RT_NULL,
+            DRV_THREAD_STACK_SIZE,
+            DRV_THREAD_PRIORITY,
+            DRV_THREAD_TIMESLICE);
+
+    if (drv_tid != RT_NULL)
+        rt_thread_startup(drv_tid);
+}
+INIT_PREV_EXPORT(drv_thread_init);

bsp/bluetrum/libraries/hal_drivers/drv_common.h

@@ -17,4 +17,8 @@
 
 #define GET_PIN(PORTx,PIN) (uint8_t)__AB32_GET_PIN_##PORTx(PIN)
 
+void uart0_irq_post(void);
+void uart1_irq_post(void);
+void uart2_irq_post(void);
+
 #endif // DRV_COMMON_H__

bsp/bluetrum/libraries/hal_drivers/drv_rtc.c

@@ -144,151 +144,68 @@ void hal_rtc_init(void)
 }
 /************** HAL End *******************/
 
-static time_t get_rtc_time_stamp(void)
+static rt_err_t ab32_rtc_get_secs(void *args)
 {
-    time_t sec = 0;
-
-    sec = irtc_time_read(RTCCNT_CMD);
-    LOG_D("get rtc time.");
+    *(rt_uint32_t *)args = irtc_time_read(RTCCNT_CMD);
+    LOG_D("RTC: get rtc_time %x\n", *(rt_uint32_t *)args);
 
-    return sec;
+    return RT_EOK;
 }
 
-static rt_err_t set_rtc_time_stamp(time_t time_stamp)
+static rt_err_t ab32_rtc_set_secs(void *args)
 {
-    irtc_time_write(RTCCNT_CMD, time_stamp);
+    irtc_time_write(RTCCNT_CMD, *(rt_uint32_t *)args);
 
     return RT_EOK;
 }
 
-static rt_err_t set_rtc_alarm_stamp(time_t alarm_stamp)
+static rt_err_t ab32_rtc_get_alarm(void *args)
 {
-    irtc_time_write(RTCALM_CMD, alarm_stamp);
+    *(rt_uint32_t *)args = irtc_time_read(RTCALM_CMD);
 
     return RT_EOK;
 }
 
-static time_t get_rtc_alarm_stamp(void)
+static rt_err_t ab32_rtc_set_alarm(void *args)
 {
-    time_t sec = 0;
-
-    sec = irtc_time_read(RTCALM_CMD);
+    irtc_time_write(RTCALM_CMD, *(rt_uint32_t *)args);
 
-    return sec;
+    return RT_EOK;
 }
 
-static void rt_rtc_init(void)
+static rt_err_t ab32_rtc_init(void)
 {
     hal_rtc_init();
-}
-
-static rt_err_t ab32_rtc_control(rt_device_t dev, int cmd, void *args)
-{
-    rt_err_t result = RT_EOK;
-    RT_ASSERT(dev != RT_NULL);
-    switch (cmd)
-    {
-    case RT_DEVICE_CTRL_RTC_GET_TIME:
-        *(time_t *)args = get_rtc_time_stamp();
-        LOG_D("RTC: get rtc_time %x", *(time_t *)args);
-        break;
-
-    case RT_DEVICE_CTRL_RTC_SET_TIME:
-        if (set_rtc_time_stamp(*(time_t *)args))
-        {
-            result = -RT_ERROR;
-        }
-        LOG_D("RTC: set rtc_time %x", *(time_t *)args);
-        break;
-    case RT_DEVICE_CTRL_RTC_SET_ALARM:
-        if (set_rtc_alarm_stamp(*(time_t *)args))
-        {
-            result = -RT_ERROR;
-        }
-        LOG_D("RTC: set alarm_stamp %x", *(time_t *)args);
-        break;
-    case RT_DEVICE_CTRL_RTC_GET_ALARM:
-        *(time_t *)args = get_rtc_alarm_stamp();
-        LOG_D("RTC: get alarm_stamp %x", *(time_t *)args);
-        break;
-    }
 
-    return result;
+    return RT_EOK;
 }
 
-#ifdef RT_USING_DEVICE_OPS
-const static struct rt_device_ops rtc_ops =
+static const struct rt_rtc_ops ab32_rtc_ops =
 {
+    ab32_rtc_init,
+    ab32_rtc_get_secs,
+    ab32_rtc_set_secs,
+    ab32_rtc_get_alarm,
+    ab32_rtc_set_alarm,
     RT_NULL,
     RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    RT_NULL,
-    ab32_rtc_control
 };
-#endif
-
-static rt_err_t rt_hw_rtc_register(rt_device_t device, const char *name, rt_uint32_t flag)
-{
-    RT_ASSERT(device != RT_NULL);
-
-    rt_rtc_init();
-#ifdef RT_USING_DEVICE_OPS
-    device->ops         = &rtc_ops;
-#else
-    device->init        = RT_NULL;
-    device->open        = RT_NULL;
-    device->close       = RT_NULL;
-    device->read        = RT_NULL;
-    device->write       = RT_NULL;
-    device->control     = ab32_rtc_control;
-#endif
-    device->type        = RT_Device_Class_RTC;
-    device->rx_indicate = RT_NULL;
-    device->tx_complete = RT_NULL;
-    device->user_data   = RT_NULL;
-
-    /* register a character device */
-    return rt_device_register(device, name, flag);
-}
-
-#ifdef RT_USING_ALARM
-RT_SECTION(".irq.rtc")
-static void rtc_isr(int vector, void *param)
-{
-    rt_interrupt_enter();
-
-    if (RTCCON & RTC_CON_ALM_PEND)
-    {
-        RTCCPND |= RTC_CPND_ALM;
-    }
-
-#ifdef RTC_USING_1S_INT
-    if (RTCCON & RTC_CON_1S_PEND)
-    {
-        RTCCPND |= RTC_CPND_1S;
-    }
-#endif
 
-    rt_interrupt_leave();
-}
-#endif
+static rt_rtc_dev_t ab32_rtc_dev;
 
-int rt_hw_rtc_init(void)
+static int rt_hw_rtc_init(void)
 {
     rt_err_t result;
 
-    result = rt_hw_rtc_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
+    ab32_rtc_dev.ops = &ab32_rtc_ops;
+    result = rt_hw_rtc_register(&ab32_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
     if (result != RT_EOK)
     {
         LOG_E("rtc register err code: %d", result);
         return result;
     }
-
-#ifdef RT_USING_ALARM
-    rt_hw_interrupt_install(IRQ_RTC_VECTOR, rtc_isr, RT_NULL, "rtc_isr");
-#endif
     LOG_D("rtc init success");
+
     return RT_EOK;
 }
 INIT_DEVICE_EXPORT(rt_hw_rtc_init);

bsp/bluetrum/libraries/hal_drivers/drv_usart.c

@@ -10,7 +10,7 @@
 
 #include "board.h"
 #include "drv_usart.h"
-#include <shell.h>
+#include "api_huart.h"
 
 #ifdef RT_USING_SERIAL
 
@@ -40,6 +40,7 @@ static struct ab32_uart_config uart_config[] =
         .name = "uart0",
         .instance = UART0_BASE,
         .mode = UART_MODE_TX_RX | UART_MODE_1LINE,
+        .fifo_size = BSP_UART0_FIFO_SIZE,
     },
 #endif
 #ifdef BSP_USING_UART1
@@ -47,6 +48,7 @@ static struct ab32_uart_config uart_config[] =
         .name = "uart1",
         .instance = UART1_BASE,
         .mode = UART_MODE_TX_RX,
+        .fifo_size = BSP_UART1_FIFO_SIZE,
     },
 #endif
 #ifdef BSP_USING_UART2
@@ -54,12 +56,17 @@ static struct ab32_uart_config uart_config[] =
         .name = "uart2",
         .instance = UART2_BASE,
         .mode = UART_MODE_TX_RX,
+        .fifo_size = BSP_UART2_FIFO_SIZE,
     }
 #endif
 };
 
 static struct ab32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
 
+#ifdef HUART_ENABLE
+static uint8_t huart_dma[512];
+#endif
+
 static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
     struct ab32_uart *uart;
@@ -101,7 +108,14 @@ static rt_err_t ab32_configure(struct rt_serial_device *serial, struct serial_co
     uart->dma_rx.last_index = 0;
 #endif
 
-    hal_uart_init(&uart->handle);
+    if (!uart->uart_dma_flag) {
+        hal_uart_init(&uart->handle);
+    }
+#ifdef HUART_ENABLE
+    else {
+        huart_init_do(HUART_TR_PB3, HUART_TR_PB4, uart->handle.init.baud, huart_dma, 512);
+    }
+#endif
 
     return RT_EOK;
 }
@@ -141,25 +155,55 @@ static int ab32_putc(struct rt_serial_device *serial, char ch)
     RT_ASSERT(serial != RT_NULL);
 
     uart = rt_container_of(serial, struct ab32_uart, serial);
-    hal_uart_clrflag(uart->handle.instance,  UART_FLAG_TXPND);
-    hal_uart_write(uart->handle.instance, ch);
-    while(hal_uart_getflag(uart->handle.instance, UART_FLAG_TXPND) == 0);
+
+    if (!uart->uart_dma_flag) {
+        hal_uart_clrflag(uart->handle.instance,  UART_FLAG_TXPND);
+        hal_uart_write(uart->handle.instance, ch);
+        while(hal_uart_getflag(uart->handle.instance, UART_FLAG_TXPND) == 0);
+    }
+#ifdef HUART_ENABLE
+    else {
+        huart_putchar(ch);
+    }
+#endif
 
     return 1;
 }
 
-RT_SECTION(".irq.usart")
 static int ab32_getc(struct rt_serial_device *serial)
 {
     int ch;
     struct ab32_uart *uart;
     RT_ASSERT(serial != RT_NULL);
+
     uart = rt_container_of(serial, struct ab32_uart, serial);
 
     ch = -1;
-    if(hal_uart_getflag(uart->handle.instance, UART_FLAG_RXPND) != HAL_RESET) {
-        ch = hal_uart_read(uart->handle.instance);
-        hal_uart_clrflag(uart->handle.instance, UART_FLAG_RXPND);
+    switch ((uint32_t)(uart->handle.instance)) {
+        case (uint32_t)UART0_BASE:
+            if (uart->rx_idx != uart->rx_idx_prev) {
+                ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
+            }
+            break;
+        case (uint32_t)UART1_BASE:
+#ifdef HUART_ENABLE
+            if ((uart->uart_dma_flag) && (huart_get_rxcnt())) {
+                ch = huart_getchar();
+            } else
+#endif
+            {
+                if (uart->rx_idx != uart->rx_idx_prev) {
+                    ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
+                }
+            }
+            break;
+        case (uint32_t)UART2_BASE:
+            if (uart->rx_idx != uart->rx_idx_prev) {
+                ch = (int)(uart->rx_buf[uart->rx_idx_prev++ % 10]);
+            }
+            break;
+        default:
+            break;
     }
 
     return ch;
@@ -170,78 +214,24 @@ static rt_size_t ab32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *
     return -1;
 }
 
-extern struct finsh_shell *shell;
-
-RT_SECTION(".irq.usart")
-static rt_err_t shell_rx_ind(void)
+void uart0_irq_process(void)
 {
-    RT_ASSERT(shell != RT_NULL);
-
-    /* release semaphore to let finsh thread rx data */
-    rt_sem_release(&shell->rx_sem);
-
-    return RT_EOK;
+    rt_hw_serial_isr(&(uart_obj[UART0_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
 }
 
-RT_SECTION(".irq.usart")
-void uart_irq_process(struct rt_serial_device *serial)
+#ifdef BSP_USING_UART1
+void uart1_irq_process(void)
 {
-    int ch = -1;
-    rt_base_t level;
-    struct rt_serial_rx_fifo* rx_fifo;
-
-    /* interrupt mode receive */
-    rx_fifo = (struct rt_serial_rx_fifo*)serial->serial_rx;
-    RT_ASSERT(rx_fifo != RT_NULL);
-
-    while (1)
-    {
-        ch = serial->ops->getc(serial);
-        if (ch == -1) break;
-
-
-        /* disable interrupt */
-        level = rt_hw_interrupt_disable();
-
-        rx_fifo->buffer[rx_fifo->put_index] = ch;
-        rx_fifo->put_index += 1;
-        if (rx_fifo->put_index >= serial->config.bufsz) rx_fifo->put_index = 0;
-
-        /* if the next position is read index, discard this 'read char' */
-        if (rx_fifo->put_index == rx_fifo->get_index)
-        {
-            rx_fifo->get_index += 1;
-            rx_fifo->is_full = RT_TRUE;
-            if (rx_fifo->get_index >= serial->config.bufsz) rx_fifo->get_index = 0;
-
-            // _serial_check_buffer_size();
-        }
-
-        /* enable interrupt */
-        rt_hw_interrupt_enable(level);
-    }
-
-    rt_size_t rx_length;
-
-    /* get rx length */
-    level = rt_hw_interrupt_disable();
-    rx_length = (rx_fifo->put_index >= rx_fifo->get_index)? (rx_fifo->put_index - rx_fifo->get_index):
-        (serial->config.bufsz - (rx_fifo->get_index - rx_fifo->put_index));
-    rt_hw_interrupt_enable(level);
-
-    if ((serial->parent.rx_indicate != RT_NULL) && (rx_length != 0)) {
-    #ifdef RT_CONSOLE_DEVICE_NAME
-        if (serial == &uart_obj[*(RT_CONSOLE_DEVICE_NAME + 4) - '0'].serial) {
-            shell_rx_ind();
-        } else
-    #endif
-        {
-            rt_kprintf("rx_indicate must loacted in the .comm section!\n");
-            //serial->parent.rx_indicate(&serial->parent, rx_length);
-        }
-    }
+    rt_hw_serial_isr(&(uart_obj[UART1_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
+}
+#endif
 
+#ifdef BSP_USING_UART2
+void uart2_irq_process(void)
+{
+    rt_hw_serial_isr(&(uart_obj[UART2_INDEX].serial), RT_SERIAL_EVENT_RX_IND);
 }
+#endif
 
 RT_SECTION(".irq.usart")
 static void uart_isr(int vector, void *param)
@@ -251,25 +241,50 @@ static void uart_isr(int vector, void *param)
 #ifdef BSP_USING_UART0
     if(hal_uart_getflag(UART0_BASE, UART_FLAG_RXPND))       //RX one byte finish
     {
-        uart_irq_process(&(uart_obj[UART0_INDEX].serial));
+        uart_obj[0].rx_buf[uart_obj[0].rx_idx++ % 10] = hal_uart_read(UART0_BASE);
+        hal_uart_clrflag(UART0_BASE, UART_FLAG_RXPND);
+        uart0_irq_post();
     }
 #endif
 #ifdef BSP_USING_UART1
     if(hal_uart_getflag(UART1_BASE, UART_FLAG_RXPND))       //RX one byte finish
     {
-        uart_irq_process(&(uart_obj[UART1_INDEX].serial));
+        uart_obj[1].rx_buf[uart_obj[1].rx_idx++ % 10] = hal_uart_read(UART1_BASE);
+        hal_uart_clrflag(UART1_BASE, UART_FLAG_RXPND);
+        uart1_irq_post();
     }
 #endif
 #ifdef BSP_USING_UART2
     if(hal_uart_getflag(UART2_BASE, UART_FLAG_RXPND))       //RX one byte finish
     {
-        uart_irq_process(&(uart_obj[UART2_INDEX].serial));
+        uart_obj[2].rx_buf[uart_obj[2].rx_idx++ % 10] = hal_uart_read(UART2_BASE);
+        hal_uart_clrflag(UART2_BASE, UART_FLAG_RXPND);
+        uart2_irq_post();
     }
 #endif
 
     rt_interrupt_leave();
 }
 
+#ifdef HUART_ENABLE
+RT_SECTION(".irq.huart")
+void huart_timer_isr(void)
+{
+    huart_if_rx_ovflow();
+
+    if (0 == huart_get_rxcnt()) {
+        return;
+    }
+
+    uart1_irq_post();
+}
+#else
+RT_SECTION(".irq.huart")
+void huart_timer_isr(void)
+{
+}
+#endif
+
 static const struct rt_uart_ops ab32_uart_ops =
 {
     .configure = ab32_configure,
@@ -291,9 +306,17 @@ int rt_hw_usart_init(void)
     {
         /* init UART object */
         uart_obj[i].config          = &uart_config[i];
+        uart_obj[i].rx_idx          = 0;
+        uart_obj[i].rx_idx_prev     = 0;
         uart_obj[i].serial.ops      = &ab32_uart_ops;
         uart_obj[i].serial.config   = config;
         uart_obj[i].serial.config.baud_rate = 1500000;
+        uart_obj[i].rx_buf          = rt_malloc(uart_config[i].fifo_size);
+
+        if (uart_obj[i].rx_buf == RT_NULL) {
+            LOG_E("uart%d malloc failed!", i);
+            continue;
+        }
 
         /* register UART device */
         result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
@@ -305,7 +328,7 @@ int rt_hw_usart_init(void)
         RT_ASSERT(result == RT_EOK);
     }
 
-   return result;
+    return result;
 }
 
 #endif

bsp/bluetrum/libraries/hal_drivers/drv_usart.h

@@ -19,9 +19,10 @@
 struct ab32_uart_config
 {
     const char *name;
-    hal_sfr_t instance;
-    uint8_t mode;
-    uint8_t reserve[3];
+    hal_sfr_t   instance;
+    uint8_t     mode;
+    uint16_t    fifo_size;
+    uint8_t     reserve[1];
     // struct dma_config *dma_rx;
     // struct dma_config *dma_tx;
 };
@@ -45,6 +46,9 @@ struct ab32_uart
 #endif
     rt_uint16_t uart_dma_flag;
     struct rt_serial_device serial;
+    rt_uint8_t *rx_buf;
+    rt_uint8_t rx_idx;
+    rt_uint8_t rx_idx_prev;
 };
 
 #endif

bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/SConscript

@@ -48,8 +48,8 @@ ASFLAGS          = ""
 CPPDEFINES       = []
 LOCAL_CPPDEFINES = []
 
-LIBS             = ['hal'] 
-LIBPATH          = [CWD]
+LIBS             = [] 
+LIBPATH          = []
 
 LINKFLAGS        = "" 
 

bsp/bluetrum/libraries/hal_libraries/ab32vg1_hal/include/api_huart.h

+#ifndef API_HUART_H__
+#define API_HUART_H__
+
+enum {
+    HUART_TR_PA7    = 0,
+    HUART_TR_PB2,
+    HUART_TR_PB3,
+    HUART_TR_PE7,
+    HUART_TR_PA1,
+    HUART_TR_PA6,
+    HUART_TR_PB1,
+    HUART_TR_PB4,
+    HUART_TR_PE6,
+    HUART_TR_PA0,
+};
+
+void huart_init_do(uint8_t tx_port, uint8_t rx_port, uint32_t baud_rate, uint8_t *buf, uint16_t buf_size);
+void huart_setbaudrate(unsigned int baudrate);
+void huart_putchar(const char ch);
+void huart_tx(const void *buf, unsigned int len);
+unsigned int huart_get_rxcnt(void);
+void huart_rxfifo_clear(void);
+char huart_getchar(void);
+void huart_exit(void);
+
+void huart_if_rx_ovflow(void);
+
+#endif

bsp/mm32f327x/.config

+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+# CONFIG_RT_USING_TIMER_SOFT is not set
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+CONFIG_RT_DEBUG=y
+CONFIG_RT_DEBUG_COLOR=y
+# CONFIG_RT_DEBUG_INIT_CONFIG is not set
+# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
+# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
+# CONFIG_RT_DEBUG_IPC_CONFIG is not set
+# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
+# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
+# CONFIG_RT_DEBUG_MEM_CONFIG is not set
+# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
+# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
+# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_MEMHEAP=y
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+# CONFIG_RT_PRINTF_LONGLONG is not set
+CONFIG_RT_VER_NUM=0x40003
+# CONFIG_RT_USING_CPU_FFS is not set
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=1024
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=1024
+CONFIG_FINSH_CMD_SIZE=80
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_USING_MSH_DEFAULT=y
+# CONFIG_FINSH_USING_MSH_ONLY is not set
+CONFIG_FINSH_ARG_MAX=10
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+# CONFIG_RT_USING_LIBC is not set
+# CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_LIBC_USING_TIME=y
+CONFIG_RT_LIBC_FIXED_TIMEZONE=8
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set
+
+#
+# system packages
+#
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_COWSAY is not set
+
+#
+# Hardware Drivers Config
+#
+
+#
+# On-chip Peripheral Drivers
+#
+
+#
+# GPIO Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+
+#
+# UART Drivers
+#
+CONFIG_BSP_USING_UART1=y
+CONFIG_BSP_USING_UART2=y
+CONFIG_SOC_MM32F373=y

bsp/mm32f327x/Kconfig

+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+source "drivers/Kconfig"
+
+config SOC_MM32F373
+    bool 
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    default y

bsp/mm32f327x/Libraries/CMSIS/IAR_Core/arm_common_tables.h

+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables.h
+ * Description:  Extern declaration for common tables
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoef_16_q31[24];
+extern const q31_t twiddleCoef_32_q31[48];
+extern const q31_t twiddleCoef_64_q31[96];
+extern const q31_t twiddleCoef_128_q31[192];
+extern const q31_t twiddleCoef_256_q31[384];
+extern const q31_t twiddleCoef_512_q31[768];
+extern const q31_t twiddleCoef_1024_q31[1536];
+extern const q31_t twiddleCoef_2048_q31[3072];
+extern const q31_t twiddleCoef_4096_q31[6144];
+extern const q15_t twiddleCoef_16_q15[24];
+extern const q15_t twiddleCoef_32_q15[48];
+extern const q15_t twiddleCoef_64_q15[96];
+extern const q15_t twiddleCoef_128_q15[192];
+extern const q15_t twiddleCoef_256_q15[384];
+extern const q15_t twiddleCoef_512_q15[768];
+extern const q15_t twiddleCoef_1024_q15[1536];
+extern const q15_t twiddleCoef_2048_q15[3072];
+extern const q15_t twiddleCoef_4096_q15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+/* floating-point bit reversal tables */
+#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
+#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
+#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
+#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
+
+/* fixed-point bit reversal tables */
+#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
+#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
+#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
+#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
+#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
+#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
+#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+
+/* Tables for Fast Math Sine and Cosine */
+extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+
+#endif /*  ARM_COMMON_TABLES_H */

bsp/mm32f327x/Libraries/CMSIS/IAR_Core/arm_const_structs.h

+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.h
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() function.
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#endif

bsp/mm32f327x/Libraries/CMSIS/IAR_Core/cmsis_compiler.h

+/**************************************************************************//**
+ * @file     cmsis_compiler.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V5.0.1
+ * @date     30. January 2017
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include <stdint.h>
+
+/*
+ * ARM Compiler 4/5
+ */
+#if   defined ( __CC_ARM )
+#include "cmsis_armcc.h"
+
+
+/*
+ * ARM Compiler 6 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+#include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+
+#ifndef   __ASM
+#define __ASM                     __asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+
+#include <cmsis_iar.h>
+
+#ifndef   __NO_RETURN
+#define __NO_RETURN               __noreturn
+#endif
+#ifndef   __USED
+#define __USED                    __root
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __weak
+#endif
+#ifndef   __UNALIGNED_UINT32
+__packed struct T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+#define __ALIGNED(x)
+#endif
+#ifndef   __PACKED
+#define __PACKED                  __packed
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           __packed struct
+#endif
+
+
+/*
+ * TI ARM Compiler
+ */
+#elif defined ( __TI_ARM__ )
+#include <cmsis_ccs.h>
+
+#ifndef   __ASM
+#define __ASM                     __asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+#ifndef   __NO_RETURN
+#define __NO_RETURN               __attribute__((noreturn))
+#endif
+#ifndef   __USED
+#define __USED                    __attribute__((used))
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __attribute__((weak))
+#endif
+#ifndef   __UNALIGNED_UINT32
+struct __attribute__((packed)) T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#define __ALIGNED(x)              __attribute__((aligned(x)))
+#endif
+#ifndef   __PACKED
+#define __PACKED                  __attribute__((packed))
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           struct __attribute__((packed))
+#endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+#ifndef   __ASM
+#define __ASM                     __asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+#ifndef   __NO_RETURN
+#define __NO_RETURN               __attribute__((noreturn))
+#endif
+#ifndef   __USED
+#define __USED                    __attribute__((used))
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __attribute__((weak))
+#endif
+#ifndef   __UNALIGNED_UINT32
+struct __packed__ T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#define __ALIGNED(x)              __align(x)
+#endif
+#ifndef   __PACKED
+#define __PACKED                  __packed__
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           struct __packed__
+#endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+#include <cmsis_csm.h>
+
+#ifndef   __ASM
+#define __ASM                     _asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+#ifndef   __NO_RETURN
+// NO RETURN is automatically detected hence no warning here
+#define __NO_RETURN
+#endif
+#ifndef   __USED
+#warning No compiler specific solution for __USED. __USED is ignored.
+#define __USED
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __weak
+#endif
+#ifndef   __UNALIGNED_UINT32
+@packed struct T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+#define __ALIGNED(x)
+#endif
+#ifndef   __PACKED
+#define __PACKED                  @packed
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           @packed struct
+#endif
+
+
+#else
+#error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+

bsp/mm32f327x/Libraries/CMSIS/IAR_Core/tz_context.h

+/*
+ * Copyright (c) 2015-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * $Date:        21. September 2016
+ * $Revision:    V1.0
+ *
+ * Project:      TrustZone for ARMv8-M
+ * Title:        Context Management for ARMv8-M TrustZone
+ *
+ * Version 1.0
+ *    Initial Release
+ *---------------------------------------------------------------------------*/
+
+#ifndef TZ_CONTEXT_H
+#define TZ_CONTEXT_H
+
+#include <stdint.h>
+
+#ifndef TZ_MODULEID_T
+#define TZ_MODULEID_T
+/// \details Data type that identifies secure software modules called by a process.
+typedef uint32_t TZ_ModuleId_t;
+#endif
+
+/// \details TZ Memory ID identifies an allocated memory slot.
+typedef uint32_t TZ_MemoryId_t;
+
+/// Initialize secure context memory system
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_InitContextSystem_S (void);
+
+/// Allocate context memory for calling secure software modules in TrustZone
+/// \param[in]  module   identifies software modules called from non-secure mode
+/// \return value != 0 id TrustZone memory slot identifier
+/// \return value 0    no memory available or internal error
+TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
+
+/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
+
+/// Load secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
+
+/// Store secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
+
+#endif  // TZ_CONTEXT_H

bsp/mm32f327x/Libraries/CMSIS/KEIL_Core/arm_common_tables.h

+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables.h
+ * Description:  Extern declaration for common tables
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+extern const uint16_t armBitRevTable[1024];
+extern const q15_t armRecipTableQ15[64];
+extern const q31_t armRecipTableQ31[64];
+extern const float32_t twiddleCoef_16[32];
+extern const float32_t twiddleCoef_32[64];
+extern const float32_t twiddleCoef_64[128];
+extern const float32_t twiddleCoef_128[256];
+extern const float32_t twiddleCoef_256[512];
+extern const float32_t twiddleCoef_512[1024];
+extern const float32_t twiddleCoef_1024[2048];
+extern const float32_t twiddleCoef_2048[4096];
+extern const float32_t twiddleCoef_4096[8192];
+#define twiddleCoef twiddleCoef_4096
+extern const q31_t twiddleCoef_16_q31[24];
+extern const q31_t twiddleCoef_32_q31[48];
+extern const q31_t twiddleCoef_64_q31[96];
+extern const q31_t twiddleCoef_128_q31[192];
+extern const q31_t twiddleCoef_256_q31[384];
+extern const q31_t twiddleCoef_512_q31[768];
+extern const q31_t twiddleCoef_1024_q31[1536];
+extern const q31_t twiddleCoef_2048_q31[3072];
+extern const q31_t twiddleCoef_4096_q31[6144];
+extern const q15_t twiddleCoef_16_q15[24];
+extern const q15_t twiddleCoef_32_q15[48];
+extern const q15_t twiddleCoef_64_q15[96];
+extern const q15_t twiddleCoef_128_q15[192];
+extern const q15_t twiddleCoef_256_q15[384];
+extern const q15_t twiddleCoef_512_q15[768];
+extern const q15_t twiddleCoef_1024_q15[1536];
+extern const q15_t twiddleCoef_2048_q15[3072];
+extern const q15_t twiddleCoef_4096_q15[6144];
+extern const float32_t twiddleCoef_rfft_32[32];
+extern const float32_t twiddleCoef_rfft_64[64];
+extern const float32_t twiddleCoef_rfft_128[128];
+extern const float32_t twiddleCoef_rfft_256[256];
+extern const float32_t twiddleCoef_rfft_512[512];
+extern const float32_t twiddleCoef_rfft_1024[1024];
+extern const float32_t twiddleCoef_rfft_2048[2048];
+extern const float32_t twiddleCoef_rfft_4096[4096];
+
+/* floating-point bit reversal tables */
+#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
+#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
+#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
+#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
+#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
+#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
+
+/* fixed-point bit reversal tables */
+#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
+#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
+#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
+#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
+#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
+#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
+#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+
+extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+
+/* Tables for Fast Math Sine and Cosine */
+extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+
+#endif /*  ARM_COMMON_TABLES_H */

bsp/mm32f327x/Libraries/CMSIS/KEIL_Core/arm_const_structs.h

+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.h
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() function.
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#endif

bsp/mm32f327x/Libraries/CMSIS/KEIL_Core/cmsis_compiler.h

+/**************************************************************************//**
+ * @file     cmsis_compiler.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V5.0.1
+ * @date     30. January 2017
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include <stdint.h>
+
+/*
+ * ARM Compiler 4/5
+ */
+#if   defined ( __CC_ARM )
+#include "cmsis_armcc.h"
+
+
+/*
+ * ARM Compiler 6 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+#include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+#include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+
+#ifndef   __ASM
+#define __ASM                     __asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+
+#include <cmsis_iar.h>
+
+#ifndef   __NO_RETURN
+#define __NO_RETURN               __noreturn
+#endif
+#ifndef   __USED
+#define __USED                    __root
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __weak
+#endif
+#ifndef   __UNALIGNED_UINT32
+__packed struct T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+#define __ALIGNED(x)
+#endif
+#ifndef   __PACKED
+#define __PACKED                  __packed
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           __packed struct
+#endif
+
+
+/*
+ * TI ARM Compiler
+ */
+#elif defined ( __TI_ARM__ )
+#include <cmsis_ccs.h>
+
+#ifndef   __ASM
+#define __ASM                     __asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+#ifndef   __NO_RETURN
+#define __NO_RETURN               __attribute__((noreturn))
+#endif
+#ifndef   __USED
+#define __USED                    __attribute__((used))
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __attribute__((weak))
+#endif
+#ifndef   __UNALIGNED_UINT32
+struct __attribute__((packed)) T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#define __ALIGNED(x)              __attribute__((aligned(x)))
+#endif
+#ifndef   __PACKED
+#define __PACKED                  __attribute__((packed))
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           struct __attribute__((packed))
+#endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+/*
+ * The CMSIS functions have been implemented as intrinsics in the compiler.
+ * Please use "carm -?i" to get an up to date list of all intrinsics,
+ * Including the CMSIS ones.
+ */
+
+#ifndef   __ASM
+#define __ASM                     __asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+#ifndef   __NO_RETURN
+#define __NO_RETURN               __attribute__((noreturn))
+#endif
+#ifndef   __USED
+#define __USED                    __attribute__((used))
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __attribute__((weak))
+#endif
+#ifndef   __UNALIGNED_UINT32
+struct __packed__ T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#define __ALIGNED(x)              __align(x)
+#endif
+#ifndef   __PACKED
+#define __PACKED                  __packed__
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           struct __packed__
+#endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+#include <cmsis_csm.h>
+
+#ifndef   __ASM
+#define __ASM                     _asm
+#endif
+#ifndef   __INLINE
+#define __INLINE                  inline
+#endif
+#ifndef   __STATIC_INLINE
+#define __STATIC_INLINE           static inline
+#endif
+#ifndef   __NO_RETURN
+// NO RETURN is automatically detected hence no warning here
+#define __NO_RETURN
+#endif
+#ifndef   __USED
+#warning No compiler specific solution for __USED. __USED is ignored.
+#define __USED
+#endif
+#ifndef   __WEAK
+#define __WEAK                    __weak
+#endif
+#ifndef   __UNALIGNED_UINT32
+@packed struct T_UINT32 {
+    uint32_t v;
+};
+#define __UNALIGNED_UINT32(x)     (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __ALIGNED
+#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+#define __ALIGNED(x)
+#endif
+#ifndef   __PACKED
+#define __PACKED                  @packed
+#endif
+#ifndef   __PACKED_STRUCT
+#define __PACKED_STRUCT           @packed struct
+#endif
+
+
+#else
+#error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+

bsp/mm32f327x/Libraries/CMSIS/KEIL_Core/tz_context.h

+/*
+ * Copyright (c) 2015-2016 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * $Date:        21. September 2016
+ * $Revision:    V1.0
+ *
+ * Project:      TrustZone for ARMv8-M
+ * Title:        Context Management for ARMv8-M TrustZone
+ *
+ * Version 1.0
+ *    Initial Release
+ *---------------------------------------------------------------------------*/
+
+#ifndef TZ_CONTEXT_H
+#define TZ_CONTEXT_H
+
+#include <stdint.h>
+
+#ifndef TZ_MODULEID_T
+#define TZ_MODULEID_T
+/// \details Data type that identifies secure software modules called by a process.
+typedef uint32_t TZ_ModuleId_t;
+#endif
+
+/// \details TZ Memory ID identifies an allocated memory slot.
+typedef uint32_t TZ_MemoryId_t;
+
+/// Initialize secure context memory system
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_InitContextSystem_S (void);
+
+/// Allocate context memory for calling secure software modules in TrustZone
+/// \param[in]  module   identifies software modules called from non-secure mode
+/// \return value != 0 id TrustZone memory slot identifier
+/// \return value 0    no memory available or internal error
+TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
+
+/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
+
+/// Load secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
+
+/// Store secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
+
+#endif  // TZ_CONTEXT_H

bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/dtype.h

+////////////////////////////////////////////////////////////////////////////////
+/// @file:   dtype.h
+/// @author  AE TEAM
+/// @brief   Define the data types to be used in the project, including the function
+///          library and application code. Use the data types defined in this file.
+////////////////////////////////////////////////////////////////////////////////
+#ifndef __DTYPE_H
+#define __DTYPE_H     //This is done to avoid including the header file repeatedly in the same file
+
+
+//Defines the read and write characteristics of data, which is often used for storage limits of peripheral registers
+#ifndef __I
+#define     __I     volatile const    //only read
+#endif
+#ifndef __O
+#define     __O     volatile          //only write
+#endif
+#ifndef __IO
+#define     __IO    volatile          //read write
+#endif
+
+//Common data type definitions
+
+typedef unsigned char  int8u;         //haven't symbol8 bit integer variable
+typedef signed   char  int8s;         //have symbol8 bit integer variable
+typedef unsigned short int16u;        //haven't symbol16 bit integer variable
+typedef signed   short int16s;        //have symbol16 bit integer variable
+typedef unsigned int   int32u;        //haven't symbol32 bit integer variable
+typedef signed   int   int32s;        //have symbol32 bit integer variable
+typedef float          fp32;          //Single-precision floating-point number (32-bit length)
+typedef double         fp64;          //Double-precision floating-point number (64-bit length)
+
+#endif  //__DTYPE_H

bsp/mm32f327x/Libraries/MM32F327x/HAL_Lib/Inc/hal_conf.h

+////////////////////////////////////////////////////////////////////////////////
+/// @file     hal_conf.h
+/// @author   AE TEAM
+/// @brief    THIS FILE CONTAINS ALL THE FUNCTIONS PROTOTYPES FOR THE GENERIC MICROCONTROLLER
+///           FIRMWARE LIBRARY.
+////////////////////////////////////////////////////////////////////////////////
+/// @attention
+///
+/// THE EXISTING FIRMWARE IS ONLY FOR REFERENCE, WHICH IS DESIGNED TO PROVIDE
+/// CUSTOMERS WITH CODING INFORMATION ABOUT THEIR PRODUCTS SO THEY CAN SAVE
+/// TIME. THEREFORE, MINDMOTION SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT OR
+/// CONSEQUENTIAL DAMAGES ABOUT ANY CLAIMS ARISING OUT OF THE CONTENT OF SUCH
+/// HARDWARE AND/OR THE USE OF THE CODING INFORMATION CONTAINED HEREIN IN
+/// CONNECTION WITH PRODUCTS MADE BY CUSTOMERS.
+///
+/// <H2><CENTER>&COPY; COPYRIGHT MINDMOTION </CENTER></H2>
+////////////////////////////////////////////////////////////////////////////////
+
+// Define to prevent recursive inclusion
+#ifndef __HAL_CONF_H
+#define __HAL_CONF_H
+// Files includes
+#include "mm32_device.h"
+
+#include "hal_adc.h"
+#include "hal_bkp.h"
+#include "hal_can.h"
+#include "hal_comp.h"
+#include "hal_crc.h"
+#include "hal_crs.h"
+#include "hal_dac.h"
+#include "hal_dbg.h"
+#include "hal_dma.h"
+#include "hal_exti.h"
+#include "hal_flash.h"
+#include "hal_gpio.h"
+#include "hal_i2c.h"
+#include "hal_iwdg.h"
+#include "hal_misc.h"
+#include "hal_pwr.h"
+#include "hal_rcc.h"
+#include "hal_rtc.h"
+#include "hal_spi.h"
+#include "hal_syscfg.h"
+#include "hal_tim.h"
+#include "hal_uart.h"
+#include "hal_uid.h"
+#include "hal_wwdg.h"
+#include "hal_redefine.h"
+#include "hal_eth.h"
+#include "hal_eth_conf.h"
+#include "hal_fsmc.h"
+
+/// @}
+
+/// @}
+
+/// @}
+
+////////////////////////////////////////////////////////////////////////////////
+#endif //__HAL_CONF_H
+////////////////////////////////////////////////////////////////////////////////