提交 3677f4de 编写于 作者: B Bernard Xiong

Merge branch 'master' of https://github.com/RT-Thread/rt-thread

此差异已折叠。
......@@ -3,17 +3,17 @@
[![Build Status](https://travis-ci.org/RT-Thread/rt-thread.svg)](https://travis-ci.org/RT-Thread/rt-thread)
[![Gitter](https://badges.gitter.im/Join Chat.svg)](https://gitter.im/RT-Thread/rt-thread?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge&utm_content=badge)
RT-Thread is an open source real-time operating system for embedded devices from China. RT-Thread RTOS is a scalable real-time operating system: a tiny kernel for ARM Cortex-M0, Cortex-M3/4/7, or a rich feature system like ARM Cortex-A8, ARM Cortex-A9 DualCore etc.
RT-Thread is an open source real-time operating system for embedded devices from China, which has strong scalability: from a tiny kernel running on a tiny core, for example ARM Cortex-M0, or Cortex-M3/4/7, to a rich feature system running on ARM Cortex-A8, ARM Cortex-A9 DualCore etc.
## Overview ##
RT-Thread RTOS like a traditional real-time operating system. The kernel has real-time multi-task scheduling, semaphore, mutex, mail box, message queue etc. However, it has two different things:
RT-Thread RTOS like a traditional real-time operating system. The kernel has real-time multi-task scheduling, semaphore, mutex, mail box, message queue etc. However, it has three different things:
* Device Driver;
* Component;
* Application Module
The device driver is more like a driver framework, UART, IIC, SPI, SDIO, USB device/host, EMAC, MTD NAND etc. The developer can easily add low level driver and board configuration, then he/she can use lots of features.
The device driver is more like a driver framework, UART, IIC, SPI, SDIO, USB device/host, EMAC, MTD NAND etc. The developer can easily add low level driver and board configuration, then combined with the upper framework, he/she can use lots of features.
The Component is a software concept upon RT-Thread kernel, for example a shell (finsh/msh shell), virtual file system (FAT, YAFFS, UFFS, ROM/RAM file system etc), TCP/IP protocol stack (lwIP), POSIX (thread) interface etc. One component must be a directory under RT-Thread/Components and one component can be descripted by a SConscript file (then be compiled and linked into the system).
......@@ -41,7 +41,6 @@ As a special exception, including RT-Thread RTOS header files in a file, instant
## Usage ##
RT-Thread RTOS uses [scons](http://www.scons.org) as building system. Therefore, please install scons and Python 2.7 firstly.
So far, the RT-Thread scons building system support the command line compile or generate some IDE's project. There are some option varaibles in the scons building script (rtconfig.py):
* ```CROSS_TOOL``` the compiler which you want to use, gcc/keil/iar.
......@@ -58,7 +57,7 @@ When you set these variables correctly, you can use command:
under BSP directory to simplely compile RT-Thread RTOS.
If you want to generate the IDE's project file, you can use command:
s
scons --target=mdk/mdk4/mdk5/iar/cb -s
to generate the project file.
......@@ -67,4 +66,4 @@ NOTE: RT-Thread scons building system will tailor the system according to your r
## Contribution ##
Thank all of RT-Thread Developers.
Please refer the contributors in the github. Thank all of RT-Thread Developers.
......@@ -641,7 +641,6 @@ int dfs_elm_stat(struct dfs_filesystem *fs, const char *path, struct stat *st)
st->st_size = file_info.fsize;
st->st_mtime = file_info.ftime;
st->st_blksize = 512;
}
#if _USE_LFN
......
......@@ -30,8 +30,5 @@ Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
# build program
env.Program(TARGET, objs)
# end building
EndBuilding(TARGET)
# do building
DoBuilding(TARGET, objs)
......@@ -221,12 +221,12 @@
#define SCS_Val 0x00000020
#define CLKSRCSEL_Val 0x00000001
#define PLL0_SETUP 1
#define PLL0CFG_Val 0x0000000a
#define PLL0CFG_Val 0x00000009
#define PLL1_SETUP 1
#define PLL1CFG_Val 0x00000023
#define CCLKSEL_Val 0x00000101
#define USBCLKSEL_Val 0x00000201
#define EMCCLKSEL_Val 0x00000001
#define EMCCLKSEL_Val 0x00000000
#define PCLKSEL_Val 0x00000002
#define SPIFICLKSEL_Val 0x00000002
#define PCONP_Val 0x042887DE
......
......@@ -18,6 +18,6 @@ elif rtconfig.CROSS_TOOL == 'keil':
elif rtconfig.CROSS_TOOL == 'iar':
src += ['NXP/LPC407x_8x_177x_8x/Source/Templates/IAR/startup_LPC407x_8x_177x_8x.s']
group = DefineGroup('CMSIS', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES = CPPDEFINES)
Return('group')
......@@ -52,9 +52,10 @@ void rt_hw_board_init()
#endif
/* init systick */
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND - 1);
/* set pend exception priority */
NVIC_SetPriority(PendSV_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
/*init uart device*/
rt_hw_uart_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
......@@ -64,5 +65,5 @@ void rt_hw_board_init()
lpc_sdram_hw_init();
rt_kprintf("done!\n");
#endif
rt_components_board_init();
// rt_components_board_init();
}
......@@ -11,6 +11,7 @@
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
* 2010-02-04 Magicoe add board.h to LPC176x bsp
* 2013-12-18 Bernard porting to LPC4088 bsp
*/
#ifndef __BOARD_H__
......@@ -19,10 +20,21 @@
#include "LPC407x_8x_177x_8x.h"
#include <rtthread.h>
/* SRAM allocation for Peripherals */
#define USB_RAM_BASE 0x20000000
#define MCI_RAM_BASE 0x20002000
#define ETH_RAM_BASE 0x20004000
/* use SDRAM in default */
#define LPC_EXT_SDRAM 1
/* disable SDRAM in default */
#ifndef LPC_EXT_SDRAM
#define LPC_EXT_SDRAM 0
#endif
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="LPC_EXT_SDRAM" description="Enable External SDRAM memory" default="0" />
//#define LPC_EXT_SDRAM 0
// <integer name="LPC_EXT_SDRAM" description="Begin Address of External SDRAM" default="0xA0000000" />
#define LPC_EXT_SDRAM_BEGIN 0xA0000000
// <integer name="LPC_EXT_SDRAM_END" description="End Address of External SDRAM" default="0xA2000000" />
......@@ -47,7 +59,7 @@ extern int Image$$RW_IRAM1$$ZI$$Limit;
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END (0x10000000 + 0x10000)
#define HEAP_END (void*)(0x10000000 + 0x10000)
#define FINSH_DEVICE_NAME RT_CONSOLE_DEVICE_NAME
void rt_hw_board_init(void);
......
/*
* File : drv_emac.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2013-05-19 Bernard porting from LPC17xx drivers.
*/
#include <rtthread.h>
#include "lwipopts.h"
#include <netif/ethernetif.h>
#include <board.h>
#include "lpc_pinsel.h"
#include "drv_emac.h"
#define EMAC_PHY_AUTO 0
#define EMAC_PHY_10MBIT 1
#define EMAC_PHY_100MBIT 2
#define MAX_ADDR_LEN 6
/* EMAC_RAM_BASE is defined in board.h and the size is 16KB */
#define RX_DESC_BASE ETH_RAM_BASE
#define RX_STAT_BASE (RX_DESC_BASE + NUM_RX_FRAG*8)
#define TX_DESC_BASE (RX_STAT_BASE + NUM_RX_FRAG*8)
#define TX_STAT_BASE (TX_DESC_BASE + NUM_TX_FRAG*8)
#define RX_BUF_BASE (TX_STAT_BASE + NUM_TX_FRAG*4)
#define TX_BUF_BASE (RX_BUF_BASE + NUM_RX_FRAG*ETH_FRAG_SIZE)
/* RX and TX descriptor and status definitions. */
#define RX_DESC_PACKET(i) (*(unsigned int *)(RX_DESC_BASE + 8*i))
#define RX_DESC_CTRL(i) (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))
#define RX_STAT_INFO(i) (*(unsigned int *)(RX_STAT_BASE + 8*i))
#define RX_STAT_HASHCRC(i) (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))
#define TX_DESC_PACKET(i) (*(unsigned int *)(TX_DESC_BASE + 8*i))
#define TX_DESC_CTRL(i) (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))
#define TX_STAT_INFO(i) (*(unsigned int *)(TX_STAT_BASE + 4*i))
#define RX_BUF(i) (RX_BUF_BASE + ETH_FRAG_SIZE*i)
#define TX_BUF(i) (TX_BUF_BASE + ETH_FRAG_SIZE*i)
struct lpc_emac
{
/* inherit from ethernet device */
struct eth_device parent;
rt_uint8_t phy_mode;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct lpc_emac lpc_emac_device;
static struct rt_semaphore sem_lock;
static struct rt_event tx_event;
/* Local Function Prototypes */
static void write_PHY(rt_uint32_t PhyReg, rt_uint32_t Value);
static rt_uint16_t read_PHY(rt_uint8_t PhyReg) ;
void ENET_IRQHandler(void)
{
rt_uint32_t status;
/* enter interrupt */
rt_interrupt_enter();
status = LPC_EMAC->IntStatus;
if (status & INT_RX_DONE)
{
/* Disable EMAC RxDone interrupts. */
LPC_EMAC->IntEnable = INT_TX_DONE;
/* a frame has been received */
eth_device_ready(&(lpc_emac_device.parent));
}
else if (status & INT_TX_DONE)
{
/* set event */
rt_event_send(&tx_event, 0x01);
}
if (status & INT_RX_OVERRUN)
{
rt_kprintf("rx overrun\n");
}
if (status & INT_TX_UNDERRUN)
{
rt_kprintf("tx underrun\n");
}
/* Clear the interrupt. */
LPC_EMAC->IntClear = status;
/* leave interrupt */
rt_interrupt_leave();
}
/* phy write */
static void write_PHY(rt_uint32_t PhyReg, rt_uint32_t Value)
{
unsigned int tout;
LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
LPC_EMAC->MWTD = Value;
/* Wait utill operation completed */
tout = 0;
for (tout = 0; tout < MII_WR_TOUT; tout++)
{
if ((LPC_EMAC->MIND & MIND_BUSY) == 0)
{
break;
}
}
}
/* phy read */
static rt_uint16_t read_PHY(rt_uint8_t PhyReg)
{
rt_uint32_t tout;
LPC_EMAC->MADR = DP83848C_DEF_ADR | PhyReg;
LPC_EMAC->MCMD = MCMD_READ;
/* Wait until operation completed */
tout = 0;
for (tout = 0; tout < MII_RD_TOUT; tout++)
{
if ((LPC_EMAC->MIND & MIND_BUSY) == 0)
{
break;
}
}
LPC_EMAC->MCMD = 0;
return (LPC_EMAC->MRDD);
}
/* init rx descriptor */
rt_inline void rx_descr_init(void)
{
rt_uint32_t i;
for (i = 0; i < NUM_RX_FRAG; i++)
{
RX_DESC_PACKET(i) = RX_BUF(i);
RX_DESC_CTRL(i) = RCTRL_INT | (ETH_FRAG_SIZE - 1);
RX_STAT_INFO(i) = 0;
RX_STAT_HASHCRC(i) = 0;
}
/* Set EMAC Receive Descriptor Registers. */
LPC_EMAC->RxDescriptor = RX_DESC_BASE;
LPC_EMAC->RxStatus = RX_STAT_BASE;
LPC_EMAC->RxDescriptorNumber = NUM_RX_FRAG - 1;
/* Rx Descriptors Point to 0 */
LPC_EMAC->RxConsumeIndex = 0;
}
/* init tx descriptor */
rt_inline void tx_descr_init(void)
{
rt_uint32_t i;
for (i = 0; i < NUM_TX_FRAG; i++)
{
TX_DESC_PACKET(i) = TX_BUF(i);
TX_DESC_CTRL(i) = (1ul << 31) | (1ul << 30) | (1ul << 29) | (1ul << 28) | (1ul << 26) | (ETH_FRAG_SIZE - 1);
TX_STAT_INFO(i) = 0;
}
/* Set EMAC Transmit Descriptor Registers. */
LPC_EMAC->TxDescriptor = TX_DESC_BASE;
LPC_EMAC->TxStatus = TX_STAT_BASE;
LPC_EMAC->TxDescriptorNumber = NUM_TX_FRAG - 1;
/* Tx Descriptors Point to 0 */
LPC_EMAC->TxProduceIndex = 0;
}
/*
TX_EN P1_4
TXD0 P1_0
TXD1 P1_1
RXD0 P1_9
RXD1 P1_10
RX_ER P1_14
CRS_DV P1_8
MDC P1_16
MDIO P1_17
REF_CLK P1_15
*/
static rt_err_t lpc_emac_init(rt_device_t dev)
{
/* Initialize the EMAC ethernet controller. */
rt_uint32_t regv, tout;
/* Power Up the EMAC controller. */
LPC_SC->PCONP |= (1UL << 30);
/* Enable P1 Ethernet Pins. */
PINSEL_ConfigPin(1, 0, 1); /**< P1_0 ENET_TXD0 */
PINSEL_ConfigPin(1, 1, 1); /**< P1_1 ENET_TXD1 */
PINSEL_ConfigPin(1, 4, 1); /**< P1_4 ENET_TX_EN */
PINSEL_ConfigPin(1, 8, 1); /**< P1_8 ENET_CRS_DV */
PINSEL_ConfigPin(1, 9, 1); /**< P1_9 ENET_RXD0 */
PINSEL_ConfigPin(1, 10, 1); /**< P1_10 ENET_RXD1 */
PINSEL_ConfigPin(1, 14, 1); /**< P1_14 ENET_RX_ER */
PINSEL_ConfigPin(1, 15, 1); /**< P1_15 ENET_REF_CLK */
PINSEL_ConfigPin(1, 16, 1); /**< P1_16 ENET_MDC */
PINSEL_ConfigPin(1, 17, 1); /**< P1_17 ENET_MDIO */
/* Reset all EMAC internal modules. */
LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
MAC1_SIM_RES | MAC1_SOFT_RES;
LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES;
/* A short delay after reset. */
for (tout = 100; tout; tout--);
/* Initialize MAC control registers. */
LPC_EMAC->MAC1 = MAC1_PASS_ALL;
LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
LPC_EMAC->MAXF = ETH_MAX_FLEN;
LPC_EMAC->CLRT = CLRT_DEF;
LPC_EMAC->IPGR = IPGR_DEF;
/* PCLK=18MHz, clock select=6, MDC=18/6=3MHz */
/* Enable Reduced MII interface. */
LPC_EMAC->MCFG = MCFG_CLK_DIV20 | MCFG_RES_MII;
for (tout = 100; tout; tout--);
LPC_EMAC->MCFG = MCFG_CLK_DIV20;
/* Enable Reduced MII interface. */
LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM | CR_PASS_RX_FILT;
/* Reset Reduced MII Logic. */
LPC_EMAC->SUPP = SUPP_RES_RMII | SUPP_SPEED;
for (tout = 100; tout; tout--);
LPC_EMAC->SUPP = SUPP_SPEED;
/* Put the PHY in reset mode */
write_PHY(PHY_REG_BMCR, 0x8000);
for (tout = 1000; tout; tout--);
/* Configure the PHY device */
/* Configure the PHY device */
switch (lpc_emac_device.phy_mode)
{
case EMAC_PHY_AUTO:
/* Use autonegotiation about the link speed. */
write_PHY(PHY_REG_BMCR, PHY_AUTO_NEG);
break;
case EMAC_PHY_10MBIT:
/* Connect at 10MBit */
write_PHY(PHY_REG_BMCR, PHY_FULLD_10M);
break;
case EMAC_PHY_100MBIT:
/* Connect at 100MBit */
write_PHY(PHY_REG_BMCR, PHY_FULLD_100M);
break;
}
if (tout >= 0x100000) return -RT_ERROR; // auto_neg failed
regv = 0x0004;
/* Configure Full/Half Duplex mode. */
if (regv & 0x0004)
{
/* Full duplex is enabled. */
LPC_EMAC->MAC2 |= MAC2_FULL_DUP;
LPC_EMAC->Command |= CR_FULL_DUP;
LPC_EMAC->IPGT = IPGT_FULL_DUP;
}
else
{
/* Half duplex mode. */
LPC_EMAC->IPGT = IPGT_HALF_DUP;
}
/* Configure 100MBit/10MBit mode. */
if (regv & 0x0002)
{
/* 10MBit mode. */
LPC_EMAC->SUPP = 0;
}
else
{
/* 100MBit mode. */
LPC_EMAC->SUPP = SUPP_SPEED;
}
/* Set the Ethernet MAC Address registers */
LPC_EMAC->SA0 = (lpc_emac_device.dev_addr[1] << 8) | lpc_emac_device.dev_addr[0];
LPC_EMAC->SA1 = (lpc_emac_device.dev_addr[3] << 8) | lpc_emac_device.dev_addr[2];
LPC_EMAC->SA2 = (lpc_emac_device.dev_addr[5] << 8) | lpc_emac_device.dev_addr[4];
/* Initialize Tx and Rx DMA Descriptors */
rx_descr_init();
tx_descr_init();
/* Receive Broadcast and Perfect Match Packets */
LPC_EMAC->RxFilterCtrl = RFC_BCAST_EN | RFC_PERFECT_EN;
/* Reset all interrupts */
LPC_EMAC->IntClear = 0xFFFF;
/* Enable EMAC interrupts. */
LPC_EMAC->IntEnable = INT_RX_DONE | INT_TX_DONE;
/* Enable receive and transmit mode of MAC Ethernet core */
LPC_EMAC->Command |= (CR_RX_EN | CR_TX_EN);
LPC_EMAC->MAC1 |= MAC1_REC_EN;
/* Enable the ENET Interrupt */
NVIC_EnableIRQ(ENET_IRQn);
return RT_EOK;
}
static rt_err_t lpc_emac_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t lpc_emac_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_size_t lpc_emac_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t lpc_emac_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t lpc_emac_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
switch (cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if (args) rt_memcpy(args, lpc_emac_device.dev_addr, 6);
else return -RT_ERROR;
break;
default :
break;
}
return RT_EOK;
}
/* EtherNet Device Interface */
/* transmit packet. */
rt_err_t lpc_emac_tx(rt_device_t dev, struct pbuf *p)
{
rt_uint32_t Index, IndexNext;
rt_uint8_t *ptr;
/* calculate next index */
IndexNext = LPC_EMAC->TxProduceIndex + 1;
if (IndexNext > LPC_EMAC->TxDescriptorNumber) IndexNext = 0;
/* check whether block is full */
while (IndexNext == LPC_EMAC->TxConsumeIndex)
{
rt_err_t result;
rt_uint32_t recved;
/* there is no block yet, wait a flag */
result = rt_event_recv(&tx_event, 0x01,
RT_EVENT_FLAG_AND | RT_EVENT_FLAG_CLEAR, RT_WAITING_FOREVER, &recved);
RT_ASSERT(result == RT_EOK);
}
/* lock EMAC device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
/* get produce index */
Index = LPC_EMAC->TxProduceIndex;
/* calculate next index */
IndexNext = LPC_EMAC->TxProduceIndex + 1;
if (IndexNext > LPC_EMAC->TxDescriptorNumber)
IndexNext = 0;
/* copy data to tx buffer */
ptr = (rt_uint8_t *)TX_BUF(Index);
pbuf_copy_partial(p, ptr, p->tot_len, 0);
TX_DESC_CTRL(Index) &= ~0x7ff;
TX_DESC_CTRL(Index) |= (p->tot_len - 1) & 0x7ff;
/* change index to the next */
LPC_EMAC->TxProduceIndex = IndexNext;
/* unlock EMAC device */
rt_sem_release(&sem_lock);
return RT_EOK;
}
/* reception packet. */
struct pbuf *lpc_emac_rx(rt_device_t dev)
{
struct pbuf *p;
rt_uint32_t size;
rt_uint32_t Index;
/* init p pointer */
p = RT_NULL;
/* lock EMAC device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
Index = LPC_EMAC->RxConsumeIndex;
if (Index != LPC_EMAC->RxProduceIndex)
{
size = (RX_STAT_INFO(Index) & 0x7ff) + 1;
if (size > ETH_FRAG_SIZE) size = ETH_FRAG_SIZE;
/* allocate buffer */
p = pbuf_alloc(PBUF_LINK, size, PBUF_RAM);
if (p != RT_NULL)
{
pbuf_take(p, (rt_uint8_t *)RX_BUF(Index), size);
}
/* move Index to the next */
if (++Index > LPC_EMAC->RxDescriptorNumber)
Index = 0;
/* set consume index */
LPC_EMAC->RxConsumeIndex = Index;
}
else
{
/* Enable RxDone interrupt */
LPC_EMAC->IntEnable = INT_RX_DONE | INT_TX_DONE;
}
/* unlock EMAC device */
rt_sem_release(&sem_lock);
return p;
}
int lpc_emac_hw_init(void)
{
rt_event_init(&tx_event, "tx_event", RT_IPC_FLAG_FIFO);
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
/* set autonegotiation mode */
lpc_emac_device.phy_mode = EMAC_PHY_AUTO;
// OUI 00-60-37 NXP Semiconductors
lpc_emac_device.dev_addr[0] = 0x00;
lpc_emac_device.dev_addr[1] = 0x60;
lpc_emac_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
lpc_emac_device.dev_addr[3] = 0x12;
lpc_emac_device.dev_addr[4] = 0x34;
lpc_emac_device.dev_addr[5] = 0x56;
lpc_emac_device.parent.parent.init = lpc_emac_init;
lpc_emac_device.parent.parent.open = lpc_emac_open;
lpc_emac_device.parent.parent.close = lpc_emac_close;
lpc_emac_device.parent.parent.read = lpc_emac_read;
lpc_emac_device.parent.parent.write = lpc_emac_write;
lpc_emac_device.parent.parent.control = lpc_emac_control;
lpc_emac_device.parent.parent.user_data = RT_NULL;
lpc_emac_device.parent.eth_rx = lpc_emac_rx;
lpc_emac_device.parent.eth_tx = lpc_emac_tx;
eth_device_init(&(lpc_emac_device.parent), "e0");
return 0;
}
INIT_DEVICE_EXPORT(lpc_emac_hw_init);
#ifdef RT_USING_FINSH
#include <finsh.h>
void emac_dump()
{
rt_kprintf("Command : %08x\n", LPC_EMAC->Command);
rt_kprintf("Status : %08x\n", LPC_EMAC->Status);
rt_kprintf("RxStatus : %08x\n", LPC_EMAC->RxStatus);
rt_kprintf("TxStatus : %08x\n", LPC_EMAC->TxStatus);
rt_kprintf("IntEnable: %08x\n", LPC_EMAC->IntEnable);
rt_kprintf("IntStatus: %08x\n", LPC_EMAC->IntStatus);
}
FINSH_FUNCTION_EXPORT(emac_dump, dump emac register);
#endif
/*
* File : drv_emac.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2013-05-19 Bernard porting from LPC17xx drivers.
*/
#ifndef __DRV_EMAC_H__
#define __DRV_EMAC_H__
#include "board.h"
/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */
#define NUM_RX_FRAG 4 /* Num.of RX Fragments 4*1536= 6.0kB */
#define NUM_TX_FRAG 3 /* Num.of TX Fragments 3*1536= 4.6kB */
#define ETH_FRAG_SIZE 1536 /* Packet Fragment size 1536 Bytes */
#define ETH_MAX_FLEN 1536 /* Max. Ethernet Frame Size */
/* MAC Configuration Register 1 */
#define MAC1_REC_EN 0x00000001 /* Receive Enable */
#define MAC1_PASS_ALL 0x00000002 /* Pass All Receive Frames */
#define MAC1_RX_FLOWC 0x00000004 /* RX Flow Control */
#define MAC1_TX_FLOWC 0x00000008 /* TX Flow Control */
#define MAC1_LOOPB 0x00000010 /* Loop Back Mode */
#define MAC1_RES_TX 0x00000100 /* Reset TX Logic */
#define MAC1_RES_MCS_TX 0x00000200 /* Reset MAC TX Control Sublayer */
#define MAC1_RES_RX 0x00000400 /* Reset RX Logic */
#define MAC1_RES_MCS_RX 0x00000800 /* Reset MAC RX Control Sublayer */
#define MAC1_SIM_RES 0x00004000 /* Simulation Reset */
#define MAC1_SOFT_RES 0x00008000 /* Soft Reset MAC */
/* MAC Configuration Register 2 */
#define MAC2_FULL_DUP 0x00000001 /* Full Duplex Mode */
#define MAC2_FRM_LEN_CHK 0x00000002 /* Frame Length Checking */
#define MAC2_HUGE_FRM_EN 0x00000004 /* Huge Frame Enable */
#define MAC2_DLY_CRC 0x00000008 /* Delayed CRC Mode */
#define MAC2_CRC_EN 0x00000010 /* Append CRC to every Frame */
#define MAC2_PAD_EN 0x00000020 /* Pad all Short Frames */
#define MAC2_VLAN_PAD_EN 0x00000040 /* VLAN Pad Enable */
#define MAC2_ADET_PAD_EN 0x00000080 /* Auto Detect Pad Enable */
#define MAC2_PPREAM_ENF 0x00000100 /* Pure Preamble Enforcement */
#define MAC2_LPREAM_ENF 0x00000200 /* Long Preamble Enforcement */
#define MAC2_NO_BACKOFF 0x00001000 /* No Backoff Algorithm */
#define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Presurre / No Backoff */
#define MAC2_EXCESS_DEF 0x00004000 /* Excess Defer */
/* Back-to-Back Inter-Packet-Gap Register */
#define IPGT_FULL_DUP 0x00000015 /* Recommended value for Full Duplex */
#define IPGT_HALF_DUP 0x00000012 /* Recommended value for Half Duplex */
/* Non Back-to-Back Inter-Packet-Gap Register */
#define IPGR_DEF 0x00000012 /* Recommended value */
/* Collision Window/Retry Register */
#define CLRT_DEF 0x0000370F /* Default value */
/* PHY Support Register */
#define SUPP_SPEED 0x00000100 /* Reduced MII Logic Current Speed */
#define SUPP_RES_RMII 0x00000800 /* Reset Reduced MII Logic */
/* Test Register */
#define TEST_SHCUT_PQUANTA 0x00000001 /* Shortcut Pause Quanta */
#define TEST_TST_PAUSE 0x00000002 /* Test Pause */
#define TEST_TST_BACKP 0x00000004 /* Test Back Pressure */
/* MII Management Configuration Register */
#define MCFG_SCAN_INC 0x00000001 /* Scan Increment PHY Address */
#define MCFG_SUPP_PREAM 0x00000002 /* Suppress Preamble */
#define MCFG_CLK_SEL 0x0000001C /* Clock Select Mask */
#define MCFG_RES_MII 0x00008000 /* Reset MII Management Hardware */
#define MCFG_CLK_DIV4 0x00000000 /* MDC = hclk / 4 */
#define MCFG_CLK_DIV6 0x00000008 /* MDC = hclk / 6 */
#define MCFG_CLK_DIV8 0x0000000C /* MDC = hclk / 8 */
#define MCFG_CLK_DIV10 0x00000010 /* MDC = hclk / 10 */
#define MCFG_CLK_DIV14 0x00000014 /* MDC = hclk / 14 */
#define MCFG_CLK_DIV20 0x00000018 /* MDC = hclk / 20 */
#define MCFG_CLK_DIV28 0x0000001C /* MDC = hclk / 28 */
/* MII Management Command Register */
#define MCMD_READ 0x00000001 /* MII Read */
#define MCMD_SCAN 0x00000002 /* MII Scan continuously */
#define MII_WR_TOUT 0x00050000 /* MII Write timeout count */
#define MII_RD_TOUT 0x00050000 /* MII Read timeout count */
/* MII Management Address Register */
#define MADR_REG_ADR 0x0000001F /* MII Register Address Mask */
#define MADR_PHY_ADR 0x00001F00 /* PHY Address Mask */
/* MII Management Indicators Register */
#define MIND_BUSY 0x00000001 /* MII is Busy */
#define MIND_SCAN 0x00000002 /* MII Scanning in Progress */
#define MIND_NOT_VAL 0x00000004 /* MII Read Data not valid */
#define MIND_MII_LINK_FAIL 0x00000008 /* MII Link Failed */
/* Command Register */
#define CR_RX_EN 0x00000001 /* Enable Receive */
#define CR_TX_EN 0x00000002 /* Enable Transmit */
#define CR_REG_RES 0x00000008 /* Reset Host Registers */
#define CR_TX_RES 0x00000010 /* Reset Transmit Datapath */
#define CR_RX_RES 0x00000020 /* Reset Receive Datapath */
#define CR_PASS_RUNT_FRM 0x00000040 /* Pass Runt Frames */
#define CR_PASS_RX_FILT 0x00000080 /* Pass RX Filter */
#define CR_TX_FLOW_CTRL 0x00000100 /* TX Flow Control */
#define CR_RMII 0x00000200 /* Reduced MII Interface */
#define CR_FULL_DUP 0x00000400 /* Full Duplex */
/* Status Register */
#define SR_RX_EN 0x00000001 /* Enable Receive */
#define SR_TX_EN 0x00000002 /* Enable Transmit */
/* Transmit Status Vector 0 Register */
#define TSV0_CRC_ERR 0x00000001 /* CRC error */
#define TSV0_LEN_CHKERR 0x00000002 /* Length Check Error */
#define TSV0_LEN_OUTRNG 0x00000004 /* Length Out of Range */
#define TSV0_DONE 0x00000008 /* Tramsmission Completed */
#define TSV0_MCAST 0x00000010 /* Multicast Destination */
#define TSV0_BCAST 0x00000020 /* Broadcast Destination */
#define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */
#define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */
#define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */
#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */
#define TSV0_GIANT 0x00000400 /* Giant Frame */
#define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */
#define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */
#define TSV0_CTRL_FRAME 0x10000000 /* Control Frame */
#define TSV0_PAUSE 0x20000000 /* Pause Frame */
#define TSV0_BACK_PRESS 0x40000000 /* Backpressure Method Applied */
#define TSV0_VLAN 0x80000000 /* VLAN Frame */
/* Transmit Status Vector 1 Register */
#define TSV1_BYTE_CNT 0x0000FFFF /* Transmit Byte Count */
#define TSV1_COLL_CNT 0x000F0000 /* Transmit Collision Count */
/* Receive Status Vector Register */
#define RSV_BYTE_CNT 0x0000FFFF /* Receive Byte Count */
#define RSV_PKT_IGNORED 0x00010000 /* Packet Previously Ignored */
#define RSV_RXDV_SEEN 0x00020000 /* RXDV Event Previously Seen */
#define RSV_CARR_SEEN 0x00040000 /* Carrier Event Previously Seen */
#define RSV_REC_CODEV 0x00080000 /* Receive Code Violation */
#define RSV_CRC_ERR 0x00100000 /* CRC Error */
#define RSV_LEN_CHKERR 0x00200000 /* Length Check Error */
#define RSV_LEN_OUTRNG 0x00400000 /* Length Out of Range */
#define RSV_REC_OK 0x00800000 /* Frame Received OK */
#define RSV_MCAST 0x01000000 /* Multicast Frame */
#define RSV_BCAST 0x02000000 /* Broadcast Frame */
#define RSV_DRIB_NIBB 0x04000000 /* Dribble Nibble */
#define RSV_CTRL_FRAME 0x08000000 /* Control Frame */
#define RSV_PAUSE 0x10000000 /* Pause Frame */
#define RSV_UNSUPP_OPC 0x20000000 /* Unsupported Opcode */
#define RSV_VLAN 0x40000000 /* VLAN Frame */
/* Flow Control Counter Register */
#define FCC_MIRR_CNT 0x0000FFFF /* Mirror Counter */
#define FCC_PAUSE_TIM 0xFFFF0000 /* Pause Timer */
/* Flow Control Status Register */
#define FCS_MIRR_CNT 0x0000FFFF /* Mirror Counter Current */
/* Receive Filter Control Register */
#define RFC_UCAST_EN 0x00000001 /* Accept Unicast Frames Enable */
#define RFC_BCAST_EN 0x00000002 /* Accept Broadcast Frames Enable */
#define RFC_MCAST_EN 0x00000004 /* Accept Multicast Frames Enable */
#define RFC_UCAST_HASH_EN 0x00000008 /* Accept Unicast Hash Filter Frames */
#define RFC_MCAST_HASH_EN 0x00000010 /* Accept Multicast Hash Filter Fram.*/
#define RFC_PERFECT_EN 0x00000020 /* Accept Perfect Match Enable */
#define RFC_MAGP_WOL_EN 0x00001000 /* Magic Packet Filter WoL Enable */
#define RFC_PFILT_WOL_EN 0x00002000 /* Perfect Filter WoL Enable */
/* Receive Filter WoL Status/Clear Registers */
#define WOL_UCAST 0x00000001 /* Unicast Frame caused WoL */
#define WOL_BCAST 0x00000002 /* Broadcast Frame caused WoL */
#define WOL_MCAST 0x00000004 /* Multicast Frame caused WoL */
#define WOL_UCAST_HASH 0x00000008 /* Unicast Hash Filter Frame WoL */
#define WOL_MCAST_HASH 0x00000010 /* Multicast Hash Filter Frame WoL */
#define WOL_PERFECT 0x00000020 /* Perfect Filter WoL */
#define WOL_RX_FILTER 0x00000080 /* RX Filter caused WoL */
#define WOL_MAG_PACKET 0x00000100 /* Magic Packet Filter caused WoL */
/* Interrupt Status/Enable/Clear/Set Registers */
#define INT_RX_OVERRUN 0x00000001 /* Overrun Error in RX Queue */
#define INT_RX_ERR 0x00000002 /* Receive Error */
#define INT_RX_FIN 0x00000004 /* RX Finished Process Descriptors */
#define INT_RX_DONE 0x00000008 /* Receive Done */
#define INT_TX_UNDERRUN 0x00000010 /* Transmit Underrun */
#define INT_TX_ERR 0x00000020 /* Transmit Error */
#define INT_TX_FIN 0x00000040 /* TX Finished Process Descriptors */
#define INT_TX_DONE 0x00000080 /* Transmit Done */
#define INT_SOFT_INT 0x00001000 /* Software Triggered Interrupt */
#define INT_WAKEUP 0x00002000 /* Wakeup Event Interrupt */
/* Power Down Register */
#define PD_POWER_DOWN 0x80000000 /* Power Down MAC */
/* RX Descriptor Control Word */
#define RCTRL_SIZE 0x000007FF /* Buffer size mask */
#define RCTRL_INT 0x80000000 /* Generate RxDone Interrupt */
/* RX Status Hash CRC Word */
#define RHASH_SA 0x000001FF /* Hash CRC for Source Address */
#define RHASH_DA 0x001FF000 /* Hash CRC for Destination Address */
/* RX Status Information Word */
#define RINFO_SIZE 0x000007FF /* Data size in bytes */
#define RINFO_CTRL_FRAME 0x00040000 /* Control Frame */
#define RINFO_VLAN 0x00080000 /* VLAN Frame */
#define RINFO_FAIL_FILT 0x00100000 /* RX Filter Failed */
#define RINFO_MCAST 0x00200000 /* Multicast Frame */
#define RINFO_BCAST 0x00400000 /* Broadcast Frame */
#define RINFO_CRC_ERR 0x00800000 /* CRC Error in Frame */
#define RINFO_SYM_ERR 0x01000000 /* Symbol Error from PHY */
#define RINFO_LEN_ERR 0x02000000 /* Length Error */
#define RINFO_RANGE_ERR 0x04000000 /* Range Error (exceeded max. size) */
#define RINFO_ALIGN_ERR 0x08000000 /* Alignment Error */
#define RINFO_OVERRUN 0x10000000 /* Receive overrun */
#define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */
#define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */
#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */
#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | \
RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN)
/* TX Descriptor Control Word */
#define TCTRL_SIZE 0x000007FF /* Size of data buffer in bytes */
#define TCTRL_OVERRIDE 0x04000000 /* Override Default MAC Registers */
#define TCTRL_HUGE 0x08000000 /* Enable Huge Frame */
#define TCTRL_PAD 0x10000000 /* Pad short Frames to 64 bytes */
#define TCTRL_CRC 0x20000000 /* Append a hardware CRC to Frame */
#define TCTRL_LAST 0x40000000 /* Last Descriptor for TX Frame */
#define TCTRL_INT 0x80000000 /* Generate TxDone Interrupt */
/* TX Status Information Word */
#define TINFO_COL_CNT 0x01E00000 /* Collision Count */
#define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */
#define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */
#define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */
#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */
#define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */
#define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */
#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */
/* ENET Device Revision ID */
#define OLD_EMAC_MODULE_ID 0x39022000 /* Rev. ID for first rev '-' */
/* DP83848C PHY Registers */
#define PHY_REG_BMCR 0x00 /* Basic Mode Control Register */
#define PHY_REG_BMSR 0x01 /* Basic Mode Status Register */
#define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */
#define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */
#define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */
#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */
#define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */
#define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */
/* PHY Extended Registers */
#define PHY_REG_STS 0x10 /* Status Register */
#define PHY_REG_MICR 0x11 /* MII Interrupt Control Register */
#define PHY_REG_MISR 0x12 /* MII Interrupt Status Register */
#define PHY_REG_FCSCR 0x14 /* False Carrier Sense Counter */
#define PHY_REG_RECR 0x15 /* Receive Error Counter */
#define PHY_REG_PCSR 0x16 /* PCS Sublayer Config. and Status */
#define PHY_REG_RBR 0x17 /* RMII and Bypass Register */
#define PHY_REG_LEDCR 0x18 /* LED Direct Control Register */
#define PHY_REG_PHYCR 0x19 /* PHY Control Register */
#define PHY_REG_10BTSCR 0x1A /* 10Base-T Status/Control Register */
#define PHY_REG_CDCTRL1 0x1B /* CD Test Control and BIST Extens. */
#define PHY_REG_EDCR 0x1D /* Energy Detect Control Register */
#define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */
#define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */
#define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */
#define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */
#define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */
#define DP83848C_DEF_ADR 0x0F00 /* Default PHY device address */
#define DP83848C_ID 0x20005C90 /* PHY Identifier */
int lpc_emac_hw_init(void);
#endif
#include <rtthread.h>
#include "board.h"
#define RT_DEVICE_CTRL_RTC_GET_COUNT 0x81 /**< get count */
#define LED_DEVICE_CTRL 0x81 /*LED control command*/
#define LED_NUM 4
struct led_ctrl
......@@ -22,24 +22,24 @@ static struct lpc_led led;
static rt_err_t rt_led_init(rt_device_t dev)
{
/* led0 : P4.14,led1:P4.15 ,led2:P4.16 ,led3:P4.17*/
/* led0 : P4.27,led1:P4.15 ,led2:P4.16 ,led3:P4.17*/
/* set P4.14,P4.15,P4.16,P4.17 as GPIO. */
LPC_IOCON->P4_14 = 0x00;
LPC_IOCON->P4_27 = 0x00;
LPC_IOCON->P4_15 = 0x00;
LPC_IOCON->P4_16 = 0x00;
LPC_IOCON->P4_17 = 0x00;
/* set P4.14,P4.15,P4.16,P4.17 output. */
LPC_GPIO4->DIR |= (0x0f << 14);
/* set P4.27,P4.15,P4.16,P4.17 output. */
LPC_GPIO4->DIR |= (0x07 << 15) | (0x01 << 27);
/* turn off all the led */
LPC_GPIO4->SET = (0x0f << 14);
led.ctrl[0].num = 14;
led.ctrl[0].port = LPC_GPIO4;
led.ctrl[1].num = 15;
led.ctrl[1].port = LPC_GPIO4;
led.ctrl[2].num = 16;
led.ctrl[2].port = LPC_GPIO4;
led.ctrl[3].num = 17;
LPC_GPIO4->SET = (0x07 << 15) | (0x01 << 27);
led.ctrl[3].num = 27;
led.ctrl[3].port = LPC_GPIO4;
led.ctrl[2].num = 15;
led.ctrl[2].port = LPC_GPIO4;
led.ctrl[1].num = 16;
led.ctrl[1].port = LPC_GPIO4;
led.ctrl[0].num = 17;
led.ctrl[0].port = LPC_GPIO4;
return RT_EOK;
}
......@@ -106,7 +106,7 @@ static rt_err_t rt_led_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
RT_ASSERT(dev == &led.parent);
if (cmd == RT_DEVICE_CTRL_RTC_GET_COUNT)
if (cmd == LED_DEVICE_CTRL)
{
rt_uint32_t *led_num = args;
*led_num = LED_NUM;
......@@ -114,7 +114,7 @@ static rt_err_t rt_led_control(rt_device_t dev, rt_uint8_t cmd, void *args)
return RT_EOK;
}
void rt_led_hw_init(void)
int rt_led_hw_init(void)
{
led.parent.type = RT_Device_Class_Char;
led.parent.rx_indicate = RT_NULL;
......@@ -131,8 +131,9 @@ void rt_led_hw_init(void)
rt_device_register(&led.parent, "led", RT_DEVICE_FLAG_RDWR);
/* init led device */
rt_led_init(&led.parent);
return 0;
}
INIT_DEVICE_EXPORT(rt_led_hw_init);
#ifdef RT_USING_FINSH
#include <finsh.h>
void led_test(rt_uint32_t led_num, rt_uint32_t value)
......
/*
* File : drv_sdram.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2013-05-19 Bernard The first version for LPC40xx
*/
#include "drv_sdram.h"
#include <lpc_emc.h>
#include <lpc_timer.h>
#define SDRAM_BASE_ADDR 0xA0000000
#define SDRAM_SIZE 0x2000000
/*******************************************************************************************
* @函数名:sdram_gpio_config()
* @参数 :void
* @返回值:void
* @描述 :SDRAM管脚配置函数,内部调用
*********************************************************************************************/
static void sdram_gpio_config(void)
{
LPC_IOCON->P3_0 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D0 @ P3.0 */
LPC_IOCON->P3_1 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D1 @ P3.1 */
LPC_IOCON->P3_2 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D2 @ P3.2 */
LPC_IOCON->P3_3 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D3 @ P3.3 */
LPC_IOCON->P3_4 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D4 @ P3.4 */
LPC_IOCON->P3_5 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D5 @ P3.5 */
LPC_IOCON->P3_6 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D6 @ P3.6 */
LPC_IOCON->P3_7 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D7 @ P3.7 */
LPC_IOCON->P3_8 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D8 @ P3.8 */
LPC_IOCON->P3_9 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D9 @ P3.9 */
LPC_IOCON->P3_10 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D10 @ P3.10 */
LPC_IOCON->P3_11 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D11 @ P3.11 */
LPC_IOCON->P3_12 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D12 @ P3.12 */
LPC_IOCON->P3_13 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D13 @ P3.13 */
LPC_IOCON->P3_14 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D14 @ P3.14 */
LPC_IOCON->P3_15 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* D15 @ P3.15 */
LPC_IOCON->P4_0 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A0 @ P4.0 */
LPC_IOCON->P4_1 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A1 @ P4.1 */
LPC_IOCON->P4_2 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A2 @ P4.2 */
LPC_IOCON->P4_3 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A3 @ P4.3 */
LPC_IOCON->P4_4 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A4 @ P4.4 */
LPC_IOCON->P4_5 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A5 @ P4.5 */
LPC_IOCON->P4_6 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A6 @ P4.6 */
LPC_IOCON->P4_7 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A7 @ P4.7 */
LPC_IOCON->P4_8 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A8 @ P4.8 */
LPC_IOCON->P4_9 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A9 @ P4.9 */
LPC_IOCON->P4_10 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A10 @ P4.10 */
LPC_IOCON->P4_11 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A11 @ P4.11 */
LPC_IOCON->P4_12 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A12 @ P4.12 */
LPC_IOCON->P4_13 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A13 @ P4.13 */
LPC_IOCON->P4_14 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* A14 @ P4.14 */
LPC_IOCON->P4_25 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* WEN @ P4.25 */
LPC_IOCON->P2_16 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* CASN @ P2.16 */
LPC_IOCON->P2_17 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* RASN @ P2.17 */
LPC_IOCON->P2_18 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* CLK[0] @ P2.18 */
LPC_IOCON->P2_19 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* CLK[1] @ P2.19 */
LPC_IOCON->P2_20 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* DYCSN[0] @ P2.20 */
LPC_IOCON->P2_24 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* CKE[0] @ P2.24 */
LPC_IOCON->P2_28 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* DQM[0] @ P2.28 */
LPC_IOCON->P2_29 = (1 << 0 | 0 << 3 | 0 << 5 | 1 << 9); /* DQM[1] @ P2.29 */
}
void lpc_sdram_hw_init(void)
{
volatile uint32_t i;
volatile uint32_t dwtemp;
uint16_t wtemp = wtemp;
TIM_TIMERCFG_Type TIM_ConfigStruct;
TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
TIM_ConfigStruct.PrescaleValue = 1;
// Set configuration for Tim_config and Tim_MatchConfig
TIM_Init(LPC_TIM0, TIM_TIMER_MODE, &TIM_ConfigStruct);
LPC_SC->PCONP |= 0x00000800;
LPC_SC->EMCDLYCTL = 0x00001010;
LPC_EMC->Control = 0x00000001;
LPC_EMC->Config = 0x00000000;
sdram_gpio_config();
//LPC_SC->EMCCLKSEL = 1; //跑主频的一般频率,60Mhz
LPC_EMC->DynamicRP = EMC_NS2CLK(20); /* 20ns, */
LPC_EMC->DynamicRAS = /*EMC_NS2CLK(42, nsPerClk);*/ 15; /* 42ns to 100K ns, */
LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk, */
LPC_EMC->DynamicAPR = 2 - 1; /* Not found!!! Estimated as 2clk, */
LPC_EMC->DynamicDAL = EMC_NS2CLK(20) + 2; /* tDAL = tRP + tDPL = 20ns + 2clk */
LPC_EMC->DynamicWR = 2 - 1; /* 2CLK, */
LPC_EMC->DynamicRC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRC=63ns(min)*/
LPC_EMC->DynamicRFC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRFC=tRC */
LPC_EMC->DynamicXSR = 0x0000000F; /* exit self-refresh to active, 不知道,设为最久 */
LPC_EMC->DynamicRRD = EMC_NS2CLK(63); /* 3clk, tRRD=15ns(min) */
LPC_EMC->DynamicMRD = 2 - 1; /* 2clk, tMRD=2clk(min) */
LPC_EMC->DynamicReadConfig = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */
/* H57V2562GTR-75C: tCL=3CLK, tRCD=20ns(min), 3 CLK=24ns */
LPC_EMC->DynamicRasCas0 = 0x303;
/* For Manley lpc1778 SDRAM: H57V2562GTR-75C, 256Mb, 16Mx16, 4 banks, row=13, column=9 */
#ifdef SDRAM_CONFIG_16BIT
LPC_EMC->DynamicConfig0 = 0x680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
#elif defined SDRAM_CONFIG_32BIT
LPC_EMC->DynamicConfig0 = 0x4680; /* 256Mb, 16Mx16, 4 banks, row=13, column=9, RBC */
#endif
TIM_Waitms(100);
LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */
TIM_Waitms(200); /* wait 200ms */
LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */
LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */
for (i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
LPC_EMC->DynamicRefresh = EMC_SDRAM_REFRESH(64);
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
#ifdef SDRAM_CONFIG_16BIT
wtemp = *((volatile uint16_t *)(SDRAM_BASE | (0x33 << 12))); /* 8 burst, 3 CAS latency */
#elif defined SDRAM_CONFIG_32BIT
dwtemp = *((volatile uint32_t *)(SDRAM_BASE | (0x32 << 13))); /* 4 burst, 3 CAS latency */
#endif
LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */
LPC_EMC->DynamicConfig0 |= 0x80000; /* enable buffer */
TIM_Waitms(1);
TIM_DeInit(LPC_TIM0);
}
/*
* File : drv_sdram.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2013-05-19 Bernard The first version for LPC40xx
*/
#ifndef __DRV_SDRAM_H__
#define __DRV_SDRAM_H__
#include <board.h>
#define SDRAM_CONFIG_16BIT //use the 16 bitSDRAM
//#define SDRAM_CONFIG_32BIT //use the 32 bitSDRAM
#ifdef SDRAM_CONFIG_16BIT
#define SDRAM_SIZE 0x2000000 // 256Mbit
#elif defined SDRAM_CONFIG_32BIT //
#define SDRAM_SIZE 0x4000000 // 512Mbit
#else
error Wrong SDRAM config, check ex_sdram.h
#endif
#define SDRAM_BASE 0xA0000000 /* CS0 */
void lpc_sdram_hw_init(void);
#endif
......@@ -17,20 +17,17 @@
#include <rtdevice.h>
#include "board.h"
#include "lpc_uart.h"
#include "lpc_pinsel.h"
struct lpc_uart
{
UART_ID_Type UART;
LPC_UART_TypeDef *UART;
IRQn_Type UART_IRQn;
};
static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct lpc_uart *uart;
UART_CFG_Type UARTConfigStruct;
UART_FIFO_CFG_Type UARTFIFOConfigStruct;
uint32_t Fdiv = 0;
RT_ASSERT(serial != RT_NULL);
uart = (struct lpc_uart *)serial->parent.user_data;
......@@ -41,25 +38,20 @@ static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_con
* 1 Stop bit
* None parity
*/
UART_ConfigStructInit(&UARTConfigStruct);
UARTConfigStruct.Baud_rate = 115200;
// Initialize UART0 peripheral with given to corresponding parameter
UART_Init(uart->UART, &UARTConfigStruct);
/* Initialize FIFOConfigStruct to default state:
* - FIFO_DMAMode = DISABLE
* - FIFO_Level = UART_FIFO_TRGLEV0
* - FIFO_ResetRxBuf = ENABLE
* - FIFO_ResetTxBuf = ENABLE
* - FIFO_State = ENABLE
*/
UART_FIFOConfigStructInit(&UARTFIFOConfigStruct);
/* set DLAB=1 */
uart->UART->LCR |= 0x80;
/* config uart baudrate */
Fdiv = (PeripheralClock / 16) / cfg->baud_rate;
uart->UART->DLM = Fdiv / 256;
uart->UART->DLL = Fdiv % 256;
/* set DLAB=0 */
uart->UART->LCR &= ~0x80;
/* config to 8 data bit,1 Stop bit,None parity */
uart->UART->LCR |= 0x03;
// Initialize FIFO for UART0 peripheral
UART_FIFOConfig(uart->UART, &UARTFIFOConfigStruct);
/*enable and reset FIFO*/
uart->UART->FCR = 0x07;
UART_TxCmd(uart->UART, ENABLE);
return RT_EOK;
}
......@@ -75,11 +67,11 @@ static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UART_IntConfig(uart->UART, UART_INTCFG_RBR, DISABLE);
uart->UART->IER &= ~0x01;
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UART_IntConfig(uart->UART, UART_INTCFG_RBR, ENABLE);
uart->UART->IER |= 0x01;
break;
}
......@@ -91,21 +83,21 @@ static int lpc_putc(struct rt_serial_device *serial, char c)
struct lpc_uart *uart;
uart = (struct lpc_uart *)serial->parent.user_data;
UART_Send(uart->UART, (uint8_t *)&c, 1, BLOCKING);
while (!(uart->UART->LSR & 0x20));
uart->UART->THR = c;
return 1;
}
static int lpc_getc(struct rt_serial_device *serial)
{
uint8_t ch;
struct lpc_uart *uart;
uart = (struct lpc_uart *)serial->parent.user_data;
if (UART_Receive(uart->UART, &ch, 1, NONE_BLOCKING) == 1)
return (int) ch;
return -1;
if (uart->UART->LSR & 0x01)
return (uart->UART->RBR);
else
return -1;
}
static const struct rt_uart_ops lpc_uart_ops =
......@@ -116,127 +108,167 @@ static const struct rt_uart_ops lpc_uart_ops =
lpc_getc,
};
#if defined(RT_USING_UART0)
#ifdef RT_USING_UART0
/* UART0 device driver structure */
#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */
struct serial_ringbuffer uart0_int_rx;
#endif
struct lpc_uart uart0 =
{
UART_0,
LPC_UART0,
UART0_IRQn,
};
struct rt_serial_device serial0;
void UART0_IRQHandler(void)
{
struct lpc_uart *uart;
uint32_t intsrc, tmp, tmp1;
uart = &uart0;
volatile uint32_t IIR, tmp;
/* enter interrupt */
rt_interrupt_enter();
/* Determine the interrupt source */
intsrc = UART_GetIntId(uart->UART);
tmp = intsrc & UART_IIR_INTID_MASK;
// Receive Line Status
if (tmp == UART_IIR_INTID_RLS)
IIR = LPC_UART0->IIR;
IIR &= 0x0e;
switch (IIR)
{
// Check line status
tmp1 = UART_GetLineStatus(uart->UART);
// Mask out the Receive Ready and Transmit Holding empty status
tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
| UART_LSR_BI | UART_LSR_RXFE);
// If any error exist
if (tmp1)
{
//
}
}
// Receive Data Available or Character time-out
if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI))
{
case 0x04:
case 0x0C:
#if RTTHREAD_VERSION < 20000
rt_hw_serial_isr(&serial0);
#else
rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
#endif
break;
case 0x06:
tmp = LPC_UART0->LSR;
break;
default :
tmp = LPC_UART0->LSR;
break;
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#if defined(RT_USING_UART2)
#ifdef RT_USING_UART2
/* UART2 device driver structure */
#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */
struct serial_ringbuffer uart2_int_rx;
#endif
struct lpc_uart uart2 =
{
UART_2,
LPC_UART2,
UART2_IRQn,
};
struct rt_serial_device serial2;
void UART2_IRQHandler(void)
{
struct lpc_uart *uart;
uint32_t intsrc, tmp, tmp1;
uart = &uart2;
volatile uint32_t IIR, tmp;
/* enter interrupt */
rt_interrupt_enter();
/* Determine the interrupt source */
intsrc = UART_GetIntId(uart->UART);
tmp = intsrc & UART_IIR_INTID_MASK;
// Receive Line Status
if (tmp == UART_IIR_INTID_RLS)
IIR = LPC_UART2->IIR;
IIR &= 0x0e;
switch (IIR)
{
// Check line status
tmp1 = UART_GetLineStatus(uart->UART);
// Mask out the Receive Ready and Transmit Holding empty status
tmp1 &= (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE \
| UART_LSR_BI | UART_LSR_RXFE);
// If any error exist
if (tmp1)
{
//
}
case 0x04:
case 0x0C:
#if RTTHREAD_VERSION < 20000
rt_hw_serial_isr(&serial2);
#else
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
#endif
break;
case 0x06:
tmp = LPC_UART2->LSR;
break;
default :
tmp = LPC_UART2->LSR;
break;
}
// Receive Data Available or Character time-out
if ((tmp == UART_IIR_INTID_RDA) || (tmp == UART_IIR_INTID_CTI))
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef RT_USING_UART4
/* UART4 device driver structure */
#if RTTHREAD_VERSION < 20000 /* RT-Thread 1.x */
struct serial_ringbuffer uart4_int_rx;
#endif
struct lpc_uart uart4 =
{
LPC_UART4,
UART4_IRQn,
};
struct rt_serial_device serial4;
void UART4_IRQHandler(void)
{
volatile uint32_t IIR, tmp;
/* enter interrupt */
rt_interrupt_enter();
IIR = LPC_UART4->IIR;
IIR &= 0x0e;
switch (IIR)
{
rt_hw_serial_isr(&serial2, RT_SERIAL_EVENT_RX_IND);
case 0x04:
case 0x0C:
#if RTTHREAD_VERSION < 20000
rt_hw_serial_isr(&serial4);
#else
rt_hw_serial_isr(&serial4, RT_SERIAL_EVENT_RX_IND);
#endif
break;
case 0x06:
tmp = LPC_UART4->LSR;
break;
default :
tmp = LPC_UART4->LSR;
break;
}
/* leave interrupt */
rt_interrupt_leave();
}
#endif
void rt_hw_uart_init(void)
{
struct lpc_uart *uart;
struct serial_configure config;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART0
uart = &uart0;
config.baud_rate = BAUD_RATE_115200;
config.bit_order = BIT_ORDER_LSB;
config.data_bits = DATA_BITS_8;
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial0.ops = &lpc_uart_ops;
serial0.config = config;
#if RTTHREAD_VERSION < 20000
serial0.int_rx = &uart0_int_rx;
#endif
serial0.parent.user_data = uart;
/*
* Initialize UART0 pin connect
* P0.2: U0_TXD
* P0.3: U0_RXD
*/
PINSEL_ConfigPin(0, 2, 1);
PINSEL_ConfigPin(0, 3, 1);
LPC_IOCON->P0_2 &= ~0x07;
LPC_IOCON->P0_2 |= 0x01;
LPC_IOCON->P0_3 &= ~0x07;
LPC_IOCON->P0_3 |= 0x01;
/* enable the uart0 power and clock */
LPC_SC->PCONP |= 0x01 << 3;
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01));
......@@ -244,41 +276,77 @@ void rt_hw_uart_init(void)
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(uart->UART_IRQn);
/* register UART1 device */
/* register UART0 device */
rt_hw_serial_register(&serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
#endif
#ifdef RT_USING_UART2
uart = &uart2;
config.baud_rate = BAUD_RATE_115200;
config.bit_order = BIT_ORDER_LSB;
config.data_bits = DATA_BITS_8;
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
serial2.ops = &lpc_uart_ops;
serial2.config = config;
#if RTTHREAD_VERSION < 20000
serial2.int_rx = &uart2_int_rx;
#endif
serial2.parent.user_data = uart;
/*
* Initialize UART2 pin connect
* P2.8: U2_TXD
* P0.11: U2_RXD
*/
PINSEL_ConfigPin(2, 8, 2);
PINSEL_ConfigPin(0, 11, 1);
LPC_IOCON->P2_8 &= ~0x07;
LPC_IOCON->P0_11 &= ~0x07;
LPC_IOCON->P2_8 |= 0x02;
LPC_IOCON->P0_11 |= 0x01;
/* enable the uart2 power and clock */
LPC_SC->PCONP |= 0x01 << 24;
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01));
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(uart->UART_IRQn);
/* register UART1 device */
/* register UART2 device */
rt_hw_serial_register(&serial2, "uart2",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
#endif
#ifdef RT_USING_UART4
uart = &uart4;
serial4.ops = &lpc_uart_ops;
serial4.config = config;
#if RTTHREAD_VERSION < 20000
serial4.int_rx = &uart4_int_rx;
#endif
serial4.parent.user_data = uart;
/*
* Initialize UART2 pin connect
* P5.4: U2_TXD
* P5.3: U2_RXD
*/
LPC_IOCON->P5_4 &= ~0x07;
LPC_IOCON->P5_3 &= ~0x07;
LPC_IOCON->P5_4 |= 0x04;
LPC_IOCON->P5_3 |= 0x04;
/* enable the uart4 power and clock */
LPC_SC->PCONP |= 0x01 << 8;
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(uart->UART_IRQn, ((0x01 << 3) | 0x01));
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(uart->UART_IRQn);
/* register UART2 device */
rt_hw_serial_register(&serial4, "uart4",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
uart);
#endif
}
/*
* File : drv_uart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009-2014 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2014-01-05 NongXiaoming The first version for LPC40xx
*/
#ifndef __UART_H__
#define __UART_H__
......
......@@ -165,7 +165,7 @@
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
// #define RT_LWIP_SNMP
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
// #define RT_LWIP_DHCP
#define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
......
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>RT-Thread LPC408x</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>0</CpuCode>
<DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments>-MPU</SimDllArguments>
<SimDlgDllName>DCM.DLL</SimDlgDllName>
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments>-MPU</TargetDllArguments>
<TargetDlgDllName>TCM.DLL</TargetDlgDllName>
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
</DllOpt>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>0</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>0</tRtrace>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>7</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>Segger\JL2CM3.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U4294967295 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO11 -FD10000000 -FC800 -FN1 -FF0LPC_IAP_512 -FS00 -FL080000</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
</ProjectOpt>
......@@ -9,44 +9,18 @@
*
* Change Logs:
* Date Author Notes
* 2010-06-25 Bernard first version
* 2011-08-08 lgnq modified for Loongson LS1B
* 2015-07-06 chinesebear modified for Loongson LS1C
* 2010-06-25 Bernard first version
* 2011-08-08 lgnq modified for Loongson LS1B
* 2015-07-06 chinesebear modified for Loongson LS1C
*/
#include <rtthread.h>
#include <ls1c.h>
#ifdef RT_USING_COMPONENTS_INIT
#include <components.h>
#endif
#ifdef RT_USING_RTGUI
#include <rtgui/rtgui.h>
extern void rt_hw_dc_init(void);
#endif
void rt_init_thread_entry(void *parameter)
{
#ifdef RT_USING_RTGUI
{
rt_device_t dc;
/* init Display Controller */
rt_hw_dc_init();
/* find Display Controller device */
dc = rt_device_find("dc");
/* set Display Controller device as rtgui graphic driver */
rtgui_graphic_set_device(dc);
}
#endif
#ifdef RT_USING_COMPONENTS_INIT
/* initialization RT-Thread Components */
rt_components_init();
#endif
}
int rt_application_init(void)
......@@ -56,11 +30,9 @@ int rt_application_init(void)
/* create initialization thread */
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
4096, 8, 20);
4096, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid != RT_NULL)
rt_thread_startup(tid);
return 0;
}
......@@ -77,12 +77,6 @@ void rtthread_startup(void)
/* init application */
rt_application_init();
/* init finsh*/
#ifdef RT_USING_FINSH
finsh_system_init();
finsh_set_device("uart2");
#endif
/* start scheduler */
rt_system_scheduler_start();
......
......@@ -3,10 +3,6 @@ from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
# remove no need file.
if GetDepend('RT_USING_RTGUI') == False:
SrcRemove(src, 'display_controller.c')
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
......
......@@ -110,5 +110,3 @@ void rt_hw_console_output(const char *ptr)
}
/*@}*/
/*
* File : display_controller.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-08-09 lgnq first version for LS1B DC
*/
#include <rtthread.h>
#include "display_controller.h"
struct vga_struct vga_mode[] =
{
{/*"640x480_70.00"*/ 28560, 640, 664, 728, 816, 480, 481, 484, 500, },
{/*"640x640_60.00"*/ 33100, 640, 672, 736, 832, 640, 641, 644, 663, },
{/*"640x768_60.00"*/ 39690, 640, 672, 736, 832, 768, 769, 772, 795, },
{/*"640x800_60.00"*/ 42130, 640, 680, 744, 848, 800, 801, 804, 828, },
{/*"800x480_70.00"*/ 35840, 800, 832, 912, 1024, 480, 481, 484, 500, },
{/*"800x600_60.00"*/ 38220, 800, 832, 912, 1024, 600, 601, 604, 622, },
{/*"800x640_60.00"*/ 40730, 800, 832, 912, 1024, 640, 641, 644, 663, },
{/*"832x600_60.00"*/ 40010, 832, 864, 952, 1072, 600, 601, 604, 622, },
{/*"832x608_60.00"*/ 40520, 832, 864, 952, 1072, 608, 609, 612, 630, },
{/*"1024x480_60.00"*/ 38170, 1024, 1048, 1152, 1280, 480, 481, 484, 497, },
{/*"1024x600_60.00"*/ 48960, 1024, 1064, 1168, 1312, 600, 601, 604, 622, },
{/*"1024x640_60.00"*/ 52830, 1024, 1072, 1176, 1328, 640, 641, 644, 663, },
{/*"1024x768_60.00"*/ 64110, 1024, 1080, 1184, 1344, 768, 769, 772, 795, },
{/*"1152x764_60.00"*/ 71380, 1152, 1208, 1328, 1504, 764, 765, 768, 791, },
{/*"1280x800_60.00"*/ 83460, 1280, 1344, 1480, 1680, 800, 801, 804, 828, },
{/*"1280x1024_55.00"*/ 98600, 1280, 1352, 1488, 1696, 1024, 1025, 1028, 1057, },
{/*"1440x800_60.00"*/ 93800, 1440, 1512, 1664, 1888, 800, 801, 804, 828, },
{/*"1440x900_67.00"*/ 120280, 1440, 1528, 1680, 1920, 900, 901, 904, 935, },
};
ALIGN(16)
volatile rt_uint16_t _rt_framebuffer[FB_YSIZE][FB_XSIZE];
static struct rt_device_graphic_info _dc_info;
#define abs(x) ((x<0)?(-x):x)
#define min(a,b) ((a<b)?a:b)
int caclulate_freq(long long XIN, long long PCLK)
{
int i;
long long clk, clk1;
int start, end;
int mi;
int pll,ctrl,div,div1,frac;
pll = PLL_FREQ;
ctrl = PLL_DIV_PARAM;
rt_kprintf("pll=0x%x, ctrl=0x%x\n", pll, ctrl);
// rt_kprintf("cpu freq is %d\n", tgt_pipefreq());
start = -1;
end = 1;
for (i=start; i<=end; i++)
{
clk = (12+i+(pll&0x3f))*33333333/2;
div = clk/(long)PCLK/1000;
clk1 = (12+i+1+(pll&0x3f))*33333333/2;
div1 = clk1/(long)PCLK/1000;
if (div!=div1)
break;
}
if (div!=div1)
{
frac = ((PCLK*1000*div1)*2*1024/33333333 - (12+i+(pll&0x3f))*1024)&0x3ff;
pll = (pll & ~0x3ff3f)|(frac<<8)|((pll&0x3f)+i);
ctrl = ctrl&~(0x1f<<26)|(div1<<26)|(1<<31);
}
else
{
clk = (12+start+(pll&0x3f))*33333333/2;
clk1 = (12+end+(pll&0x3f))*33333333/2;
if (abs((long)clk/div/1000-PCLK)<abs((long)clk1/(div+1)/1000-PCLK))
{
pll = (pll & ~0x3ff3f)|((pll&0x3f)+start);
ctrl = ctrl&~(0x1f<<26)|(div<<26)|(1<<31);
}
else
{
pll = (pll & ~0x3ff3f)|((pll&0x3f)+end);
ctrl = ctrl&~(0x1f<<26)|((div+1)<<26)|(1<<31);
}
}
rt_kprintf("new pll=0x%x, ctrl=0x%x\n", pll, ctrl);
ctrl |= 0x2a00;
PLL_DIV_PARAM = ctrl;
PLL_FREQ = pll;
rt_thread_delay(10);
// initserial(0);
// _probe_frequencies();
// rt_kprintf("cpu freq is %d\n",tgt_pipefreq());
return 0;
}
static rt_err_t rt_dc_init(rt_device_t dev)
{
int i, out, mode=-1;
int val;
for (i=0; i<sizeof(vga_mode)/sizeof(struct vga_struct); i++)
{
if (vga_mode[i].hr == FB_XSIZE && vga_mode[i].vr == FB_YSIZE)
{
mode=i;
#ifdef LS1FSOC
// out = caclulatefreq(APB_CLK/1000,vga_mode[i].pclk);
// rt_kprintf("out=%x\n",out);
/*inner gpu dc logic fifo pll ctrl,must large then outclk*/
// *(volatile int *)0xbfd00414 = out+1;
/*output pix1 clock pll ctrl*/
// *(volatile int *)0xbfd00410 = out;
/*output pix2 clock pll ctrl */
// *(volatile int *)0xbfd00424 = out;
#else
caclulate_freq(APB_CLK/1000, vga_mode[i].pclk);
#endif
break;
}
}
if (mode<0)
{
rt_kprintf("\n\n\nunsupported framebuffer resolution\n\n\n");
return;
}
DC_FB_CONFIG = 0x0;
DC_FB_CONFIG = 0x3; // // framebuffer configuration RGB565
DC_FB_BUFFER_ADDR0 = (rt_uint32_t)_rt_framebuffer - 0x80000000;
DC_FB_BUFFER_ADDR1 = (rt_uint32_t)_rt_framebuffer - 0x80000000;
DC_DITHER_CONFIG = 0x0;
DC_DITHER_TABLE_LOW = 0x0;
DC_DITHER_TABLE_HIGH = 0x0;
DC_PANEL_CONFIG = 0x80001311;
DC_PANEL_TIMING = 0x0;
DC_HDISPLAY = (vga_mode[mode].hfl<<16) | vga_mode[mode].hr;
DC_HSYNC = 0x40000000 | (vga_mode[mode].hse<<16) | vga_mode[mode].hss;
DC_VDISPLAY = (vga_mode[mode].vfl<<16) | vga_mode[mode].vr;
DC_VSYNC = 0x40000000 | (vga_mode[mode].vse<<16) | vga_mode[mode].vss;
#if defined(CONFIG_VIDEO_32BPP)
DC_FB_CONFIG = 0x00100104;
DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
#elif defined(CONFIG_VIDEO_16BPP)
DC_FB_CONFIG = 0x00100103;
DC_FB_BUFFER_STRIDE = (FB_XSIZE*2+255)&(~255);
#elif defined(CONFIG_VIDEO_15BPP)
DC_FB_CONFIG = 0x00100102;
DC_FB_BUFFER_STRIDE = FB_XSIZE*2;
#elif defined(CONFIG_VIDEO_12BPP)
DC_FB_CONFIG = 0x00100101;
DC_FB_BUFFER_STRIDE = FB_XSIZE*2;
#else //640x480-32Bits
DC_FB_CONFIG = 0x00100104;
DC_FB_BUFFER_STRIDE = FB_XSIZE*4;
#endif //32Bits
#ifdef LS1GSOC
/*fix ls1g dc
*first switch to tile mode
*change origin register to 0
*goback nomal mode
*/
{
val = DC_FB_CONFIG;
DC_FB_CONFIG = val | 0x10;
DC_FB_BUFFER_ORIGIN = 0;
DC_FB_BUFFER_ORIGIN;
rt_thread_delay(10);
DC_FB_CONFIG;
DC_FB_CONFIG = val;
}
#endif
return RT_EOK;
}
static rt_err_t rt_dc_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
switch (cmd)
{
case RTGRAPHIC_CTRL_RECT_UPDATE:
break;
case RTGRAPHIC_CTRL_POWERON:
break;
case RTGRAPHIC_CTRL_POWEROFF:
break;
case RTGRAPHIC_CTRL_GET_INFO:
rt_memcpy(args, &_dc_info, sizeof(_dc_info));
break;
case RTGRAPHIC_CTRL_SET_MODE:
break;
}
return RT_EOK;
}
void rt_hw_dc_init(void)
{
rt_device_t dc = rt_malloc(sizeof(struct rt_device));
if (dc == RT_NULL)
{
rt_kprintf("dc == RT_NULL\n");
return; /* no memory yet */
}
_dc_info.bits_per_pixel = 16;
_dc_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
_dc_info.framebuffer = (rt_uint8_t*)HW_FB_ADDR;
_dc_info.width = FB_XSIZE;
_dc_info.height = FB_YSIZE;
/* init device structure */
dc->type = RT_Device_Class_Graphic;
dc->init = rt_dc_init;
dc->open = RT_NULL;
dc->close = RT_NULL;
dc->control = rt_dc_control;
dc->user_data = (void*)&_dc_info;
/* register Display Controller device to RT-Thread */
rt_device_register(dc, "dc", RT_DEVICE_FLAG_RDWR);
}
/*
* File : display_controller.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-08-08 lgnq first version for LS1B
* 2015-07-06 chinesebear modified for loongson 1c
*/
#ifndef __DISPLAY_CONTROLLER_H__
#define __DISPLAY_CONTROLLER_H__
#include <rtthread.h>
#include "ls1c.h"
#define DC_BASE 0xBC301240 //Display Controller
/* Frame Buffer registers */
#define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
#define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
#define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
#define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
#define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
#define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
#define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
#define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
#define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
#define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
#define DC_HSYNC __REG32(DC_BASE + 0x1E0)
#define DC_VDISPLAY __REG32(DC_BASE + 0x240)
#define DC_VSYNC __REG32(DC_BASE + 0x260)
#define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
/* Display Controller driver for 1024x768 16bit */
#define FB_XSIZE 1024
#define FB_YSIZE 768
#define CONFIG_VIDEO_16BPP
#define APB_CLK 33333333
#define K1BASE 0xA0000000
#define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
#define HW_FB_ADDR KSEG1(_rt_framebuffer)
#define HW_FB_PIXEL(x, y) *(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * FB_XSIZE * 2) + x * 2)
struct vga_struct
{
long pclk;
int hr,hss,hse,hfl;
int vr,vss,vse,vfl;
};
#endif
......@@ -23,6 +23,8 @@
#define RT_USING_OVERFLOW_CHECK
// <bool name="RT_USING_INTERRUPT_INFO" description="Show more interrupt description" default="true" />
#define RT_USING_INTERRUPT_INFO
// <integer name="IDLE_THREAD_STACK_SIZE" description="The stack size of idle thread" default="1024" />
#define IDLE_THREAD_STACK_SIZE 1024
// </section>
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
......@@ -91,15 +93,16 @@
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
// <bool name="FINSH_USING_MSH" description="Using module shell" default="true" />
#define FINSH_USING_MSH
// <bool name="FINSH_USING_MSH_DEFAULT" description="Using module shell as the default shell" default="true" />
#define FINSH_USING_MSH_DEFAULT
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
#define RT_USING_LIBC
// <bool name="RT_USING_NEWLIB" description="Using newlib library, only available under GNU GCC" default="true" />
// #define RT_USING_NEWLIB
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
// #define RT_USING_PTHREADS
#define RT_USING_PTHREADS
// </section>
// <section name="RT_USING_DFS" description="Device file system" default="true" >
......
# Object files
*.o
*.ko
*.mo
*.d
*.crf
*.lst
# Libraries
*.lib
*.a
# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib
*.pyc
# Executables
*.exe
*.out
*.app
*.elf
*.axf
*.bin
*.hex
# Intermediate file
*.bak
*.swp
*.map
*.dblite
*.dep
*.lnp
*.uvgui.*
*.build_log.*
build
Debug
_UpgradeReport_Files
*.ncb
*.suo
*.exp
*.XML
*.user
*.def
......@@ -88,7 +88,7 @@ def ObjRemove(objs, remove):
# build program -shared
if GetDepend('RT_USING_MODULE'):
# Remove module.c in $RTT_ROOT/src
ObjRemove(objs, ['module.obj', 'module.o'])
ObjRemove(objs, ['module.obj', 'module.o', 'module.c'])
AddOption('--def',
dest='def',
......@@ -99,7 +99,7 @@ if GetDepend('RT_USING_MODULE'):
if rtconfig.PLATFORM == 'mingw':
env['LINKFLAGS'] = rtconfig.DEFFILE_LFLAGS
else:
rtconfig.POST_ACTION = 'createdef.py $TARGET rtthread.def'
rtconfig.POST_ACTION = 'python createdef.py $TARGET rtthread.def'
program = env.Program(TARGET, objs)
else:
......
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006, RT-Thread Development Team
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
......@@ -16,154 +26,15 @@
#include <stdio.h>
#include <board.h>
#ifdef RT_USING_FINSH
#include <finsh.h>
#include <shell.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <netif/ethernetif.h>
extern void lwip_system_init(void);
#endif
#ifdef RT_USING_DFS
#include <dfs_init.h>
#include <dfs_fs.h>
#ifdef RT_USING_DFS_ELMFAT
#include <dfs_elm.h>
#endif
#if defined(RT_USING_LWIP) && defined(RT_USING_DFS_NFS)
#include <dfs_nfs.h>
#endif
#ifdef RT_USING_DFS_ROMFS
#include <dfs_romfs.h>
#endif
#ifdef RT_USING_DFS_DEVFS
#include <devfs.h>
#endif
#ifdef RT_USING_DFS_UFFS
#include <dfs_uffs.h>
#endif
#ifdef RT_USING_DFS_JFFS2
#include <dfs_jffs2.h>
#endif
#ifdef RT_USING_DFS_YAFFS2
#include <dfs_yaffs2.h>
#endif
#ifdef RT_USING_DFS_ROMFS
#include <dfs_romfs.h>
#endif
#endif
#ifdef RT_USING_NEWLIB
#include <libc.h>
#endif
#ifdef RT_USING_PTHREADS
#include <pthread.h>
#endif
#ifdef RT_USING_MODULE
#include <rtm.h>
#endif
#ifdef RT_USING_RTGUI
#include <rtgui/rtgui_system.h>
#endif
#include "init.h"
void rt_init_thread_entry(void *parameter)
{
#ifdef RT_USING_LWIP
#ifdef RT_USING_TAPNETIF
tap_netif_hw_init();
#else
pcap_netif_hw_init();
#endif
#endif
rt_platform_init();
#ifdef RT_USING_MODULE
rt_system_module_init();
#endif
#ifdef RT_USING_FINSH
/* initialize finsh */
finsh_system_init();
finsh_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_LWIP
/* initialize lwip stack */
/* register ethernetif device */
eth_system_device_init();
/* initialize lwip system */
lwip_system_init();
rt_kprintf("TCP/IP initialized!\n");
#endif
#ifdef RT_USING_DFS
/* initialize the device file system */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* initialize the elm chan FatFS file system*/
elm_init();
#endif
#if defined(RT_USING_DFS_NFS) && defined(RT_USING_LWIP)
/* initialize NFSv3 client file system */
nfs_init();
#endif
#ifdef RT_USING_DFS_YAFFS2
dfs_yaffs2_init();
#endif
#ifdef RT_USING_DFS_UFFS
dfs_uffs_init();
#endif
#ifdef RT_USING_DFS_JFFS2
dfs_jffs2_init();
#endif
#ifdef RT_USING_DFS_ROMFS
dfs_romfs_init();
#endif
#ifdef RT_USING_DFS_RAMFS
dfs_ramfs_init();
#endif
#ifdef RT_USING_DFS_DEVFS
devfs_init();
#endif
#endif /* end of RT_USING_DFS */
#ifdef RT_USING_NEWLIB
libc_system_init(RT_CONSOLE_DEVICE_NAME);
#else
/* the pthread system initialization will be initiallized in libc */
#ifdef RT_USING_PTHREADS
pthread_system_init();
#endif
#endif
#ifdef RT_USING_RTGUI
rtgui_system_server_init();
#endif
#ifdef RT_USING_USB_HOST
rt_usb_host_init();
#endif
#ifdef RT_USING_RTGUI
/* start sdl thread to simulate an LCD. SDL may depend on DFS and should be
* called after rt_components_init. */
rt_hw_sdl_start();
#endif /* RT_USING_RTGUI */
components_init();
/* File system Initialization */
#ifdef RT_USING_DFS
......@@ -228,5 +99,3 @@ int rt_application_init()
return 0;
}
/*@}*/
\ No newline at end of file
/*
* File : init.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-09-30 Bernard the first version
*/
#include <rtthread.h>
#include "init.h"
#ifdef RT_USING_FINSH
#include <finsh.h>
#include <shell.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <netif/ethernetif.h>
extern void lwip_system_init(void);
#endif
#ifdef RT_USING_DFS
#include <dfs_init.h>
#include <dfs_fs.h>
#ifdef RT_USING_DFS_ELMFAT
#include <dfs_elm.h>
#endif
#if defined(RT_USING_LWIP) && defined(RT_USING_DFS_NFS)
#include <dfs_nfs.h>
#endif
#ifdef RT_USING_DFS_ROMFS
#include <dfs_romfs.h>
#endif
#ifdef RT_USING_DFS_DEVFS
#include <devfs.h>
#endif
#ifdef RT_USING_DFS_UFFS
#include <dfs_uffs.h>
#endif
#ifdef RT_USING_DFS_JFFS2
#include <dfs_jffs2.h>
#endif
#ifdef RT_USING_DFS_YAFFS2
#include <dfs_yaffs2.h>
#endif
#ifdef RT_USING_DFS_ROMFS
#include <dfs_romfs.h>
#endif
#endif
#ifdef RT_USING_NEWLIB
#include <libc.h>
#endif
#ifdef RT_USING_PTHREADS
#include <pthread.h>
#endif
#ifdef RT_USING_MODULE
#include <rtm.h>
#endif
#ifdef RT_USING_RTGUI
#include <rtgui/rtgui_system.h>
#endif
/* components initialization for simulator */
void components_init(void)
{
platform_init();
#ifdef RT_USING_MODULE
rt_system_module_init();
#endif
#ifdef RT_USING_FINSH
/* initialize finsh */
finsh_system_init();
finsh_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_LWIP
/* initialize lwip stack */
/* register ethernetif device */
eth_system_device_init();
/* initialize lwip system */
lwip_system_init();
rt_kprintf("TCP/IP initialized!\n");
#endif
#ifdef RT_USING_DFS
/* initialize the device file system */
dfs_init();
#ifdef RT_USING_DFS_ELMFAT
/* initialize the elm chan FatFS file system*/
elm_init();
#endif
#if defined(RT_USING_DFS_NFS) && defined(RT_USING_LWIP)
/* initialize NFSv3 client file system */
nfs_init();
#endif
#ifdef RT_USING_DFS_YAFFS2
dfs_yaffs2_init();
#endif
#ifdef RT_USING_DFS_UFFS
dfs_uffs_init();
#endif
#ifdef RT_USING_DFS_JFFS2
dfs_jffs2_init();
#endif
#ifdef RT_USING_DFS_ROMFS
dfs_romfs_init();
#endif
#ifdef RT_USING_DFS_RAMFS
dfs_ramfs_init();
#endif
#ifdef RT_USING_DFS_DEVFS
devfs_init();
#endif
#endif /* end of RT_USING_DFS */
#ifdef RT_USING_NEWLIB
libc_system_init(RT_CONSOLE_DEVICE_NAME);
#else
/* the pthread system initialization will be initiallized in libc */
#ifdef RT_USING_PTHREADS
pthread_system_init();
#endif
#endif
#ifdef RT_USING_RTGUI
rtgui_system_server_init();
#endif
#ifdef RT_USING_USB_HOST
rt_usb_host_init();
#endif
#ifdef RT_USING_RTGUI
/* start sdl thread to simulate an LCD. SDL may depend on DFS and should be
* called after rt_components_init. */
rt_hw_sdl_start();
#endif /* RT_USING_RTGUI */
}
/*
* File : init.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2015, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2015-09-30 Bernard the first version
*/
#ifndef INIT_H__
#define INIT_H__
void platform_init(void);
void components_init(void);
#endif
#include <rtthread.h>
#include "board.h"
void rt_platform_init(void)
void platform_init(void)
{
#ifdef RT_USING_LWIP
#ifdef RT_USING_TAPNETIF
tap_netif_hw_init();
#else
pcap_netif_hw_init();
#endif
#endif
#ifdef RT_USING_DFS
/* initialize sd card */
rt_hw_sdcard_init();
......@@ -16,9 +24,5 @@ void rt_platform_init(void)
#endif
#endif /* RT_USING_DFS */
#ifdef _WIN32
rt_thread_idle_sethook(rt_hw_win32_low_cpu);
#endif
}
......@@ -14,9 +14,12 @@
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include <stdlib.h>
#include "board.h"
#include "uart_console.h"
/**
* @addtogroup simulator on win32
*/
......@@ -93,9 +96,11 @@ void rt_hw_board_init()
/* init system memory */
heap = rt_hw_sram_init();
//#if defined(RT_USING_USART)
rt_hw_usart_init();
//#endif
uart_console_init();
#ifdef _WIN32
rt_thread_idle_sethook(rt_hw_win32_low_cpu);
#endif
#if defined(RT_USING_CONSOLE)
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
......
......@@ -505,8 +505,6 @@ static int dfs_win32_stat(struct dfs_filesystem *fs, const char *path, struct st
st->st_mtime = time_tmp.QuadPart;
}
st->st_blksize = 0;
FindClose(hFind);
return 0;
......
......@@ -17,7 +17,7 @@
#include <rtm.h>
#ifdef RT_USING_MODULE
static void rt_module_init_object_container(struct rt_module *module)
void rt_module_init_object_container(struct rt_module *module)
{
RT_ASSERT(module != RT_NULL);
......@@ -130,6 +130,7 @@ void rt_module_unload_sethook(void (*hook)(rt_module_t module))
*/
int rt_system_module_init(void)
{
return 0;
}
/**
......@@ -148,6 +149,7 @@ rt_module_t rt_module_self(void)
/* return current module */
return (rt_module_t)tid->module_id;
}
RTM_EXPORT(rt_module_self);
/**
* This function will find the specified module.
......@@ -191,6 +193,7 @@ rt_module_t rt_module_find(const char *name)
/* not found */
return RT_NULL;
}
RTM_EXPORT(rt_module_find);
#ifdef RT_USING_DFS
#include <windows.h>
......@@ -237,10 +240,10 @@ rt_module_t rt_module_open(const char *path)
struct dfs_filesystem *fs;
appentry_t fptr;
HINSTANCE hinstlib;
int len;
char * winpath;
rt_module_t module;
char * name;
rt_module_t module;
char * winpath = RT_NULL;
char * name = RT_NULL;
RT_DEBUG_NOT_IN_INTERRUPT;
......@@ -256,10 +259,10 @@ rt_module_t rt_module_open(const char *path)
}
/* change path */
len = strlen(path+1);
// len = strlen(path+1);
if ((winpath = dfs_win32_dirdup((char *)path)) == RT_NULL)
{
rt_kprintf("out of memory, exit", path);
rt_kprintf("out of memory, exit");
return RT_NULL;
}
......@@ -282,10 +285,8 @@ rt_module_t rt_module_open(const char *path)
name = _module_name(path);
/* allocate module */
module = (struct rt_module *)rt_object_allocate(RT_Object_Class_Module,
name);
if (!module)
return RT_NULL;
module = (struct rt_module *)rt_object_allocate(RT_Object_Class_Module, name);
if (!module) return RT_NULL;
module->nref = 0;
module->module_entry = fptr;
......@@ -298,31 +299,21 @@ rt_module_t rt_module_open(const char *path)
if (module->module_entry != 0)
{
rt_uint32_t *stack_size;
rt_uint8_t *priority;
#ifdef RT_USING_SLAB
/* init module memory allocator */
module->mem_list = RT_NULL;
/* create page array */
module->page_array =
module->page_array =
(void *)rt_malloc(PAGE_COUNT_MAX * sizeof(struct rt_page_info));
module->page_cnt = 0;
#endif
/* get the main thread stack size */
module->stack_size = 2048;
module->thread_priority = RT_THREAD_PRIORITY_MAX - 2;
/* create module thread */
module->module_thread =
rt_thread_create(name,
(void(*)(void *))module->module_entry,
RT_NULL,
module->stack_size,
module->thread_priority,
10);
(void(*)(void *))module->module_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX - 2, 10);
RT_DEBUG_LOG(RT_DEBUG_MODULE, ("thread entry 0x%x\n",
module->module_entry));
......@@ -354,14 +345,220 @@ rt_module_t rt_module_open(const char *path)
#if defined(RT_USING_FINSH)
#include <finsh.h>
FINSH_FUNCTION_EXPORT_ALIAS(rt_module_open, exec, exec module from a file);
#endif
#endif
#define RT_MODULE_ARG_MAX 8
static int _rt_module_split_arg(char* cmd, rt_size_t length, char* argv[])
{
int argc = 0;
char *ptr = cmd;
while ((ptr - cmd) < length)
{
/* strip bank and tab */
while ((*ptr == ' ' || *ptr == '\t') && (ptr -cmd)< length)
*ptr++ = '\0';
/* check whether it's the end of line */
if ((ptr - cmd)>= length) break;
/* handle string with quote */
if (*ptr == '"')
{
argv[argc++] = ++ptr;
/* skip this string */
while (*ptr != '"' && (ptr-cmd) < length)
if (*ptr ++ == '\\') ptr ++;
if ((ptr - cmd) >= length) break;
/* skip '"' */
*ptr ++ = '\0';
}
else
{
argv[argc++] = ptr;
while ((*ptr != ' ' && *ptr != '\t') && (ptr - cmd) < length)
ptr ++;
}
if (argc >= RT_MODULE_ARG_MAX) break;
}
return argc;
}
/* module main thread entry */
static void module_main_entry(void* parameter)
{
int argc;
char *argv[RT_MODULE_ARG_MAX];
typedef int (*main_func_t)(int argc, char** argv);
rt_module_t module = (rt_module_t) parameter;
if (module == RT_NULL || module->module_cmd_line == RT_NULL) return;
rt_memset(argv, 0x00, sizeof(argv));
argc = _rt_module_split_arg((char*)module->module_cmd_line, module->module_cmd_size, argv);
if (argc == 0) return ;
/* do the main function */
((main_func_t)module->module_entry)(argc, argv);
return;
}
/**
* This function will do a executable program with main function and parameters.
*
* @param path the full path of application module
* @param cmd_line the command line of program
* @param size the size of command line of program
*
* @return the module object
*/
rt_module_t rt_module_exec_cmd(const char *path, const char* cmd_line, int line_size)
{
struct dfs_filesystem *fs;
appentry_t fptr;
HINSTANCE hinstlib;
rt_module_t module;
char * winpath = RT_NULL;
char * name = RT_NULL;
char *full_path = RT_NULL;
RT_DEBUG_NOT_IN_INTERRUPT;
/* check parameters */
RT_ASSERT(path != RT_NULL);
if (*path != '/')
{
full_path = dfs_normalize_path(RT_NULL, path);
}
else
{
full_path = (const char*)path;
}
/* app module should only in DFS_WIN32 */
fs = dfs_filesystem_lookup(full_path);
if ((fs == RT_NULL) || (strcmp(fs->ops->name,"wdir") != 0))
{
rt_kprintf("invalid path: %s\n", path);
goto __exit;
}
/* change path */
// len = strlen(full_path + 1);
if ((winpath = dfs_win32_dirdup((char *)full_path)) == RT_NULL)
{
rt_kprintf("out of memory, exit", path);
goto __exit;
}
hinstlib = LoadLibrary(winpath);
if (hinstlib == NULL)
{
rt_kprintf("error: unable to open %s\n", winpath);
goto __exit;
}
fptr = (appentry_t)GetProcAddress(hinstlib, "main");
if (fptr == NULL)
{
rt_kprintf("error: unable to find function in %s\n", winpath);
FreeLibrary(hinstlib);
goto __exit;
}
/* release winpath */
rt_free(winpath);
/* get the name of the module */
name = _module_name(path);
/* allocate module */
module = (struct rt_module *)rt_object_allocate(RT_Object_Class_Module, name);
if (!module)
{
goto __exit;
}
module->nref = 0;
module->module_entry = fptr;
/* init module object container */
rt_module_init_object_container(module);
/* increase module reference count */
module->nref ++;
if (module->module_entry != 0)
{
/* set module argument */
module->module_cmd_line = (rt_uint8_t*)rt_malloc(line_size + 1);
rt_memcpy(module->module_cmd_line, cmd_line, line_size);
module->module_cmd_line[line_size] = '\0';
module->module_cmd_size = line_size;
#ifdef RT_USING_SLAB
/* init module memory allocator */
module->mem_list = RT_NULL;
/* create page array */
module->page_array =
(void *)rt_malloc(PAGE_COUNT_MAX * sizeof(struct rt_page_info));
module->page_cnt = 0;
#endif
/* create module thread */
module->module_thread = rt_thread_create(name,
module_main_entry, module,
2048, RT_THREAD_PRIORITY_MAX - 2, 10);
/* set module id */
module->module_thread->module_id = (void *)module;
module->parent.flag = RT_MODULE_FLAG_WITHENTRY;
/* startup module thread */
rt_thread_startup(module->module_thread);
}
else
{
/* without entry point */
module->parent.flag |= RT_MODULE_FLAG_WITHOUTENTRY;
}
#ifdef RT_USING_HOOK
if (rt_module_load_hook != RT_NULL)
{
rt_module_load_hook(module);
}
#endif
rt_free(name);
return module;
__exit:
if (full_path != path) rt_free(full_path);
if (name != RT_NULL) rt_free(full_path);
if (winpath != RT_NULL)rt_free(winpath);
return RT_NULL;
/* FreeLibrary(hinstlib); */
}
rt_err_t rt_module_destroy(rt_module_t module)
{
return 0;
}
rt_err_t rt_module_unload(rt_module_t module)
{
return 0;
}
#endif
......@@ -9,7 +9,6 @@
// #define SD_TRACE rt_kprintf
#define SD_TRACE(...)
//#define SDCARD_SIM "F:\\Project\\tools\\SDCARD"
#define SDCARD_SIM "sd.bin"
#define SDCARD_SIZE (16*1024*1024) //16M
......
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2013 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-02-05 Bernard first version
* 2009-10-25 Bernard fix rt_serial_read bug when there is no data
* in the buffer.
* 2010-03-29 Bernard cleanup code.
* 2013-02-7 prife rewrite for simulator
*/
#include <rthw.h>
#include "serial.h"
#include <stdio.h>
#if 0
static FILE *fp = RT_NULL;
#endif
/*@{*/
int seial_save_byte(unsigned char ch, struct serial_device * serial)
{
/* save on rx buffer */
rt_base_t level;
struct rt_device * dev = RT_DEVICE(serial);
/* disable interrupt */
//暂时关闭中断,因为要操作uart数据结构
level = rt_hw_interrupt_disable();
/* save character */
serial->serial_rx.rx_buffer[serial->serial_rx.save_index] = ch;
serial->serial_rx.save_index ++;
//下面的代码检查save_index是否已经到到缓冲区尾部,如果是则回转到头部,称为一个环形缓冲区
if (serial->serial_rx.save_index >= SERIAL_RX_BUFFER_SIZE)
serial->serial_rx.save_index = 0;
//这种情况表示反转后的save_index追上了read_index,则增大read_index,丢弃一个旧的数据
/* if the next position is read index, discard this 'read char' */
if (serial->serial_rx.save_index == serial->serial_rx.read_index)
{
serial->serial_rx.read_index ++;
if (serial->serial_rx.read_index >= SERIAL_RX_BUFFER_SIZE)
serial->serial_rx.read_index = 0;
}
/* enable interrupt */
//uart数据结构已经操作完成,重新使能中断
rt_hw_interrupt_enable(level);
/* invoke callback */
if (dev->rx_indicate != RT_NULL)
{
rt_size_t rx_length;
/* get rx length */
rx_length = serial->serial_rx.read_index > serial->serial_rx.save_index ?
SERIAL_RX_BUFFER_SIZE - serial->serial_rx.read_index + serial->serial_rx.save_index :
serial->serial_rx.save_index - serial->serial_rx.read_index;
dev->rx_indicate(dev, rx_length);
}
return 0;
}
/* RT-Thread Device Interface */
/**
* This function initializes serial
*/
static rt_err_t rt_serial_init(rt_device_t dev)
{
struct serial_device * serial = SERIAL_DEVICE(dev);
if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
{
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
rt_memset(serial->serial_rx.rx_buffer, 0,
sizeof(serial->serial_rx.rx_buffer));
serial->serial_rx.read_index = 0;
serial->serial_rx.save_index = 0;
}
dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
}
return RT_EOK;
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
rt_uint8_t *ptr;
rt_err_t err_code;
struct serial_device * serial = SERIAL_DEVICE(dev);
ptr = buffer;
err_code = RT_EOK;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* interrupt mode Rx */
while (size)
{
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
if (serial->serial_rx.read_index != serial->serial_rx.save_index)
{
/* read a character */
*ptr++ = serial->serial_rx.rx_buffer[serial->serial_rx.read_index];
size--;
/* move to next position */
serial->serial_rx.read_index ++;
if (serial->serial_rx.read_index >= SERIAL_RX_BUFFER_SIZE)
serial->serial_rx.read_index = 0;
}
else
{
/* set error code */
err_code = -RT_EEMPTY;
/* enable interrupt */
rt_hw_interrupt_enable(level);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
}
}
/* set error code */
rt_set_errno(err_code);
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
int level;
#if 0
if (fp == NULL)
fp = fopen("log.txt", "wb+");
if (fp != NULL)
fwrite(buffer, size, 1, fp);
#endif
level = rt_hw_interrupt_disable();
fwrite(buffer, size, 1, stdout);
fflush(stdout);
rt_hw_interrupt_enable(level);
return size;
}
static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
RT_ASSERT(dev != RT_NULL);
switch (cmd)
{
case RT_DEVICE_CTRL_SUSPEND:
/* suspend device */
dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
break;
case RT_DEVICE_CTRL_RESUME:
/* resume device */
dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
break;
}
return RT_EOK;
}
/*
* serial register
*/
rt_err_t rt_hw_serial_register(rt_device_t device, const char *name, rt_uint32_t flag)
{
RT_ASSERT(device != RT_NULL);
device->type = RT_Device_Class_Char;
device->rx_indicate = RT_NULL;
device->tx_complete = RT_NULL;
device->init = rt_serial_init;
device->open = rt_serial_open;
device->close = rt_serial_close;
device->read = rt_serial_read;
device->write = rt_serial_write;
device->control = rt_serial_control;
device->user_data = RT_NULL;
/* register a character device */
return rt_device_register(device, name, (rt_uint16_t)(RT_DEVICE_FLAG_RDWR | flag));
}
rt_err_t rt_hw_serial_init(struct serial_device * serial, char * name)
{
return rt_hw_serial_register(RT_DEVICE(serial), name,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
}
/*
*********************************************************************************************************
* MC9S12DP256/DG128 Specific code
* BANKED MEMORY MODEL
*
* File : rthw.c
* By : parai
* email:parai@foxmail.com
*******************************************************************************************************/
#ifndef __RT_HW_SERIAL_H__
#define __RT_HW_SERIAL_H__
#include <rtdevice.h>
#define SERIAL_RX_BUFFER_SIZE 80
struct serial_int_rx
{
rt_uint8_t rx_buffer[SERIAL_RX_BUFFER_SIZE];
rt_uint32_t read_index, save_index;
};
struct serial_device
{
struct rt_device dev;
struct serial_int_rx serial_rx;
};
#define SERIAL_DEVICE(dev) ((struct serial_device *)(dev))
int seial_save_byte(unsigned char ch, struct serial_device * serial);
rt_err_t rt_hw_serial_init(struct serial_device * serial, char * name);
#endif
/*
* File : serial.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2013 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2012-09-25 prife first implementation
* 2013-01-15 prife support linux
* 2013-02-6 prife rewrite to fit the new serial.c
*/
#include <rthw.h>
#include <rtthread.h>
#include <stdio.h>
#include <rthw.h>
#include <rtdevice.h>
#include <rtthread.h>
#include <rtdevice.h>
/* uart driver */
struct console_uart
{
int rx_ready;
struct rt_ringbuffer rb;
rt_uint8_t rx_buffer[256];
} _console_uart;
static struct rt_serial_device _serial;
#define SAVEKEY(key) do { char ch = key; rt_ringbuffer_put_force(&(_console_uart.rb), &ch, 1); } while (0)
#ifdef _WIN32
#include <windows.h>
#include <mmsystem.h>
#include <conio.h>
#endif
#include <stdio.h>
#include "serial.h"
struct serial_device serial1;
#define SAVEKEY(key) seial_save_byte(key, &serial1)
#ifdef _WIN32
/*
* Handler for OSKey Thread
*/
......@@ -36,9 +29,8 @@ static HANDLE OSKey_Thread;
static DWORD OSKey_ThreadID;
static DWORD WINAPI ThreadforKeyGet(LPVOID lpParam);
void rt_hw_usart_init(void)
void console_lowlevel_init(void)
{
rt_hw_serial_init(&serial1, RT_CONSOLE_DEVICE_NAME);
/*
* create serial thread that receive key input from keyboard
*/
......@@ -52,9 +44,9 @@ void rt_hw_usart_init(void)
if (OSKey_Thread == NULL)
{
//Display Error Message
return;
}
SetThreadPriority(OSKey_Thread,
THREAD_PRIORITY_NORMAL);
SetThreadPriorityBoost(OSKey_Thread,
......@@ -67,6 +59,7 @@ void rt_hw_usart_init(void)
ResumeThread(OSKey_Thread);
}
static DWORD WINAPI ThreadforKeyGet(LPVOID lpParam)
#else /* POSIX version */
#include <pthread.h>
......@@ -78,11 +71,11 @@ void rt_hw_usart_init(void)
static void * ThreadforKeyGet(void * lpParam);
static pthread_t OSKey_Thread;
void rt_hw_usart_init(void)
void console_lowlevel_init(void)
{
int res;
rt_hw_serial_init(&serial1, RT_CONSOLE_DEVICE_NAME);
res = pthread_create(&OSKey_Thread, NULL, &ThreadforKeyGet, NULL);
if (res)
{
......@@ -90,15 +83,10 @@ void rt_hw_usart_init(void)
exit(EXIT_FAILURE);
}
}
#endif
#ifdef _WIN32
static DWORD WINAPI ThreadforKeyGet(LPVOID lpParam)
#else
static struct termios oldt, newt;
/*simulate windows' getch(), it works!!*/
void set_stty(void)
static void set_stty(void)
{
/* get terminal input's attribute */
tcgetattr(STDIN_FILENO, &oldt);
......@@ -116,15 +104,14 @@ void restore_stty(void)
}
#define getch getchar
static void * ThreadforKeyGet(void * lpParam)
#endif /* not _WIN32*/
{
/*
* 方向键(←): 0xe04b
* 方向键(↑): 0xe048
* 方向键(→): 0xe04d
* 方向键(↓): 0xe050
* left key(��)�� 0xe04b
* up key(��)�� 0xe048
* right key(��)�� 0xe04d
* down key(��)�� 0xe050
*/
unsigned char key;
......@@ -135,7 +122,9 @@ static void * ThreadforKeyGet(void * lpParam)
pthread_sigmask(SIG_BLOCK, &sigmask, &oldmask);
set_stty();
#endif
(void)lpParam; //prevent compiler warnings
for (;;)
{
key = getch();
......@@ -173,5 +162,109 @@ static void * ThreadforKeyGet(void * lpParam)
}
#endif
SAVEKEY(key);
/* Notfiy serial ISR */
rt_hw_serial_isr(&_serial, RT_SERIAL_EVENT_RX_IND);
}
} /*** ThreadforKeyGet ***/
static rt_err_t console_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
/* no baudrate, nothing */
return RT_EOK;
}
static rt_err_t console_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct console_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct console_uart *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
uart->rx_ready = 0;
break;
case RT_DEVICE_CTRL_SET_INT:
uart->rx_ready = 1;
break;
}
return RT_EOK;
}
static int console_putc(struct rt_serial_device *serial, char c)
{
int level;
struct console_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct console_uart *)serial->parent.user_data;
#if 0 /* Enable it if you want to save the console log */
{
static FILE* fp = NULL;
if (fp == NULL)
fp = fopen("log.txt", "wb+");
if (fp != NULL)
fwrite(buffer, size, 1, fp);
}
#endif
level = rt_hw_interrupt_disable();
fwrite(&c, 1, 1, stdout);
fflush(stdout);
rt_hw_interrupt_enable(level);
return 1;
}
static int console_getc(struct rt_serial_device *serial)
{
char ch;
struct console_uart* uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct console_uart *)serial->parent.user_data;
if (rt_ringbuffer_getchar(&(uart->rb), &ch)) return ch;
return -1;
}
static const struct rt_uart_ops console_uart_ops =
{
console_configure,
console_control,
console_putc,
console_getc,
};
int uart_console_init(void)
{
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
struct console_uart* uart;
struct rt_serial_device* serial;
uart = &_console_uart;
serial = &_serial;
uart->rx_ready = 0;
serial->ops = &console_uart_ops;
serial->config = config;
/* initialize ring buffer */
rt_ringbuffer_init(&uart->rb, uart->rx_buffer, sizeof(uart->rx_buffer));
/* register UART device */
rt_hw_serial_register(serial, "console",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
console_lowlevel_init();
return 0;
}
#ifndef UART_CONSOLE_H__
#define UART_CONSOLE_H__
int uart_console_init(void);
#endif
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
#define RT_HEAP_SIZE (1024*1024*2)
#if defined(_MSC_VER)
/* SECTION: port for visual studio */
#undef RT_USING_NEWLIB
#undef RT_USING_MINILIBC
#define NORESOURCE //RT_VESRION in winuser.h
#define _CRT_ERRNO_DEFINED //errno macro redefinition
#define _INC_WTIME_INL//dfs_elm.c time.h conflicts with wtime.inl
#define _INC_TIME_INL //dfs_elm.c time.h conflicts with wtime.inl
/* disable some warning in MSC */
#pragma warning(disable:4273) /* to ignore: warning C4273: inconsistent dll linkage */
#pragma warning(disable:4312) /* to ignore: warning C4312: 'type cast' : conversion from 'rt_uint32_t' to 'rt_uint32_t *' */
#pragma warning(disable:4311) /* to ignore: warning C4311: 'type cast' : pointer truncation from 'short *__w64 ' to 'long' */
#pragma warning(disable:4996) /* to ignore: warning C4996: The POSIX name for this item is deprecated. */
#pragma warning(disable:4267) /* to ignore: warning C4267: conversion from 'size_t' to 'rt_size_t', possible loss of data */
#pragma warning(disable:4244) /* to ignore: warning C4244: '=' : conversion from '__w64 int' to 'rt_size_t', possible loss of data */
#elif defined(__GNUC__)
#define RT_USING_NOLIBC
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
#if defined(__MINGW32__)
#define _NO_OLDNAMES /* to ignore: mode_t in sys/type.h */
#endif
#endif
/* SECTION: basic kernel options */
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* RT_ALIGN_SIZE*/
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 6
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
/* PRIORITY_MAX */
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second */
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 32
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="100" />
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug */
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
#define RT_DEBUG
//#define RT_DEBUG_SCHEDULER 1
#define RT_THREAD_DEBUG
// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />
// #define RT_THREAD_DEBUG
// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />
#define RT_USING_OVERFLOW_CHECK
// </section>
/* Using Hook */
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
#define RT_USING_HOOK
/* Using Software Timer */
/* #define RT_USING_TIMER_SOFT */
#define RT_TIMER_THREAD_PRIO 4
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_TICK_PER_SECOND 10
// </section>
/* SECTION: IPC */
/* Using Semaphore*/
// <section name="IPC" description="Inter-Thread communication" default="always" >
// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />
#define RT_USING_SEMAPHORE
/* Using Mutex */
// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />
#define RT_USING_MUTEX
/* Using Event */
// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />
#define RT_USING_EVENT
/* Using MailBox */
// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />
#define RT_USING_MAILBOX
/* Using Message Queue */
// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
/* #define RT_USING_MEMPOOL */
/* Using Dynamic Heap Management */
// </section>
// <section name="MM" description="Memory Management" default="always" >
// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />
#define RT_USING_MEMPOOL
// <bool name="RT_USING_MEMHEAP" description="Using Memory Heap Object in the system" default="true" />
#define RT_USING_MEMHEAP
// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />
#define RT_USING_HEAP
/* Using Small MM */
// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />
#define RT_USING_SMALL_MEM
/* #define RT_TINY_SIZE */
// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />
// #define RT_USING_SLAB
// </section>
/* SECTION: Device System */
/* Using Device System */
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
#define RT_USING_DEVICE
// <bool name="RT_USING_DEVICE_IPC" description="Using Inter-Thread communication for Device" default="true" >
#define RT_USING_DEVICE_IPC
/* #define RT_USING_UART1 */
// <bool name="RT_USING_SERIAL" description="Using serial device framework" default="true">
#define RT_USING_SERIAL
// <bool name="RT_USING_UART0" description="Using UART0" default="true" />
#define RT_USING_UART0
// </section>
/* SECTION: Console options */
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
/* the buffer size of console*/
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "sci0"
/* SECTION: APP MODULE */
/* #define RT_USING_MODULE */
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
#define RT_CONSOLE_DEVICE_NAME "console"
// </section>
/* SECTION: MTD interface options */
/* using mtd nand flash */
#define RT_USING_MTD_NAND
/* using mtd nor flash */
/* #define RT_USING_MTD_NOR */
/* SECTION: finsh, a C-Express shell */
// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >
#define RT_USING_FINSH
/* Using symbol table */
// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />
#define FINSH_USING_SYMTAB
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
/* SECTION: device file system */
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
// <bool name="FINSH_USING_MSH" description="Enable module shell feature" />
#define FINSH_USING_MSH
// <bool name="FINSH_USING_MSH_DEFAULT" description="Use module shell as the default shell" />
#define FINSH_USING_MSH_DEFAULT
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
// <bool name="RT_USING_LIBC" description="Using C library" default="true" />
// #define RT_USING_LIBC
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
// #define RT_USING_PTHREADS
// <bool name="RT_USING_MODULE" description="Enable Moudle Application" default="true" />
// #define RT_USING_MODULE
// </section>
// <section name="RT_USING_DFS" description="Device file system" default="true" >
#define RT_USING_DFS
#define DFS_FILESYSTEM_TYPES_MAX 8
/* DFS: ELM FATFS options */
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
#define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 4
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
#define RT_DFS_ELM_WORD_ACCESS
/* Reentrancy (thread safe) of the FatFs module. */
#define RT_DFS_ELM_REENTRANT
/* Number of volumes (logical drives) to be used. */
#define RT_DFS_ELM_DRIVES 2
/* #define RT_DFS_ELM_USE_LFN 1 */
#define RT_DFS_ELM_MAX_LFN 255
/* Maximum sector size to be handled. */
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
/* DFS: network file system options */
/* #define RT_USING_DFS_NFS */
/* DFS: UFFS nand file system options */
#define RT_USING_DFS_UFFS
/* configuration for uffs, more to see dfs_uffs.h and uffs_config.h */
#define RT_CONFIG_UFFS_ECC_MODE UFFS_ECC_HW_AUTO
/* enable this ,you need provide a mark_badblock/check_block function */
/* #define RT_UFFS_USE_CHECK_MARK_FUNCITON */
/* DFS: JFFS2 nor flash file system options */
//#define RT_USING_DFS_JFFS2
/* DFS: windows share directory mounted to rt-thread/dfs */
/* only used in bsp/simulator */
#ifdef _WIN32
#define RT_USING_DFS_WINSHAREDIR
#endif
/* the max number of mounted file system */
#define DFS_FILESYSTEMS_MAX 4
/* the max number of opened files */
#define DFS_FD_MAX 4
/* SECTION: lwip, a lightweight TCP/IP protocol stack */
/* #define RT_USING_LWIP */
/* LwIP uses RT-Thread Memory Management */
#define RT_LWIP_USING_RT_MEM
/* Enable ICMP protocol*/
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
// <item description="LFN with static LFN working buffer">1</item>
// <item description="LFN with dynamic LFN working buffer on the stack">2</item>
// <item description="LFN with dynamic LFN working buffer on the heap">3</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 3
// <integer name="RT_DFS_ELM_CODE_PAGE" description="OEM code page" default="437">
#define RT_DFS_ELM_CODE_PAGE 437
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="256" />
#define RT_DFS_ELM_MAX_LFN 128
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
// #define RT_USING_DFS_YAFFS2
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
// #define RT_USING_DFS_UFFS
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
// #define RT_USING_DFS_DEVFS
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
// #define RT_USING_DFS_NFS
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
// </section>
// <section name="RT_USING_LWIP" description="lwip, a lightweight TCP/IP protocol stack" default="true" >
// #define RT_USING_LWIP
// <bool name="RT_LWIP_ICMP" description="Enable ICMP protocol" default="true" />
#define RT_LWIP_ICMP
/* Enable UDP protocol*/
// <bool name="RT_LWIP_IGMP" description="Enable IGMP protocol" default="false" />
// #define RT_LWIP_IGMP
// <bool name="RT_LWIP_UDP" description="Enable UDP protocol" default="true" />
#define RT_LWIP_UDP
/* Enable TCP protocol*/
// <bool name="RT_LWIP_TCP" description="Enable TCP protocol" default="true" />
#define RT_LWIP_TCP
/* Enable DNS */
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
#define RT_LWIP_DNS
/* the number of simultaneously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* Using DHCP */
/* #define RT_LWIP_DHCP */
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 126
#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 126
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 10
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* Ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 10
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
/* TCP sender buffer space */
#define RT_LWIP_TCP_SND_BUF 8192
/* TCP receive window. */
#define RT_LWIP_TCP_WND 8192
/* SECTION: RT-Thread/GUI */
/* #define RT_USING_RTGUI */
/* name length of RTGUI object */
#define RTGUI_NAME_MAX 12
/* support 16 weight font */
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
// #define RT_LWIP_SNMP
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
// #define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_TCPTHREAD_STACKSIZE" description="the thread stack size of TCP thread" default="4096" />
#define RT_LWIP_TCPTHREAD_STACKSIZE 4096
// <integer name="RT_LWIP_ETHTHREAD_PRIORITY" description="the thread priority of ethnetif thread" default="144" />
#define RT_LWIP_ETHTHREAD_PRIORITY 14
// <integer name="RT_LWIP_ETHTHREAD_MBOX_SIZE" description="the mail box size of ethnetif thread to wait for" default="8" />
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
// <integer name="RT_LWIP_ETHTHREAD_STACKSIZE" description="the stack size of ethnetif thread" default="512" />
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
// <ipaddr name="RT_LWIP_IPADDR" description="IP address of device" default="192.168.1.30" />
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 1
#define RT_LWIP_IPADDR3 30
// <ipaddr name="RT_LWIP_GWADDR" description="Gateway address of device" default="192.168.1.1" />
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 1
#define RT_LWIP_GWADDR3 1
// <ipaddr name="RT_LWIP_MSKADDR" description="Mask address of device" default="255.255.255.0" />
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
// </section>
// <section name="RT_USING_RTGUI" description="RT-Thread/GUI" default="true" >
// #define RT_USING_RTGUI
// <integer name="RTGUI_NAME_MAX" description="the name size of RT-Thread/GUI widget/objects" default="12" />
#define RTGUI_NAME_MAX 12
// <bool name="RTGUI_USING_SMALL_SIZE" description="use small size in RT-Thread/GUI" default="true" />
#define RTGUI_USING_SMALL_SIZE
// <bool name="RTGUI_USING_FONT16" description="support 16 weight font" default="true" />
#define RTGUI_USING_FONT16
/* support Chinese font */
// <bool name="RTGUI_USING_FONT12" description="support 12 weight font" default="true" />
// #define RTGUI_USING_FONT12
// <bool name="RTGUI_USING_FONTHZ" description="support Chinese font" default="true" />
#define RTGUI_USING_FONTHZ
/* use DFS as file interface */
// <integer name="RTGUI_DEFAULT_FONT_SIZE" description="default font size in RT-Thread/GUI" default="16" />
#define RTGUI_DEFAULT_FONT_SIZE 16
// <bool name="RTGUI_USING_DFS_FILERW" description="use RT-Thread/DFS as file interface" default="true" />
#define RTGUI_USING_DFS_FILERW
/* use font file as Chinese font */
/* #define RTGUI_USING_HZ_FILE */
/* use Chinese bitmap font */
// <bool name="RTGUI_USING_HZ_BMP" description="use Chinese font bitmap engine" default="true" />
#define RTGUI_USING_HZ_BMP
/* use small size in RTGUI */
#define RTGUI_USING_SMALL_SIZE
/* use mouse cursor */
/* #define RTGUI_USING_MOUSE_CURSOR */
/* default font size in RTGUI */
#define RTGUI_DEFAULT_FONT_SIZE 16
/* image support */
// <bool name="RTGUI_IMAGE_XPM" description="Using xpm image in RTGUI" default="true" />
#define RTGUI_IMAGE_XPM
// <bool name="RTGUI_IMAGE_JPEG" description="Using jpeg image in RTGUI" default="true" />
// #define RTGUI_IMAGE_JPEG
// <bool name="RTGUI_IMAGE_PNG" description="Using PNG image in RTGUI" default="true" />
// #define RTGUI_IMAGE_PNG
// <bool name="RTGUI_IMAGE_PNG" description="Using PNG image in RTGUI" default="true" />
#define RTGUI_IMAGE_BMP
/* #define RTGUI_IMAGE_JPEG */
/* #define RTGUI_IMAGE_PNG */
#define RTGUI_USING_NOTEBOOK_IMAGE
// <bool name="RTGUI_USING_HZ_FILE" description="use font file as Chinese font" default="false" />
#define RTGUI_USING_HZ_FILE
// <bool name="RTGUI_USING_MOUSE_CURSOR" description="use mouse cursor" default="false" />
#define RTGUI_USING_MOUSE_CURSOR
// </section>
// </RDTConfigurator>
#define RT_HEAP_SIZE (1024*1024*2)
#if defined(_MSC_VER)
#define NORESOURCE //RT_VESRION in winuser.h
#define _CRT_ERRNO_DEFINED //errno macro redefinition
#define _INC_WTIME_INL//dfs_elm.c time.h conflicts with wtime.inl
#define _INC_TIME_INL //dfs_elm.c time.h conflicts with wtime.inl
/* disable some warning in MSC */
#pragma warning(disable:4273) /* to ignore: warning C4273: inconsistent dll linkage */
#pragma warning(disable:4312) /* to ignore: warning C4312: 'type cast' : conversion from 'rt_uint32_t' to 'rt_uint32_t *' */
#pragma warning(disable:4311) /* to ignore: warning C4311: 'type cast' : pointer truncation from 'short *__w64 ' to 'long' */
#pragma warning(disable:4996) /* to ignore: warning C4996: The POSIX name for this item is deprecated. */
#pragma warning(disable:4267) /* to ignore: warning C4267: conversion from 'size_t' to 'rt_size_t', possible loss of data */
#pragma warning(disable:4244) /* to ignore: warning C4244: '=' : conversion from '__w64 int' to 'rt_size_t', possible loss of data */
#elif defined(__GNUC__)
#define RT_USING_NOLIBC
#if defined(__MINGW32__)
#define _NO_OLDNAMES /* to ignore: mode_t in sys/type.h */
#endif /* end of __MINGW32__ */
#endif /* end of _MSC_VER */
#ifdef _WIN32
#define RT_USING_DFS_WINSHAREDIR
#endif
#endif
......@@ -114,8 +114,8 @@ elif PLATFORM == 'cl':
CFLAGS += ' /MT'
LFLAGS += ''
CFLAGS += ' /ZI /Od /W 3 /WL '
LFLAGS += ' /SUBSYSTEM:CONSOLE /MACHINE:X86 '
CFLAGS += ' /Zi /Od /W 3 /WL '
LFLAGS += ' /SUBSYSTEM:CONSOLE /MACHINE:X86 /INCREMENTAL:NO'
CPATH = ''
LPATH = ''
......
from building import *
cwd = GetCurrentDir()
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
import rtconfig
from building import *
src = Glob('*.c') + Glob('*.cpp')
cwd = GetCurrentDir()
CPPPATH = [cwd]
group = DefineGroup('snake', src, depend = ['RT_USING_RTGUI'], CPPPATH=CPPPATH)
Return('group')
#include <string.h>
#include <stdlib.h>
#include <rtthread.h>
#include "snake.h"
#define ASSERT_RET(x, ret) \
do{ \
if (x) \
return ret; \
}while(0)
rt_list_t snake_head;
SNAKE_DIR prevdir, newdir;
static SNAKE_DIR dir_adjust(SNAKE_DIR dir)
{
if ((SNAKE_DIR_UP == prevdir && SNAKE_DIR_DOWN != dir)
|| (SNAKE_DIR_DOWN == prevdir && SNAKE_DIR_UP != dir)
|| (SNAKE_DIR_LEFT == prevdir && SNAKE_DIR_RIGHT != dir)
|| (SNAKE_DIR_RIGHT == prevdir && SNAKE_DIR_LEFT != dir)
)
{
newdir = dir;
}
else
{
rt_kprintf("dirction change error\n\r");
}
return newdir;
}
static void across_XY(point_t *node, const map_t *map)
{
RT_ASSERT(node != RT_NULL && map != RT_NULL);
// 如果长度超出当前边框则可以穿越墙到对面
node->x = (node->x + map->width) % map->width;
node->y = (node->y + map->height) % map->height;
}
static SYS_STE node_update(snake_t *tail, const point_t *node, map_t *map)
{
SYS_STE ret;
point_t *pos;
RT_ASSERT(tail != RT_NULL && node != RT_NULL && map != RT_NULL);
pos = map->snake_flush;
pos[0].x = pos[0].y = -1;
pos[1].x = pos[1].y = -1;
ret = (SYS_STE)map->range[node->y * map->width + node->x];
if (FOOD == map->range[node->y * map->width + node->x])
{
// 吃一个食物增加一个节点
snake_t *new = (snake_t *)rt_malloc(sizeof(snake_t));
if (!new)
return NORMAL;
pos[0] = *node;
new->body = *node;
rt_list_insert_after(&snake_head, &new->list);
}
else if (NORMAL == map->range[node->y * map->width + node->x])
{
// 将尾巴修改后拿到头部,其他不变
rt_list_remove(&tail->list);
map->range[tail->body.y * map->width + tail->body.x] = NORMAL;
pos[0] = *node;
pos[1] = tail->body;
tail->body = *node;
rt_list_insert_after(&snake_head, &tail->list);
}
map->range[node->y * map->width + node->x] = OVER;
if (ret != OVER)
prevdir = newdir;
return ret;
}
map_t *map_init(rt_uint32_t width, rt_uint32_t heigth)
{
map_t *map = rt_malloc(sizeof(map_t));
if (map != RT_NULL)
{
map->range = rt_malloc(heigth * width);
if (!map->range)
{
rt_free(map);
map = RT_NULL;
}
else
{
map->width = width;
map->height = heigth;
memset(map->range, NORMAL, heigth * width);
}
}
return map;
}
// 构造一条指定长度的蛇在指定点
rt_bool_t snake_init(const point_t *start, const int length, const SNAKE_DIR dir, map_t *map)
{
rt_int32_t i;
rt_int32_t inc_x, inc_y;
point_t old = *start;
ASSERT_RET(!map || !start, RT_FALSE);
rt_list_init(&snake_head);
if (dir == SNAKE_DIR_UP || dir == SNAKE_DIR_DOWN)
{
if (map->height <= length)
return RT_FALSE;
inc_x = 0;
inc_y = dir == SNAKE_DIR_DOWN ? 1 : -1; // 反向延长身子,头部在指定位置
old.y -= inc_y;
}
else
{
if (map->width <= length)
return RT_FALSE;
inc_y = 0;
inc_x = dir == SNAKE_DIR_RIGHT ? -1 : 1;
old.x -= inc_x;
}
for (i = 0; i < length; i++)
{
snake_t *new = (snake_t *)rt_malloc(sizeof(snake_t));
if (!new)
return RT_FALSE;
new->body.y = inc_y + old.y;
new->body.x = inc_x + old.x;
// 如果长度超出当前边框则可以穿越墙到对面
across_XY(&new->body, map);
map->range[new->body.y * map->width + new->body.x] = OVER;
old = new->body;
rt_list_insert_before(&snake_head, &new->list);
}
prevdir = dir;
return RT_TRUE;
}
// 构造出食物
rt_bool_t food_init(map_t *map, rt_uint32_t max_num)
{
point_t food;
#ifndef FOOD_TIMEOUT
#define FOOD_TIMEOUT 10
#endif
rt_uint32_t timeout, num;
ASSERT_RET(!map, RT_FALSE);
num = 0;
timeout = rt_tick_get();
srand(rand());
map->food_flush[0].x = map->food_flush[0].y = -1;
do
{
food.x = rand() % map->width;
food.y = rand() % map->height;
if (map->range[food.y * map->width + food.x] == NORMAL)
{
map->food_flush[0] = food;
map->range[food.y * map->width + food.x] = FOOD;
num++;
}
}
while (num < max_num && rt_tick_get() - timeout < FOOD_TIMEOUT);
return num;
}
void map_deinit(map_t *map)
{
if (map)
{
if (map->range)
{
rt_free(map->range);
map->range = RT_NULL;
}
rt_free(map);
}
}
void snake_deinit(void)
{
snake_t *node;
while (!rt_list_isempty(&snake_head))
{
node = rt_list_entry(snake_head.prev, snake_t, list);
rt_list_remove(&node->list);
rt_free(node);
}
}
void food_deinit(void)
{
}
SYS_STE snake_step(SNAKE_DIR dir, map_t *map)
{
snake_t *tail, *head;
point_t node;
ASSERT_RET(!map, RT_FALSE);
dir = dir_adjust(dir);
// 取出头尾两个节点,其他节点不需要改变
tail = rt_list_entry(snake_head.prev, snake_t, list);
head = rt_list_entry(snake_head.next, snake_t, list);
node = head->body;
// 构造一个新的蛇头坐标
switch (dir)
{
case SNAKE_DIR_UP:
case SNAKE_DIR_DOWN:
node.y = head->body.y + (dir == SNAKE_DIR_DOWN ? -1 : 1);
break;
case SNAKE_DIR_LEFT:
case SNAKE_DIR_RIGHT:
node.x = head->body.x + (dir == SNAKE_DIR_RIGHT ? 1 : -1);
break;
}
across_XY(&node, map);
return node_update(tail, &node, map);
}
rt_bool_t snake_restart(const point_t *start, const int length, const SNAKE_DIR dir, map_t *map)
{
ASSERT_RET(!map || !start, RT_FALSE);
snake_deinit();
memset(map->range, NORMAL, map->width * map->height);
return snake_init(start, length, dir, map);
}
#ifndef _SNAKE_H_
#define _SNAKE_H_
#include <rtthread.h>
#define snake_length_max 20 //最大蛇长
#define snake_length_init 3 //初始化蛇长
#define snake_room_size_hight 8 //房子高 0-255 建议>8
#define snake_room_size_widht 8 //房子宽 0-255 建议>8
#define snake_init_pointx 1
#define snake_init_pointy 2
typedef struct
{
rt_int32_t x, y;
} point_t;
typedef struct
{
rt_int32_t width; // max x
rt_int32_t height; // max y
rt_uint8_t *range; // map, map->range[y * map->width + x]
point_t snake_flush[2];
point_t food_flush[1];
} map_t;
typedef enum
{
SNAKE_DIR_UP,
SNAKE_DIR_DOWN,
SNAKE_DIR_LEFT,
SNAKE_DIR_RIGHT
} SNAKE_DIR;
typedef enum
{
FOOD, // 吃到水果
OVER, // 咬到自身
NORMAL // 正常行动
} SYS_STE;
typedef struct
{
point_t body;
rt_list_t list;
} snake_t;
// 构造一个地图
map_t *map_init(rt_uint32_t width, rt_uint32_t heigth);
// 构造一条指定长度的蛇在指定点
rt_bool_t snake_init(const point_t *start, const int length, const SNAKE_DIR dir, map_t *map);
// 构造出食物
rt_bool_t food_init(map_t *map, rt_uint32_t max_num);
void map_deinit(map_t *map);
void snake_deinit(void);
void food_deinit(void);
SYS_STE snake_step(SNAKE_DIR dir, map_t *map);
rt_bool_t snake_restart(const point_t *start, const int length, const SNAKE_DIR dir, map_t *map);
#endif
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import os
import sys
import SCons.cpp
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
if os.getenv('RTT_RTGUI'):
RTT_RTGUI = os.getenv('RTT_RTGUI')
else:
# set the rtgui root directory by hand
# empty string means use the RTGUI in svn
RTT_RTGUI = os.path.normpath(r'F:\Project\git\rt-gui\components\rtgui')
# RTT_RTGUI =''
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
Export('RTT_ROOT')
# add target option
AddOption('--app',
dest='app',
nargs=1, type='string',
action='store',
metavar='DIR',
help='installation prefix')
# add target option
AddOption('--type',
dest='type',
nargs=1, type='string',
action='store',
metavar='DIR',
help='installation prefix')
app = GetOption('app')
env = Environment(TARGET_ARCH='x86')
CPPPATH = [
RTT_ROOT + '/include',
RTT_ROOT + '/bsp/' + rtconfig.BSP,
RTT_ROOT + '/components/finsh',
RTT_ROOT + '/components/libdl',
RTT_ROOT + '/components/external/ftk/ftk/src/os/rt-thread',
RTT_ROOT + '/components/external/ftk/ftk/src/demos',
RTT_ROOT + '/components/external/ftk/ftk/apps/common',
RTT_ROOT + '/components/external/ftk/ftk/src',
RTT_ROOT + '/components/dfs',
RTT_ROOT + '/components/dfs/include',
RTT_ROOT + '/components/libc/newlib',
RTT_ROOT + '/components/external/cairo/cairo-1.10.2/src',
RTT_ROOT + '/components/external/cairo/'
]
if RTT_RTGUI:
RTGUI_ROOT = RTT_RTGUI
else:
RTGUI_ROOT = RTT_ROOT + '/components/rtgui'
RTGUI_PATH = [
RTGUI_ROOT + '/include',
RTGUI_ROOT + '/common',
RTGUI_ROOT + '/server',
RTGUI_ROOT + '/widgets',
]
CPPPATH += RTGUI_PATH
env.Append(CCFLAGS=rtconfig.CFLAGS)
env.Append(LINKFLAGS=rtconfig.LFLAGS)
env.Append(CPPPATH=CPPPATH)
env.Append(LIBS='rtthread', LIBPATH='../')
env.Append(CPPDEFINES=['RTT_IN_MODULE'])
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
PrepareModuleBuilding(env, RTT_ROOT)
#dir = app + '/build/' + rtconfig.BSP
dir = app + '/build/'
objs = SConscript(app + '/Sconscript', variant_dir=dir, duplicate=0)
TARGET = dir + '/' + app + '.' + rtconfig.TARGET_EXT
# build program
#env.Program(TARGET, objs)
env.SharedLibrary(TARGET, objs)
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