- 24 2月, 2021 1 次提交
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由 Amit Kumar Mahapatra 提交于
When spi-nor and zynqmp qspi driver are built as modules, call trace was observed while loading the modules. With this fix call trace issue is resolved. Signed-off-by: NAmit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
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- 16 2月, 2021 2 次提交
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由 Saeed Nowshadi 提交于
Recalling NVM data into RAM during probe() initiates a re-calibration of the clock. If the clock is already in-use, the recall operation can cause a glitch on the frequency out. At power on, the factory data are loaded from NVM into RAM by default. If the clock frequency has been changed since power on, the recall operation can be used to re-initialize the clock to factory setting. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NSaeed Nowshadi <saeed.nowshadi@xilinx.com> Link: https://lore.kernel.org/r/1612496104-3437-3-git-send-email-saeed.nowshadi@xilinx.comSigned-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Saeed Nowshadi 提交于
Add an optional property so the driver can skip calling the NVM->RAM recall operation during probe(). Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NSaeed Nowshadi <saeed.nowshadi@xilinx.com> Link: https://lore.kernel.org/r/1612496104-3437-2-git-send-email-saeed.nowshadi@xilinx.comAcked-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 05 2月, 2021 1 次提交
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由 Tejus Siddagangaiah 提交于
In transaction mode, the userspace library stores the io operations in a buffer. AIE_TRANSACTION_IOCTL receives this command buffer for exectution. The io operations supported are write, mask write, block write and block set. Signed-off-by: NTejus Siddagangaiah <tejus.siddagangaiah@xilinx.com> Acked-by: NWendy Liang <wendy.liang@xilinx.com>
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- 26 1月, 2021 1 次提交
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由 Wendy Liang 提交于
Remove repeated words in comments. Signed-off-by: NWendy Liang <wendy.liang@xilinx.com>
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- 25 1月, 2021 1 次提交
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由 Mike Looijmans 提交于
The Si5341 and Si5340 have multiple input clock options. So far, the driver only supported the XTAL input, this adds support for the three external clock inputs as well. If the clock chip isn't programmed at boot, the driver will default to the XTAL input as before. If there is no "xtal" clock input available, it will pick the first connected input (e.g. "in0") as the input clock for the PLL. One can use clock-assigned-parents to select a particular clock as input. Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl> Link: https://lkml.kernel.org/r/20200107075340.14528-1-mike.looijmans@topic.nlSigned-off-by: NStephen Boyd <sboyd@kernel.org> State: upstream (69275187)
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- 21 1月, 2021 1 次提交
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由 Sai Krishna Potthuri 提交于
'of_property_read_variable_u32_array' function returns number of elements read on success. This patch updates the condition check in the driver to overwrite the tap values from DT if exist. Signed-off-by: NSai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
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- 20 1月, 2021 1 次提交
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由 Dirk Mueller 提交于
gcc 10 will default to -fno-common, which causes this error at link time: (.text+0x0): multiple definition of `yylloc'; dtc-lexer.lex.o (symbol from plugin):(.text+0x0): first defined here This is because both dtc-lexer as well as dtc-parser define the same global symbol yyloc. Before with -fcommon those were merged into one defintion. The proper solution would be to to mark this as "extern", however that leads to: dtc-lexer.l:26:16: error: redundant redeclaration of 'yylloc' [-Werror=redundant-decls] 26 | extern YYLTYPE yylloc; | ^~~~~~ In file included from dtc-lexer.l:24: dtc-parser.tab.h:127:16: note: previous declaration of 'yylloc' was here 127 | extern YYLTYPE yylloc; | ^~~~~~ cc1: all warnings being treated as errors which means the declaration is completely redundant and can just be dropped. Signed-off-by: NDirk Mueller <dmueller@suse.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> [robh: cherry-pick from upstream] Cc: stable@vger.kernel.org Signed-off-by: NRob Herring <robh@kernel.org> State: upstream (e33a814e)
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- 13 1月, 2021 3 次提交
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由 Raviteja Narayanam 提交于
Enable the required configuration for ina260 driver Signed-off-by: NRaviteja Narayanam <raviteja.narayanam@xilinx.com>
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由 Raviteja Narayanam 提交于
This driver supports software buffer mode and raw reads of ina260 iio channels. In software buffer mode, a kthread will capture the active scan_elements periodically using a delay. This can produce a stream of up to 3 channels plus a 64 bits timestamp based on the scan_elements. Signed-off-by: NRaviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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由 Raviteja Narayanam 提交于
Add a binding for Texas Instruments INA260 power monitor device. Signed-off-by: NRaviteja Narayanam <raviteja.narayanam@xilinx.com> Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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- 07 1月, 2021 1 次提交
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由 Ronak Shah 提交于
This patch enables the IDT8T49N24x clock driver required for ZCU104. Signed-off-by: NRonak Shah <ronak.shah@xilinx.com>
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- 06 1月, 2021 1 次提交
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由 Hyun Kwon 提交于
The names conflict with kernel functions. Rename with the prefix xdma_. While at it, remove a unnecessary forward declaration. Signed-off-by: NHyun Kwon <hyun.kwon@xilinx.com>
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- 05 1月, 2021 1 次提交
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由 Hyun Kwon 提交于
The flag is no longer available, and it was no-op anyway. Signed-off-by: NHyun Kwon <hyun.kwon@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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- 17 12月, 2020 11 次提交
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由 Shravya Kumbham 提交于
Typecast the flags variable with (enum dma_ctrl_flags) in zynqmp_dma_prep_memcpy function to fix the coverity warning. Addresses-Coverity: Event mixed_enum_type. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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由 Shravya Kumbham 提交于
Add condition to check the return value of dma_async_device_register and pm_runtime_get_sync functions. Addresses-Coverity: Event check_return. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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由 Shravya Kumbham 提交于
In zynqmp_dma_alloc_chan_resources function there is a potential overflow in the below expression. desc->src_p = chan->desc_pool_p + (i * ZYNQMP_DMA_DESC_SIZE(chan*2); The macro ZYNQMP_DMA_DESC_SIZE and variable i are 32-bit. Though this overflow condition is not observed but it is a potential problem in the case of 32-bit multiplication. Hence fix it by using typecast. Addresses-Coverity: Event overflow_before_widen. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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由 Shravya Kumbham 提交于
In zynqmp_dma_alloc/free_chan_resources functions there is a potential overflow in the below expressions. dma_alloc_coherent(chan->dev, (2 * chan->desc_size * ZYNQMP_DMA_NUM_DESCS), &chan->desc_pool_p, GFP_KERNEL); dma_free_coherent(chan->dev,(2 * ZYNQMP_DMA_DESC_SIZE(chan) * ZYNQMP_DMA_NUM_DESCS), chan->desc_pool_v, chan->desc_pool_p); The arguments desc_size and ZYNQMP_DMA_NUM_DESCS are 32 bit. Though this overflow condition is not observed but it is a potential problem in the case of 32-bit multiplication. Hence fix it by using typecast. Addresses-Coverity: Event overflow_before_widen. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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由 Wendy Liang 提交于
This patch is to release the AI engine device lock in all returns in the interrupt routine. Signed-off-by: NWendy Liang <wendy.liang@xilinx.com> Reviewed-by: NHyun Kwon <hyun.kwon@xilinx.com>
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由 Wendy Liang 提交于
Add ZYNQMP_FIRMWARE config dependency, as the the AI engine driver uses ZynqMP firmware eemi APIs. Signed-off-by: NWendy Liang <wendy.liang@xilinx.com> Reviewed-by: NHyun Kwon <hyun.kwon@xilinx.com>
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由 Harini Katakam 提交于
Remove GT PLL mask bit access on 2020.2 as it is no longer required on 2020.2 GT IP and corresponding MRMAC design. This register is not available anymore and will lead to an SError if accessed. Fix the same. Signed-off-by: NHarini Katakam <harini.katakam@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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由 Shravya Kumbham 提交于
Removed unused variable align, as it is declared but never referenced in the driver. Addresses-coverity: Event declared_but_not_referenced. Fixes: 41a6e9ef ("net: emaclite: Remove custom BUFFER_ALIGN macro") Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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由 Shravya Kumbham 提交于
Typecast the i variable with (enum pll_frequencies) in xpsgtr_get_ssc function to fix the coverity warning. Addresses-Coverity: Event mixed_enum_type. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com>
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由 Shravya Kumbham 提交于
The return value of xpsgtr_reset_release and xpsgtr_reset_assert functions are stored in the ret variable but the value is overwritten before it is used. So, check the return value of the ret variable. Addresses-Coverity: Event value_overwrite. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com>
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由 Shravya Kumbham 提交于
In xemaclite_open() function we are setting the max speed of emaclite to 100Mb using phy_set_max_speed() function so, there is no need to write the advertising registers to stop giga-bit speed and the phy_start() function starts the auto-negotiation so, there is no need to handle it separately using advertising registers. Remove the phy_read and phy_write of advertising registers in xemaclite_open() function. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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- 03 12月, 2020 1 次提交
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由 Shubhrajyoti Datta 提交于
The control register is a readonly register that's why reading it doesn't make any sense. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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- 01 12月, 2020 1 次提交
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由 Manish Narani 提交于
This patch reverts the commit 97e81851. Revert the pinctrl support from the SDHCI Arasan driver as the pinctrl configuration is already handled by core driver via pinctrl_bind_pins() API. Signed-off-by: NManish Narani <manish.narani@xilinx.com> Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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- 30 11月, 2020 1 次提交
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由 Shravya Kumbham 提交于
Typecast the flags and flg variables with (enum dma_ctrl_flags) in pl330_prep_dma_cyclic, pl330_prep_dma_memcpy and pl330_prep_slave_sg functions to fix the coverity warning. Addresses-Coverity: Event mixed_enum_type. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com> Reviewed-by: NRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
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- 24 11月, 2020 6 次提交
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由 Shubhrajyoti Datta 提交于
Add a check for clk_enable. Addresses-Coverity: Event check_return. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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由 Shubhrajyoti Datta 提交于
Check for the return type of the get_sync. Addresses-Coverity: Event check_return. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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由 Shubhrajyoti Datta 提交于
Check the clk_enable return value. Addresses-Coverity: Event check_return. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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由 Shubhrajyoti Datta 提交于
Add a check for the runtime get_sync calls. Addresses-Coverity: Event check_return. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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由 Shubhrajyoti Datta 提交于
The timeout cannot be negative make it unsigned. Also the same for the trigger level. Addresses-Coverity: Event incompatible_param. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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由 Shubhrajyoti Datta 提交于
Check for the clock enable return type. Addresses-Coverity: Event check_return. Signed-off-by: NShubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
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- 23 11月, 2020 6 次提交
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由 Michal Simek 提交于
XDP contains several sensors that's why enable drivers for it. Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
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由 Piyush Mehta 提交于
Add spurious hibernation events handling for hibernation state: - Corrected the __dwc3_gadget_ep_enable function action argument for endpoint restore or save state. - When software end active transfer, software must set the DEPCMD_CMDIOC bit so that an Endpoint Command Complete event is generated after the transfer ends. - Cleared endpoint flags when endpoint transfer stop or end. - Modified delay to validate wake-up signal is real or not. Signed-off-by: NPiyush Mehta <piyush.mehta@xilinx.com>
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由 Shravya Kumbham 提交于
Typecast the fls(width -1) with (enum dmaengine_alignment) in xilinx_dma_chan_probe function to fix the coverity warning. Addresses-Coverity: Event mixed_enum_type. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com>
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由 Shravya Kumbham 提交于
Modify the nr_channels variable type from int to u32 to fix the incompatible parameter coverity warning. Addresses-Coverity: Event incompatible_param. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com>
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由 Shravya Kumbham 提交于
Add condition to check the return value of dma_async_device_register function. Addresses-Coverity: Event check_return. Signed-off-by: NShravya Kumbham <shravya.kumbham@xilinx.com>
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由 Zhang Xiaoxu 提交于
If create the inject sysfs file failed, we should return the error, rather than 0. Otherwise, there maybe error pointer access. Signed-off-by: NZhang Xiaoxu <zhangxiaoxu5@huawei.com>
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