add gd32E507 iar project for tos

add gd32E507  iar project for tos

board/GigaDevice_GD32E507Z_EVAL/BSP/Inc/gd32e507z_eval.h

+/*!
+    \file    gd32e507z_eval.h
+    \brief   definitions for GD32E507Z_EVAL's leds, keys and COM ports hardware resources
+
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef GD32E507Z_EVAL_H
+#define GD32E507Z_EVAL_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "gd32e50x.h"
+     
+/* exported types */
+typedef enum 
+{
+    LED1 = 0,
+    LED2 = 1,
+    LED3 = 2,
+    LED4 = 3
+} led_typedef_enum;
+
+typedef enum 
+{
+    KEY_A = 0,
+    KEY_B = 1,
+    KEY_C = 2,
+    KEY_D = 3,
+    KEY_CET = 4
+} key_typedef_enum;
+
+typedef enum 
+{
+    KEY_MODE_GPIO = 0,
+    KEY_MODE_EXTI = 1
+} keymode_typedef_enum;
+
+/* eval board low layer led */
+#define LEDn                             4U
+
+#define LED1_PIN                         GPIO_PIN_10
+#define LED1_GPIO_PORT                   GPIOG
+#define LED1_GPIO_CLK                    RCU_GPIOG
+  
+#define LED2_PIN                         GPIO_PIN_11
+#define LED2_GPIO_PORT                   GPIOG
+#define LED2_GPIO_CLK                    RCU_GPIOG
+  
+#define LED3_PIN                         GPIO_PIN_12
+#define LED3_GPIO_PORT                   GPIOG
+#define LED3_GPIO_CLK                    RCU_GPIOG
+  
+#define LED4_PIN                         GPIO_PIN_13
+#define LED4_GPIO_PORT                   GPIOG
+#define LED4_GPIO_CLK                    RCU_GPIOG
+
+#define COMn                             1U
+
+#define EVAL_COM0                        USART0
+#define EVAL_COM0_CLK                    RCU_USART0
+#define EVAL_COM0_TX_PIN                 GPIO_PIN_9
+#define EVAL_COM0_RX_PIN                 GPIO_PIN_10
+#define EVAL_COM0_GPIO_PORT              GPIOA
+#define EVAL_COM0_GPIO_CLK               RCU_GPIOA
+
+#define KEYn                             5U
+
+/* wakeup push-button */
+#define KEY_A_PIN                        GPIO_PIN_0
+#define KEY_A_GPIO_PORT                  GPIOA
+#define KEY_A_GPIO_CLK                   RCU_GPIOA
+#define KEY_A_EXTI_LINE                  EXTI_0
+#define KEY_A_EXTI_PORT_SOURCE           GPIO_PORT_SOURCE_GPIOA
+#define KEY_A_EXTI_PIN_SOURCE            GPIO_PIN_SOURCE_0
+#define KEY_A_EXTI_IRQn                  EXTI0_IRQn
+
+/* tamper push-button */
+#define KEY_B_PIN                        GPIO_PIN_13
+#define KEY_B_GPIO_PORT                  GPIOC
+#define KEY_B_GPIO_CLK                   RCU_GPIOC
+#define KEY_B_EXTI_LINE                  EXTI_13
+#define KEY_B_EXTI_PORT_SOURCE           GPIO_PORT_SOURCE_GPIOC
+#define KEY_B_EXTI_PIN_SOURCE            GPIO_PIN_SOURCE_13
+#define KEY_B_EXTI_IRQn                  EXTI10_15_IRQn
+
+/* user push-button */
+#define KEY_C_PIN                        GPIO_PIN_13
+#define KEY_C_GPIO_PORT                  GPIOF
+#define KEY_C_GPIO_CLK                   RCU_GPIOF
+#define KEY_C_EXTI_LINE                  EXTI_13
+#define KEY_C_EXTI_PORT_SOURCE           GPIO_PORT_SOURCE_GPIOF
+#define KEY_C_EXTI_PIN_SOURCE            GPIO_PIN_SOURCE_13
+#define KEY_C_EXTI_IRQn                  EXTI10_15_IRQn
+
+/* extension push-button */
+#define KEY_D_PIN                        GPIO_PIN_14
+#define KEY_D_GPIO_PORT                  GPIOF
+#define KEY_D_GPIO_CLK                   RCU_GPIOF
+#define KEY_D_EXTI_LINE                  EXTI_14
+#define KEY_D_EXTI_PORT_SOURCE           GPIO_PORT_SOURCE_GPIOF
+#define KEY_D_EXTI_PIN_SOURCE            GPIO_PIN_SOURCE_14
+#define KEY_D_EXTI_IRQn                  EXTI10_15_IRQn
+
+/* extension push-button */
+#define KEY_CET_PIN                      GPIO_PIN_15
+#define KEY_CET_GPIO_PORT                GPIOF
+#define KEY_CET_GPIO_CLK                 RCU_GPIOF
+#define KEY_CET_EXTI_LINE                EXTI_15
+#define KEY_CET_EXTI_PORT_SOURCE         GPIO_PORT_SOURCE_GPIOF
+#define KEY_CET_EXTI_PIN_SOURCE          GPIO_PIN_SOURCE_15
+#define KEY_CET_EXTI_IRQn                EXTI10_15_IRQn
+
+/* function declarations */
+/* configure led GPIO */
+void gd_eval_led_init(led_typedef_enum lednum);
+/* turn on selected led */
+void gd_eval_led_on(led_typedef_enum lednum);
+/* turn off selected led */
+void gd_eval_led_off(led_typedef_enum lednum);
+/* toggle the selected led */
+void gd_eval_led_toggle(led_typedef_enum lednum);
+/* configure key */
+void gd_eval_key_init(key_typedef_enum key_num, keymode_typedef_enum key_mode);
+/* return the selected key state */
+uint8_t gd_eval_key_state_get(key_typedef_enum key);
+/* configure COM port */
+void gd_eval_com_init(uint32_t com);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* GD32E507Z_EVAL_H */
+

board/GigaDevice_GD32E507Z_EVAL/BSP/Inc/gd32e507z_lcd_eval.h

+/*!
+    \file    gd32e507z_lcd_eval.h
+    \brief   LCD driver header file
+
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef GD32E507Z_LCD_EVAL_H
+#define GD32E507Z_LCD_EVAL_H
+
+#include "gd32e50x.h"
+
+#define BANK0_LCD_D         ((uint32_t)0x65000000)    /*!< LCD data address */
+#define BANK0_LCD_C         ((uint32_t)0x64000000)    /*!< LCD register address */
+
+/* LCD registers */
+#define R0                  0x00
+#define R1                  0x01
+#define R2                  0x02
+#define R3                  0x03
+#define R4                  0x04
+#define R5                  0x05
+#define R6                  0x06
+#define R7                  0x07
+#define R8                  0x08
+#define R9                  0x09
+#define R10                 0x0A
+#define R11                 0x0B
+#define R12                 0x0C
+#define R13                 0x0D
+#define R14                 0x0E
+#define R15                 0x0F
+#define R16                 0x10
+#define R17                 0x11
+#define R18                 0x12
+#define R19                 0x13
+#define R20                 0x14
+#define R21                 0x15
+#define R22                 0x16
+#define R23                 0x17
+#define R24                 0x18
+#define R25                 0x19
+#define R26                 0x1A
+#define R27                 0x1B
+#define R28                 0x1C
+#define R29                 0x1D
+#define R30                 0x1E
+#define R31                 0x1F
+#define R32                 0x20
+#define R33                 0x21
+#define R34                 0x22
+#define R35                 0x23
+#define R36                 0x24
+#define R37                 0x25
+#define R40                 0x28
+#define R41                 0x29
+#define R43                 0x2B
+#define R45                 0x2D
+#define R48                 0x30
+#define R49                 0x31
+#define R50                 0x32
+#define R51                 0x33
+#define R52                 0x34
+#define R53                 0x35
+#define R54                 0x36
+#define R55                 0x37
+#define R56                 0x38
+#define R57                 0x39
+#define R58                 0x3A
+#define R59                 0x3B
+#define R60                 0x3C
+#define R61                 0x3D
+#define R62                 0x3E
+#define R63                 0x3F
+#define R64                 0x40
+#define R65                 0x41
+#define R66                 0x42
+#define R67                 0x43
+#define R68                 0x44
+#define R69                 0x45
+#define R70                 0x46
+#define R71                 0x47
+#define R72                 0x48
+#define R73                 0x49
+#define R74                 0x4A
+#define R75                 0x4B
+#define R76                 0x4C
+#define R77                 0x4D
+#define R78                 0x4E
+#define R79                 0x4F
+#define R80                 0x50
+#define R81                 0x51
+#define R82                 0x52
+#define R83                 0x53
+#define R96                 0x60
+#define R97                 0x61
+#define R106                0x6A
+#define R118                0x76
+#define R128                0x80
+#define R129                0x81
+#define R130                0x82
+#define R131                0x83
+#define R132                0x84
+#define R133                0x85
+#define R134                0x86
+#define R135                0x87
+#define R136                0x88
+#define R137                0x89
+#define R139                0x8B
+#define R140                0x8C
+#define R141                0x8D
+#define R143                0x8F
+#define R144                0x90
+#define R145                0x91
+#define R146                0x92
+#define R147                0x93
+#define R148                0x94
+#define R149                0x95
+#define R150                0x96
+#define R151                0x97
+#define R152                0x98
+#define R153                0x99
+#define R154                0x9A
+#define R157                0x9D
+#define R192                0xC0
+#define R193                0xC1
+#define R229                0xE5
+
+/* LCD color */
+#define LCD_COLOR_WHITE     0xFFFF
+#define LCD_COLOR_BLACK     0x0000
+#define LCD_COLOR_GREY      0xF7DE
+#define LCD_COLOR_BLUE      0x001F
+#define LCD_COLOR_BLUE2     0x051F
+#define LCD_COLOR_RED       0xF800
+#define LCD_COLOR_MAGENTA   0xF81F
+#define LCD_COLOR_GREEN     0x07E0
+#define LCD_COLOR_CYAN      0x7FFF
+#define LCD_COLOR_YELLOW    0xFFE0
+
+/* definitions of LCD lines */
+#define LCD_LINE_0          0
+#define LCD_LINE_1          24
+#define LCD_LINE_2          48
+#define LCD_LINE_3          72
+#define LCD_LINE_4          96
+#define LCD_LINE_5          120
+#define LCD_LINE_6          144
+#define LCD_LINE_7          168
+#define LCD_LINE_8          192
+#define LCD_LINE_9          216
+
+#define CHAR_FONT_8_16                    ((uint16_t)0x0000U) /*!< the font of char is 8X16 */
+#define CHAR_FONT_16_24                   ((uint16_t)0x0001U) /*!< the font of char is 16X24 */
+
+#define CHAR_DIRECTION_HORIZONTAL         ((uint16_t)0x0000U) /*!< character display direction is horizontal */
+#define CHAR_DIRECTION_VERTICAL           ((uint16_t)0x0001U) /*!< character display direction is vertical */
+
+#define LCD_PIXEL_WIDTH          ((uint16_t)320)
+#define LCD_PIXEL_HEIGHT         ((uint16_t)240)
+
+/* char format struct definitions */
+typedef struct
+{   
+    uint16_t font;                                            /*!< the type of font */
+    uint16_t direction;                                       /*!< the direction of char */
+    uint16_t char_color;                                      /*!< the color of char */
+    uint16_t bk_color;                                        /*!< the color of backgroud */
+}char_format_struct;
+
+/* lcd peripheral initialize */
+void exmc_lcd_init(void);
+/* initialize the LCD */
+void lcd_init(void);
+/* write data to the selected LCD register */
+void lcd_register_write(uint16_t register_id,uint16_t value);
+/* read the value of LCD register */
+uint16_t lcd_register_read(uint8_t register_id);
+/* write command to LCD register */
+void lcd_command_write (uint16_t value);
+/* prepare to write to the LCD GRAM */
+void lcd_gram_write_prepare(void);
+/* write RGB code to the LCD GRAM register */
+void lcd_gram_write(uint16_t rgb_code);
+/* read data from GRAM */
+uint16_t lcd_gram_read(void);
+/* set the cursor of LCD */
+void lcd_cursor_set(uint16_t x,uint16_t y);
+/* clear the LCD screen to the specified color */
+void lcd_clear(uint16_t Color);
+/* set the point according to the specified position and color */
+void lcd_point_set(uint16_t x,uint16_t y,uint16_t point);
+/* get the point according to the specified position */
+uint16_t lcd_point_get(uint16_t x,uint16_t y);
+/* set window area */
+void lcd_windows_set(uint16_t start_x,uint16_t start_y,uint16_t end_x,uint16_t end_y);
+/* draw a horizontal line on LCD screen */
+void lcd_hline_draw(uint16_t x,uint16_t start_y,uint16_t end_y,uint16_t color,uint16_t width);
+/* draw a vertical line on LCD screen */
+void lcd_vline_draw(uint16_t start_x,uint16_t end_x,uint16_t y,uint16_t color,uint16_t width);
+/* draw a rectangle according to the specified position and color */
+void lcd_rectangle_draw(uint16_t start_x,uint16_t start_y,uint16_t end_x,uint16_t end_y,uint16_t point);
+/* fill the specified color to a rectangle */
+void lcd_rectangle_fill(uint16_t start_x,uint16_t start_y,uint16_t end_x,uint16_t end_y,uint16_t color);
+/* draw a picture on LCD screen according to the specified position */
+void lcd_picture_draw(uint16_t start_x,uint16_t start_y,uint16_t end_x,uint16_t end_y,uint16_t *pic);
+/* display a char on LCD screen according to the specified position */
+void lcd_char_display(uint16_t x,uint16_t y,uint8_t c,char_format_struct c_format);
+
+#endif /* GD32E507Z_LCD_EVAL_H */

board/GigaDevice_GD32E507Z_EVAL/BSP/Inc/gd32e50x_it.h

+/*!
+    \file    gd32e50x_it.h
+    \brief   the header file of the ISR
+    
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef GD32E50X_IT_H
+#define GD32E50X_IT_H
+
+#include "gd32e50x.h"
+
+/* function declarations */
+/* this function handles NMI exception */
+void NMI_Handler(void);
+/* this function handles HardFault exception */
+void HardFault_Handler(void);
+/* this function handles MemManage exception */
+void MemManage_Handler(void);
+/* this function handles BusFault exception */
+void BusFault_Handler(void);
+/* this function handles UsageFault exception */
+void UsageFault_Handler(void);
+/* this function handles SVC exception */
+void SVC_Handler(void);
+/* this function handles DebugMon exception */
+void DebugMon_Handler(void);
+/* this function handles PendSV exception */
+void PendSV_Handler(void);
+/* this function handles SysTick exception */
+void SysTick_Handler(void);
+
+#endif /* GD32E50X_IT_H */

board/GigaDevice_GD32E507Z_EVAL/BSP/Inc/gd32e50x_libopt.h

+/*!
+    \file    gd32e50x_libopt.h
+    \brief   library optional for gd32e50x
+
+    \version 2020-03-10, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef GD32E50X_LIBOPT_H
+#define GD32E50X_LIBOPT_H
+
+#ifndef GD32EPRT
+
+#include "gd32e50x_adc.h"
+#include "gd32e50x_bkp.h"
+#include "gd32e50x_crc.h"
+#include "gd32e50x_ctc.h"
+#include "gd32e50x_dac.h"
+#include "gd32e50x_dbg.h"
+#include "gd32e50x_dma.h"
+#include "gd32e50x_exmc.h"
+#include "gd32e50x_exti.h"
+#include "gd32e50x_fmc.h"
+#include "gd32e50x_fwdgt.h"
+#include "gd32e50x_gpio.h"
+#include "gd32e50x_shrtimer.h"
+#include "gd32e50x_i2c.h"
+#include "gd32e50x_misc.h"
+#include "gd32e50x_pmu.h"
+#include "gd32e50x_rcu.h"
+#include "gd32e50x_rtc.h"
+#include "gd32e50x_spi.h"
+#include "gd32e50x_timer.h"
+#include "gd32e50x_usart.h"
+#include "gd32e50x_wwdgt.h"
+#include "gd32e50x_sqpi.h"
+
+#ifdef GD32E50X_CL
+#include "gd32e50x_enet.h"
+#include "gd32e50x_tmu.h"
+#include "gd32e50x_cmp.h"
+#else /* GD32E50X_CL */
+#include "gd32e50x_sdio.h"
+#endif /* GD32E50X_CL */
+
+#else /* GD32EPRT */
+#include "gd32e50x_adc.h"
+#include "gd32e50x_bkp.h"
+#include "gd32e50x_crc.h"
+#include "gd32e50x_ctc.h"
+#include "gd32e50x_dac.h"
+#include "gd32e50x_dbg.h"
+#include "gd32e50x_dma.h"
+#include "gd32e50x_enet.h"
+#include "gd32e50x_exmc.h"
+#include "gd32e50x_exti.h"
+#include "gd32e50x_fmc.h"
+#include "gd32e50x_fwdgt.h"
+#include "gd32e50x_gpio.h"
+#include "gd32e50x_i2c.h"
+#include "gd32e50x_misc.h"
+#include "gd32e50x_pmu.h"
+#include "gd32e50x_rcu.h"
+#include "gd32e50x_rtc.h"
+#include "gd32e50x_spi.h"
+#include "gd32e50x_timer.h"
+#include "gd32e50x_usart.h"
+#include "gd32e50x_wwdgt.h"
+#include "gd32e50x_sqpi.h"
+
+#endif /* GD32EPRT */
+
+#endif /* GD32E50X_LIBOPT_H */

board/GigaDevice_GD32E507Z_EVAL/BSP/Inc/main.h

+/*!
+    \file  main.h
+    \brief the header file of main 
+*/
+
+/*
+    Copyright (C) 2016 GigaDevice
+
+    2016-08-15, V1.0.0, firmware for GD32F4xx
+*/
+
+#ifndef __MAIN_H
+#define __MAIN_H
+
+/* led spark function */
+void led_spark(void);
+
+#endif /* __MAIN_H */
+
+

board/GigaDevice_GD32E507Z_EVAL/BSP/Inc/systick.h

+/*!
+    \file  systick.h
+    \brief the header file of systick
+    
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#ifndef SYS_TICK_H
+#define SYS_TICK_H
+
+#include <stdint.h>
+
+/* configure systick */
+void systick_config(void);
+/* delay a time in milliseconds */
+void delay_1ms(uint32_t count);
+/* delay decrement */
+void delay_decrement(void);
+
+#endif /* SYS_TICK_H */

board/GigaDevice_GD32E507Z_EVAL/BSP/Src/gd32e507z_eval.c

+/*!
+    \file    gd32e507z_eval.c
+    \brief   firmware functions to manage leds, keys, COM ports
+
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#include "gd32e507z_eval.h"
+
+/* private variables */
+static uint32_t GPIO_PORT[LEDn]           = {LED1_GPIO_PORT, LED2_GPIO_PORT,
+                                             LED3_GPIO_PORT, LED4_GPIO_PORT};
+static uint32_t GPIO_PIN[LEDn]            = {LED1_PIN, LED2_PIN, LED3_PIN, LED4_PIN};
+
+static rcu_periph_enum COM_CLK[COMn]      = {EVAL_COM0_CLK};
+static uint32_t COM_TX_PIN[COMn]          = {EVAL_COM0_TX_PIN};
+static uint32_t COM_RX_PIN[COMn]          = {EVAL_COM0_RX_PIN};
+static uint32_t COM_GPIO_PORT[COMn]       = {EVAL_COM0_GPIO_PORT};
+static rcu_periph_enum COM_GPIO_CLK[COMn] = {EVAL_COM0_GPIO_CLK};
+
+static rcu_periph_enum GPIO_CLK[LEDn]     = {LED1_GPIO_CLK, LED2_GPIO_CLK, 
+                                             LED3_GPIO_CLK, LED4_GPIO_CLK};
+
+static uint32_t KEY_PORT[KEYn]            = {KEY_A_GPIO_PORT, 
+                                             KEY_B_GPIO_PORT,
+                                             KEY_C_GPIO_PORT,
+                                             KEY_D_GPIO_PORT,
+                                             KEY_CET_GPIO_PORT};
+static uint32_t KEY_PIN[KEYn]             = {KEY_A_PIN,
+                                             KEY_B_PIN,
+                                             KEY_C_PIN,
+                                             KEY_D_PIN,
+                                             KEY_CET_PIN};
+static rcu_periph_enum KEY_CLK[KEYn]      = {KEY_A_GPIO_CLK,
+                                             KEY_B_GPIO_CLK,
+                                             KEY_C_GPIO_CLK,
+                                             KEY_D_GPIO_CLK,
+                                             KEY_CET_GPIO_CLK};
+static exti_line_enum KEY_EXTI_LINE[KEYn] = {KEY_A_EXTI_LINE,
+                                             KEY_B_EXTI_LINE,
+                                             KEY_C_EXTI_LINE,
+                                             KEY_D_EXTI_LINE,
+                                             KEY_CET_EXTI_LINE};
+static uint8_t KEY_PORT_SOURCE[KEYn]      = {KEY_A_EXTI_PORT_SOURCE,
+                                             KEY_B_EXTI_PORT_SOURCE,
+                                             KEY_C_EXTI_PORT_SOURCE,
+                                             KEY_D_EXTI_PORT_SOURCE,
+                                             KEY_CET_EXTI_PORT_SOURCE};
+static uint8_t KEY_PIN_SOURCE[KEYn]       = {KEY_A_EXTI_PIN_SOURCE,
+                                             KEY_B_EXTI_PIN_SOURCE,
+                                             KEY_C_EXTI_PIN_SOURCE,
+                                             KEY_D_EXTI_PIN_SOURCE,
+                                             KEY_CET_EXTI_PIN_SOURCE};
+static uint8_t KEY_IRQn[KEYn]             = {KEY_A_EXTI_IRQn,
+                                             KEY_B_EXTI_IRQn,
+                                             KEY_C_EXTI_IRQn,
+                                             KEY_D_EXTI_IRQn,
+                                             KEY_CET_EXTI_IRQn};
+
+/*!
+    \brief      configure led GPIO
+    \param[in]  lednum: specify the led to be configured
+      \arg        LED1
+      \arg        LED2
+      \arg        LED3
+      \arg        LED4
+    \param[out] none
+    \retval     none
+*/
+void  gd_eval_led_init (led_typedef_enum lednum)
+{
+    /* enable the led clock */
+    rcu_periph_clock_enable(GPIO_CLK[lednum]);
+    /* configure led GPIO port */ 
+    gpio_init(GPIO_PORT[lednum], GPIO_MODE_OUT_PP, GPIO_OSPEED_50MHZ,GPIO_PIN[lednum]);
+
+    GPIO_BC(GPIO_PORT[lednum]) = GPIO_PIN[lednum];
+}
+
+/*!
+    \brief      turn on selected led
+    \param[in]  lednum: specify the led to be turned on
+      \arg        LED1
+      \arg        LED2
+      \arg        LED3
+      \arg        LED4
+    \param[out] none
+    \retval     none
+*/
+void gd_eval_led_on(led_typedef_enum lednum)
+{
+    GPIO_BOP(GPIO_PORT[lednum]) = GPIO_PIN[lednum];
+}
+
+/*!
+    \brief      turn off selected led
+    \param[in]  lednum: specify the led to be turned off
+      \arg        LED1
+      \arg        LED2
+      \arg        LED3
+      \arg        LED4
+    \param[out] none
+    \retval     none
+*/
+void gd_eval_led_off(led_typedef_enum lednum)
+{
+    GPIO_BC(GPIO_PORT[lednum]) = GPIO_PIN[lednum];
+}
+
+/*!
+    \brief      toggle selected led
+    \param[in]  lednum: specify the led to be toggled
+      \arg        LED1
+      \arg        LED2
+      \arg        LED3
+      \arg        LED4
+    \param[out] none
+    \retval     none
+*/
+void gd_eval_led_toggle(led_typedef_enum lednum)
+{
+    gpio_bit_write(GPIO_PORT[lednum], GPIO_PIN[lednum], 
+                    (bit_status)(1-gpio_input_bit_get(GPIO_PORT[lednum], GPIO_PIN[lednum])));
+}
+
+/*!
+    \brief      configure key
+    \param[in]  key_num: specify the key to be configured
+      \arg        KEY_A: wakeup key
+      \arg        KEY_B: tamper key
+      \arg        KEY_C: user key
+      \arg        KEY_D: extension key
+      \arg        KEY_CET: extension key
+    \param[in]  key_mode: specify button mode
+      \arg        KEY_MODE_GPIO: key will be used as simple IO
+      \arg        KEY_MODE_EXTI: key will be connected to EXTI line with interrupt
+    \param[out] none
+    \retval     none
+*/
+void gd_eval_key_init(key_typedef_enum key_num, keymode_typedef_enum key_mode)
+{
+    /* enable the key clock */
+    rcu_periph_clock_enable(KEY_CLK[key_num]);
+    rcu_periph_clock_enable(RCU_AF);
+
+    /* configure button pin as input */
+    gpio_init(KEY_PORT[key_num], GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, KEY_PIN[key_num]);
+
+    if (key_mode == KEY_MODE_EXTI) {
+        /* enable and set key EXTI interrupt to the lowest priority */
+        nvic_irq_enable(KEY_IRQn[key_num], 2U, 0U);
+
+        /* connect key EXTI line to key GPIO pin */
+        gpio_exti_source_select(KEY_PORT_SOURCE[key_num], KEY_PIN_SOURCE[key_num]);
+
+        /* configure key EXTI line */
+        exti_init(KEY_EXTI_LINE[key_num], EXTI_INTERRUPT, EXTI_TRIG_FALLING);
+        exti_interrupt_flag_clear(KEY_EXTI_LINE[key_num]);
+    }
+}
+
+/*!
+    \brief      return the selected key state
+    \param[in]  key: specify the key to be checked
+      \arg        KEY_A: wakeup key
+      \arg        KEY_B: tamper key
+      \arg        KEY_C: user key
+      \arg        KEY_D: extension key
+      \arg        KEY_CET: extension key
+    \param[out] none
+    \retval     the key's GPIO pin value
+*/
+uint8_t gd_eval_key_state_get(key_typedef_enum key)
+{
+    return gpio_input_bit_get(KEY_PORT[key], KEY_PIN[key]);
+}
+
+/*!
+    \brief      configure COM port
+    \param[in]  com: COM on the board
+      \arg        EVAL_COM0: COM0 on the board
+    \param[out] none
+    \retval     none
+*/
+void gd_eval_com_init(uint32_t com)
+{
+    uint32_t com_id = 0U;
+    if(EVAL_COM0 == com){
+        com_id = 0U;
+    }else{
+        while(1);
+    }
+    
+    /* enable GPIO clock */
+    rcu_periph_clock_enable(COM_GPIO_CLK[com_id]);
+
+    /* enable USART clock */
+    rcu_periph_clock_enable(COM_CLK[com_id]);
+
+    /* connect port to USARTx_Tx */
+    gpio_init(COM_GPIO_PORT[com_id], GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, COM_TX_PIN[com_id]);
+
+    /* connect port to USARTx_Rx */
+    gpio_init(COM_GPIO_PORT[com_id], GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, COM_RX_PIN[com_id]);
+
+    /* USART configure */
+    usart_deinit(com);
+    usart_baudrate_set(com, 115200U);
+    usart_receive_config(com, USART_RECEIVE_ENABLE);
+    usart_transmit_config(com, USART_TRANSMIT_ENABLE);
+    usart_enable(com);
+}

board/GigaDevice_GD32E507Z_EVAL/BSP/Src/gd32e50x_it.c

+/*!
+    \file    gd32e50x_it.c
+    \brief   interrupt service routines
+    
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+#include "gd32e50x_it.h"
+#include "systick.h"
+#include "tos_k.h"
+/*!
+    \brief      this function handles NMI exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void NMI_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles HardFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void HardFault_Handler(void)
+{
+    /* if Hard Fault exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles MemManage exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void MemManage_Handler(void)
+{
+    /* if Memory Manage exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles BusFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void BusFault_Handler(void)
+{
+    /* if Bus Fault exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles UsageFault exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void UsageFault_Handler(void)
+{
+    /* if Usage Fault exception occurs, go to infinite loop */
+    while (1){
+    }
+}
+
+/*!
+    \brief      this function handles SVC exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SVC_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles DebugMon exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void DebugMon_Handler(void)
+{
+}
+
+/*!
+    \brief      this function handles PendSV exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+//void PendSV_Handler(void)
+//{
+//}
+
+/*!
+    \brief      this function handles SysTick exception
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void SysTick_Handler(void)
+{
+    if(tos_knl_is_running())
+    {
+        tos_knl_irq_enter();
+        tos_tick_handler();
+        tos_knl_irq_leave();
+    }
+    delay_decrement();
+}

board/GigaDevice_GD32E507Z_EVAL/BSP/Src/main.c

+#include "gd32e50x.h"
+#include "gd32e507z_eval.h"
+#include "systick.h"
+#include <stdio.h>
+#include "cmsis_os.h"
+
+#define TASK1_STK_SIZE		512
+void task1(void *arg);
+osThreadDef(task1, osPriorityNormal, 2, TASK1_STK_SIZE);
+
+#define TASK2_STK_SIZE		512
+void task2(void *arg);
+osThreadDef(task2, osPriorityNormal, 1, TASK2_STK_SIZE);
+
+void board_init(void)
+{
+    /* initialize the leds */
+    gd_eval_led_init(LED1);
+    gd_eval_led_init(LED2);
+    gd_eval_led_init(LED3);
+    gd_eval_led_init(LED4);
+     /* close all of leds */
+    gd_eval_led_off(LED1);
+    gd_eval_led_off(LED2);
+    gd_eval_led_off(LED3);
+    gd_eval_led_off(LED4);
+    /* configure systick */
+    systick_config();
+    /* configure EVAL_COM0 */
+    gd_eval_com_init(EVAL_COM0);
+}
+
+
+void task1(void *arg)
+{
+    while (1) {
+        gd_eval_led_toggle(LED1);
+        gd_eval_led_toggle(LED2);
+        printf("++++++++This is task1!\r\n");
+        osDelay(2000);
+    }
+}
+
+void task2(void *arg)
+{
+    while (1) {      
+        gd_eval_led_toggle(LED3);
+        gd_eval_led_toggle(LED4);
+        printf("---------This is task2!\r\n");
+        osDelay(1000);
+    }
+}
+
+int main(void)
+{
+    board_init();
+    printf("Welcome to TencentOS Tiny!\r\n");
+    osKernelInitialize();
+    osThreadCreate(osThread(task1), NULL); // Create task1
+    osThreadCreate(osThread(task2), NULL); // Create task2
+    osKernelStart();
+}
+
+
+/* retarget the C library printf function to the USART */
+int fputc(int ch, FILE *f)
+{
+    usart_data_transmit(EVAL_COM0, (uint8_t)ch);
+    while(RESET == usart_flag_get(EVAL_COM0, USART_FLAG_TBE));
+    return ch;
+}

board/GigaDevice_GD32E507Z_EVAL/BSP/Src/systick.c

+/*!
+    \file    systick.c
+    \brief   the systick configuration file
+    
+    \version 2020-06-30, V1.0.0, demo for GD32E50x
+    \version 2020-08-26, V1.1.0, demo for GD32E50x
+*/
+
+/*
+    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+
+    Redistribution and use in source and binary forms, with or without modification, 
+are permitted provided that the following conditions are met:
+
+    1. Redistributions of source code must retain the above copyright notice, this 
+       list of conditions and the following disclaimer.
+    2. Redistributions in binary form must reproduce the above copyright notice, 
+       this list of conditions and the following disclaimer in the documentation 
+       and/or other materials provided with the distribution.
+    3. Neither the name of the copyright holder nor the names of its contributors 
+       may be used to endorse or promote products derived from this software without 
+       specific prior written permission.
+
+    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGE.
+*/
+
+
+#include "gd32e50x.h"
+#include "systick.h"
+
+static __IO uint32_t delay;
+
+/*!
+    \brief      configure systick
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void systick_config(void)
+{
+    /* setup systick timer for 1000Hz interrupts */
+    if (SysTick_Config(SystemCoreClock / 1000U)){
+        /* capture error */
+        while (1){
+        }
+    }
+    /* configure the systick handler priority */
+    NVIC_SetPriority(SysTick_IRQn, 0x00U);
+}
+
+/*!
+    \brief      delay a time in milliseconds
+    \param[in]  count: count in milliseconds
+    \param[out] none
+    \retval     none
+*/
+void delay_1ms(uint32_t count)
+{
+    delay = count;
+
+    while(0U != delay){
+    }
+}
+
+/*!
+    \brief      delay decrement
+    \param[in]  none
+    \param[out] none
+    \retval     none
+*/
+void delay_decrement(void)
+{
+    if (0U != delay){
+        delay--;
+    }
+}

board/GigaDevice_GD32E507Z_EVAL/IAR/hello_world/GD32E507Z_EVAL.eww

+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>
+  <project>
+    <path>$WS_DIR$\GD32E507Z_EVAL.ewp</path>
+  </project>
+  <batchBuild/>
+</workspace>
+
+

board/GigaDevice_GD32E507Z_EVAL/TOS_CONFIG/tos_config.h

+#ifndef _TOS_CONFIG_H_
+#define  _TOS_CONFIG_H_
+
+#include "gd32e50x.h"
+
+#define TOS_CFG_TASK_PRIO_MAX           10u
+
+#define TOS_CFG_ROUND_ROBIN_EN          0u
+
+#define TOS_CFG_OBJECT_VERIFY_EN           1u
+
+#define TOS_CFG_TASK_DYNAMIC_CREATE_EN  1u
+
+#define TOS_CFG_EVENT_EN                1u
+
+#define TOS_CFG_MMBLK_EN                1u
+
+#define TOS_CFG_MMHEAP_EN               1u
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_EN  1u
+
+#define TOS_CFG_MMHEAP_DEFAULT_POOL_SIZE        0x100
+
+#define TOS_CFG_MUTEX_EN                1u
+
+#define TOS_CFG_MESSAGE_QUEUE_EN        1u
+
+#define TOS_CFG_MAIL_QUEUE_EN           1u
+
+#define TOS_CFG_PRIORITY_MESSAGE_QUEUE_EN	1u
+
+#define TOS_CFG_PRIORITY_MAIL_QUEUE_EN	1u
+
+#define TOS_CFG_TIMER_EN                0u
+
+#define TOS_CFG_PWR_MGR_EN              0u
+
+#define TOS_CFG_TICKLESS_EN             0u
+
+#define TOS_CFG_SEM_EN                  1u
+
+#define TOS_CFG_TASK_STACK_DRAUGHT_DEPTH_DETACT_EN      1u
+
+#define TOS_CFG_FAULT_BACKTRACE_EN      0u
+
+#define TOS_CFG_IDLE_TASK_STK_SIZE      128u
+
+#define TOS_CFG_CPU_TICK_PER_SECOND     1000u
+
+#define TOS_CFG_CPU_CLOCK               (SystemCoreClock)
+
+#define TOS_CFG_TIMER_AS_PROC           1u
+
+#endif
+

platform/vendor_bsp/gd/GD32E50x_Firmware_Library/CMSIS/GD/GD32E50x/Include/system_gd32e50x.h

+/*!
+    \file  system_gd32e50x.h
+    \brief CMSIS Cortex-M33 Device Peripheral Access Layer Header File for
+           GD32E50x Device Series
+*/
+
+/* Copyright (c) 2012 ARM LIMITED
+
+   All rights reserved.
+   Redistribution and use in source and binary forms, with or without
+   modification, are permitted provided that the following conditions are met:
+   - Redistributions of source code must retain the above copyright
+     notice, this list of conditions and the following disclaimer.
+   - Redistributions in binary form must reproduce the above copyright
+     notice, this list of conditions and the following disclaimer in the
+     documentation and/or other materials provided with the distribution.
+   - Neither the name of ARM nor the names of its contributors may be used
+     to endorse or promote products derived from this software without
+     specific prior written permission.
+   *
+   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
+   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+   POSSIBILITY OF SUCH DAMAGE.
+   ---------------------------------------------------------------------------*/
+
+/* This file refers the CMSIS standard, some adjustments are made according to GigaDevice chips */
+
+#ifndef SYSTEM_GD32E50X_H
+#define SYSTEM_GD32E50X_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+/* system clock frequency (core clock) */
+extern uint32_t SystemCoreClock;
+
+/* function declarations */
+/* initialize the system and update the SystemCoreClock variable */
+extern void SystemInit (void);
+/* update the SystemCoreClock with current core clock retrieved from CPU registers */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_GD32E50X_H */

platform/vendor_bsp/gd/GD32E50x_Firmware_Library/CMSIS/GD/GD32E50x/Source/ARM/startup_gd32e50x_cl.s

+;/*!
+;    \file    startup_gd32e50x_cl.s
+;    \brief   start up file
+;
+;    \version 2020-03-10, V1.0.0, firmware for GD32E50x
+;    \version 2020-08-26, V1.1.0, firmware for GD32E50x
+;*/
+;
+;/*
+;    Copyright (c) 2020, GigaDevice Semiconductor Inc.
+;
+;    Redistribution and use in source and binary forms, with or without modification, 
+;are permitted provided that the following conditions are met:
+;
+;    1. Redistributions of source code must retain the above copyright notice, this 
+;       list of conditions and the following disclaimer.
+;    2. Redistributions in binary form must reproduce the above copyright notice, 
+;       this list of conditions and the following disclaimer in the documentation 
+;       and/or other materials provided with the distribution.
+;    3. Neither the name of the copyright holder nor the names of its contributors 
+;       may be used to endorse or promote products derived from this software without 
+;       specific prior written permission.
+;
+;    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
+;AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
+;WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
+;IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
+;INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
+;NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+;PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
+;WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+;ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+;OF SUCH DAMAGE.
+;*/
+
+; <h> Stack Configuration
+;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size      EQU     0x00000800
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size       EQU     0x00000400
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+;               /* reset Vector Mapped to at Address 0 */
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp                      ; Top of Stack
+                DCD     Reset_Handler                     ; Reset Handler
+                DCD     NMI_Handler                       ; NMI Handler
+                DCD     HardFault_Handler                 ; Hard Fault Handler
+                DCD     MemManage_Handler                 ; MPU Fault Handler
+                DCD     BusFault_Handler                  ; Bus Fault Handler
+                DCD     UsageFault_Handler                ; Usage Fault Handler
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     SVC_Handler                       ; SVCall Handler
+                DCD     DebugMon_Handler                  ; Debug Monitor Handler
+                DCD     0                                 ; Reserved
+                DCD     PendSV_Handler                    ; PendSV Handler
+                DCD     SysTick_Handler                   ; SysTick Handler
+
+;               /* external interrupts handler */
+                DCD     WWDGT_IRQHandler                  ; 16:Window Watchdog Timer
+                DCD     LVD_IRQHandler                    ; 17:LVD through EXTI Line detect
+                DCD     TAMPER_IRQHandler                 ; 18:Tamper through EXTI Line detect
+                DCD     RTC_IRQHandler                    ; 19:RTC through EXTI Line
+                DCD     FMC_IRQHandler                    ; 20:FMC
+                DCD     RCU_CTC_IRQHandler                ; 21:RCU and CTC
+                DCD     EXTI0_IRQHandler                  ; 22:EXTI Line 0
+                DCD     EXTI1_IRQHandler                  ; 23:EXTI Line 1
+                DCD     EXTI2_IRQHandler                  ; 24:EXTI Line 2
+                DCD     EXTI3_IRQHandler                  ; 25:EXTI Line 3
+                DCD     EXTI4_IRQHandler                  ; 26:EXTI Line 4
+                DCD     DMA0_Channel0_IRQHandler          ; 27:DMA0 Channel0
+                DCD     DMA0_Channel1_IRQHandler          ; 28:DMA0 Channel1
+                DCD     DMA0_Channel2_IRQHandler          ; 29:DMA0 Channel2
+                DCD     DMA0_Channel3_IRQHandler          ; 30:DMA0 Channel3
+                DCD     DMA0_Channel4_IRQHandler          ; 31:DMA0 Channel4
+                DCD     DMA0_Channel5_IRQHandler          ; 32:DMA0 Channel5
+                DCD     DMA0_Channel6_IRQHandler          ; 33:DMA0 Channel6
+                DCD     ADC0_1_IRQHandler                 ; 34:ADC0 and ADC1
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     EXTI5_9_IRQHandler                ; 39:EXTI5 to EXTI9
+                DCD     TIMER0_BRK_TIMER8_IRQHandler      ; 40:TIMER0 Break and TIMER8
+                DCD     TIMER0_UP_TIMER9_IRQHandler       ; 41:TIMER0 Update and TIMER9
+                DCD     TIMER0_TRG_CMT_TIMER10_IRQHandler ; 42:TIMER0 Trigger and Commutation and TIMER10
+                DCD     TIMER0_Channel_IRQHandler         ; 43:TIMER0 Channel Capture Compare
+                DCD     TIMER1_IRQHandler                 ; 44:TIMER1
+                DCD     TIMER2_IRQHandler                 ; 45:TIMER2
+                DCD     TIMER3_IRQHandler                 ; 46:TIMER3
+                DCD     I2C0_EV_IRQHandler                ; 47:I2C0 Event
+                DCD     I2C0_ER_IRQHandler                ; 48:I2C0 Error
+                DCD     I2C1_EV_IRQHandler                ; 49:I2C1 Event
+                DCD     I2C1_ER_IRQHandler                ; 50:I2C1 Error
+                DCD     SPI0_IRQHandler                   ; 51:SPI0
+                DCD     SPI1_I2S1ADD_IRQHandler           ; 52:SPI1 or I2S1ADD
+                DCD     USART0_IRQHandler                 ; 53:USART0
+                DCD     USART1_IRQHandler                 ; 54:USART1
+                DCD     USART2_IRQHandler                 ; 55:USART2
+                DCD     EXTI10_15_IRQHandler              ; 56:EXTI10 to EXTI15
+                DCD     RTC_Alarm_IRQHandler              ; 57:RTC Alarm
+                DCD     USBHS_WKUP_IRQHandler             ; 58:USBHS Wakeup
+                DCD     TIMER7_BRK_TIMER11_IRQHandler     ; 59:TIMER7 Break and TIMER11
+                DCD     TIMER7_UP_TIMER12_IRQHandler      ; 60:TIMER7 Update and TIMER12
+                DCD     TIMER7_TRG_CMT_TIMER13_IRQHandler ; 61:TIMER7 Trigger and Commutation and TIMER13
+                DCD     TIMER7_Channel_IRQHandler         ; 62:TIMER7 Channel Capture Compare
+                DCD     0                                 ; Reserved
+                DCD     EXMC_IRQHandler                   ; 64:EXMC
+                DCD     0                                 ; Reserved
+                DCD     TIMER4_IRQHandler                 ; 66:TIMER4
+                DCD     SPI2_I2S2ADD_IRQHandler           ; 67:SPI2 or I2S2ADD
+                DCD     UART3_IRQHandler                  ; 68:UART3
+                DCD     UART4_IRQHandler                  ; 69:UART4
+                DCD     TIMER5_DAC_IRQHandler             ; 70:TIMER5 or DAC
+                DCD     TIMER6_IRQHandler                 ; 71:TIMER6
+                DCD     DMA1_Channel0_IRQHandler          ; 72:DMA1 Channel0
+                DCD     DMA1_Channel1_IRQHandler          ; 73:DMA1 Channel1
+                DCD     DMA1_Channel2_IRQHandler          ; 74:DMA1 Channel2
+                DCD     DMA1_Channel3_IRQHandler          ; 75:DMA1 Channel3
+                DCD     DMA1_Channel4_IRQHandler          ; 76:DMA1 Channel4
+                DCD     ENET_IRQHandler                   ; 77:Ethernet
+                DCD     ENET_WKUP_IRQHandler              ; 78:Ethernet Wakeup through EXTI Line
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     USBHS_IRQHandler                  ; 83:USBHS
+                DCD     0                                 ; Reserved
+                DCD     SHRTIMER_IRQ2_IRQHandler          ; 85:SHRTIMER IRQ2
+                DCD     SHRTIMER_IRQ3_IRQHandler          ; 86:SHRTIMER IRQ3
+                DCD     SHRTIMER_IRQ4_IRQHandler          ; 87:SHRTIMER IRQ4
+                DCD     SHRTIMER_IRQ5_IRQHandler          ; 88:SHRTIMER IRQ5
+                DCD     SHRTIMER_IRQ6_IRQHandler          ; 89:SHRTIMER IRQ6
+                DCD     USBHS_EP1_OUT_IRQHandler          ; 90:USBHS end point 1 out
+                DCD     USBHS_EP1_IN_IRQHandler           ; 91:USBHS end point 1 in
+                DCD     SHRTIMER_IRQ0_IRQHandler          ; 92:SHRTIMER IRQ0
+                DCD     SHRTIMER_IRQ1_IRQHandler          ; 93:SHRTIMER IRQ1
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     0                                 ; Reserved
+                DCD     I2C2_EV_IRQHandler                ; 98:I2C2 Event
+                DCD     I2C2_ER_IRQHandler                ; 99:I2C2 Error
+                DCD     USART5_IRQHandler                 ; 100:USART5
+                DCD     I2C2_WKUP_IRQHandler              ; 101:I2C2 Wakeup
+                DCD     USART5_WKUP_IRQHandler            ; 102:USART5 Wakeup
+                DCD     TMU_IRQHandler                    ; 103:TMU
+
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+;/* reset Handler */
+Reset_Handler   PROC
+                EXPORT  Reset_Handler                     [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+;/* dummy Exception Handlers */
+NMI_Handler     PROC
+                EXPORT  NMI_Handler                       [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler                 [WEAK]
+                B       .
+                ENDP
+MemManage_Handler\
+                PROC
+                EXPORT  MemManage_Handler                 [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler                  [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler                [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler                       [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler                  [WEAK]
+                B       .
+                ENDP
+PendSV_Handler\
+                PROC
+                EXPORT  PendSV_Handler                    [WEAK]
+                B       .
+                ENDP
+SysTick_Handler\
+                PROC
+                EXPORT  SysTick_Handler                   [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+;               /* external interrupts handler */
+                EXPORT  WWDGT_IRQHandler                  [WEAK]
+                EXPORT  LVD_IRQHandler                    [WEAK]
+                EXPORT  TAMPER_IRQHandler                 [WEAK]
+                EXPORT  RTC_IRQHandler                    [WEAK]
+                EXPORT  FMC_IRQHandler                    [WEAK]
+                EXPORT  RCU_CTC_IRQHandler                [WEAK]
+                EXPORT  EXTI0_IRQHandler                  [WEAK]
+                EXPORT  EXTI1_IRQHandler                  [WEAK]
+                EXPORT  EXTI2_IRQHandler                  [WEAK]
+                EXPORT  EXTI3_IRQHandler                  [WEAK]
+                EXPORT  EXTI4_IRQHandler                  [WEAK]
+                EXPORT  DMA0_Channel0_IRQHandler          [WEAK]
+                EXPORT  DMA0_Channel1_IRQHandler          [WEAK]
+                EXPORT  DMA0_Channel2_IRQHandler          [WEAK]
+                EXPORT  DMA0_Channel3_IRQHandler          [WEAK]
+                EXPORT  DMA0_Channel4_IRQHandler          [WEAK]
+                EXPORT  DMA0_Channel5_IRQHandler          [WEAK]
+                EXPORT  DMA0_Channel6_IRQHandler          [WEAK]
+                EXPORT  ADC0_1_IRQHandler                 [WEAK]
+                EXPORT  EXTI5_9_IRQHandler                [WEAK]
+                EXPORT  TIMER0_BRK_TIMER8_IRQHandler      [WEAK]
+                EXPORT  TIMER0_UP_TIMER9_IRQHandler       [WEAK]
+                EXPORT  TIMER0_TRG_CMT_TIMER10_IRQHandler [WEAK]
+                EXPORT  TIMER0_Channel_IRQHandler         [WEAK]
+                EXPORT  TIMER1_IRQHandler                 [WEAK]
+                EXPORT  TIMER2_IRQHandler                 [WEAK]
+                EXPORT  TIMER3_IRQHandler                 [WEAK]
+                EXPORT  I2C0_EV_IRQHandler                [WEAK]
+                EXPORT  I2C0_ER_IRQHandler                [WEAK]
+                EXPORT  I2C1_EV_IRQHandler                [WEAK]
+                EXPORT  I2C1_ER_IRQHandler                [WEAK]
+                EXPORT  SPI0_IRQHandler                   [WEAK]
+                EXPORT  SPI1_I2S1ADD_IRQHandler           [WEAK]
+                EXPORT  USART0_IRQHandler                 [WEAK]
+                EXPORT  USART1_IRQHandler                 [WEAK]
+                EXPORT  USART2_IRQHandler                 [WEAK]
+                EXPORT  EXTI10_15_IRQHandler              [WEAK]
+                EXPORT  RTC_Alarm_IRQHandler              [WEAK]
+                EXPORT  USBHS_WKUP_IRQHandler             [WEAK]
+                EXPORT  TIMER7_BRK_TIMER11_IRQHandler     [WEAK]
+                EXPORT  TIMER7_UP_TIMER12_IRQHandler      [WEAK]
+                EXPORT  TIMER7_TRG_CMT_TIMER13_IRQHandler [WEAK]
+                EXPORT  TIMER7_Channel_IRQHandler         [WEAK]
+                EXPORT  EXMC_IRQHandler                   [WEAK]
+                EXPORT  TIMER4_IRQHandler                 [WEAK]
+                EXPORT  SPI2_I2S2ADD_IRQHandler           [WEAK]
+                EXPORT  UART3_IRQHandler                  [WEAK]
+                EXPORT  UART4_IRQHandler                  [WEAK]
+                EXPORT  TIMER5_DAC_IRQHandler             [WEAK]
+                EXPORT  TIMER6_IRQHandler                 [WEAK]
+                EXPORT  DMA1_Channel0_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel1_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel2_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel3_IRQHandler          [WEAK]
+                EXPORT  DMA1_Channel4_IRQHandler          [WEAK]
+                EXPORT  ENET_IRQHandler                   [WEAK]
+                EXPORT  ENET_WKUP_IRQHandler              [WEAK]
+                EXPORT  USBHS_IRQHandler                  [WEAK]
+                EXPORT  SHRTIMER_IRQ2_IRQHandler          [WEAK]
+                EXPORT  SHRTIMER_IRQ3_IRQHandler          [WEAK]
+                EXPORT  SHRTIMER_IRQ4_IRQHandler          [WEAK]
+                EXPORT  SHRTIMER_IRQ5_IRQHandler          [WEAK]
+                EXPORT  SHRTIMER_IRQ6_IRQHandler          [WEAK]
+                EXPORT  USBHS_EP1_OUT_IRQHandler          [WEAK]
+                EXPORT  USBHS_EP1_IN_IRQHandler           [WEAK]
+                EXPORT  SHRTIMER_IRQ0_IRQHandler          [WEAK]
+                EXPORT  SHRTIMER_IRQ1_IRQHandler          [WEAK]
+                EXPORT  I2C2_EV_IRQHandler                [WEAK]
+                EXPORT  I2C2_ER_IRQHandler                [WEAK]
+                EXPORT  USART5_IRQHandler                 [WEAK]
+                EXPORT  I2C2_WKUP_IRQHandler              [WEAK]
+                EXPORT  USART5_WKUP_IRQHandler            [WEAK]
+                EXPORT  TMU_IRQHandler                    [WEAK]
+
+;/* external interrupts handler */
+WWDGT_IRQHandler
+LVD_IRQHandler
+TAMPER_IRQHandler
+RTC_IRQHandler
+FMC_IRQHandler
+RCU_CTC_IRQHandler
+EXTI0_IRQHandler
+EXTI1_IRQHandler
+EXTI2_IRQHandler
+EXTI3_IRQHandler
+EXTI4_IRQHandler
+DMA0_Channel0_IRQHandler
+DMA0_Channel1_IRQHandler
+DMA0_Channel2_IRQHandler
+DMA0_Channel3_IRQHandler
+DMA0_Channel4_IRQHandler
+DMA0_Channel5_IRQHandler
+DMA0_Channel6_IRQHandler
+ADC0_1_IRQHandler
+EXTI5_9_IRQHandler
+TIMER0_BRK_TIMER8_IRQHandler
+TIMER0_UP_TIMER9_IRQHandler
+TIMER0_TRG_CMT_TIMER10_IRQHandler
+TIMER0_Channel_IRQHandler
+TIMER1_IRQHandler
+TIMER2_IRQHandler
+TIMER3_IRQHandler
+I2C0_EV_IRQHandler
+I2C0_ER_IRQHandler
+I2C1_EV_IRQHandler
+I2C1_ER_IRQHandler
+SPI0_IRQHandler
+SPI1_I2S1ADD_IRQHandler
+USART0_IRQHandler
+USART1_IRQHandler
+USART2_IRQHandler
+EXTI10_15_IRQHandler
+RTC_Alarm_IRQHandler
+USBHS_WKUP_IRQHandler
+TIMER7_BRK_TIMER11_IRQHandler
+TIMER7_UP_TIMER12_IRQHandler
+TIMER7_TRG_CMT_TIMER13_IRQHandler
+TIMER7_Channel_IRQHandler
+EXMC_IRQHandler
+TIMER4_IRQHandler
+SPI2_I2S2ADD_IRQHandler
+UART3_IRQHandler
+UART4_IRQHandler
+TIMER5_DAC_IRQHandler
+TIMER6_IRQHandler
+DMA1_Channel0_IRQHandler
+DMA1_Channel1_IRQHandler
+DMA1_Channel2_IRQHandler
+DMA1_Channel3_IRQHandler
+DMA1_Channel4_IRQHandler
+ENET_IRQHandler
+ENET_WKUP_IRQHandler
+USBHS_IRQHandler
+SHRTIMER_IRQ2_IRQHandler
+SHRTIMER_IRQ3_IRQHandler
+SHRTIMER_IRQ4_IRQHandler
+SHRTIMER_IRQ5_IRQHandler
+SHRTIMER_IRQ6_IRQHandler
+USBHS_EP1_OUT_IRQHandler
+USBHS_EP1_IN_IRQHandler
+SHRTIMER_IRQ0_IRQHandler
+SHRTIMER_IRQ1_IRQHandler
+I2C2_EV_IRQHandler
+I2C2_ER_IRQHandler
+USART5_IRQHandler
+I2C2_WKUP_IRQHandler
+USART5_WKUP_IRQHandler
+TMU_IRQHandler
+
+                B       .
+                ENDP
+
+                ALIGN
+
+; user Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+                LDR     R0, =  Heap_Mem
+                LDR     R1, =(Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem +  Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+                END

platform/vendor_bsp/gd/GD32E50x_Firmware_Library/CMSIS/cmsis_version.h

+/**************************************************************************//**
+ * @file     cmsis_version.h
+ * @brief    CMSIS Core(M) Version definitions
+ * @version  V5.0.2
+ * @date     19. April 2017
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/*  CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB   ( 1U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#endif