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02722864
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体验新版 GitCode,发现更多精彩内容 >>
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02722864
编写于
2月 28, 2020
作者:
B
Bernard Xiong
提交者:
GitHub
2月 28, 2020
浏览文件
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差异文件
Merge pull request #3418 from bigmagic123/raspi-64-sdio
fix raspi3-64 sdio driver
上级
7b71c0e4
e09c99fc
变更
10
展开全部
隐藏空白更改
内联
并排
Showing
10 changed file
with
459 addition
and
429 deletion
+459
-429
bsp/raspberry-pi/raspi3-64/.config
bsp/raspberry-pi/raspi3-64/.config
+28
-5
bsp/raspberry-pi/raspi3-64/applications/mnt.c
bsp/raspberry-pi/raspi3-64/applications/mnt.c
+12
-0
bsp/raspberry-pi/raspi3-64/driver/board.c
bsp/raspberry-pi/raspi3-64/driver/board.c
+3
-2
bsp/raspberry-pi/raspi3-64/driver/board.h
bsp/raspberry-pi/raspi3-64/driver/board.h
+1
-1
bsp/raspberry-pi/raspi3-64/driver/drv_sdio.c
bsp/raspberry-pi/raspi3-64/driver/drv_sdio.c
+332
-276
bsp/raspberry-pi/raspi3-64/driver/drv_sdio.h
bsp/raspberry-pi/raspi3-64/driver/drv_sdio.h
+46
-138
bsp/raspberry-pi/raspi3-64/driver/raspi.h
bsp/raspberry-pi/raspi3-64/driver/raspi.h
+6
-0
bsp/raspberry-pi/raspi3-64/qemu-64.bat
bsp/raspberry-pi/raspi3-64/qemu-64.bat
+4
-1
bsp/raspberry-pi/raspi3-64/rtconfig.h
bsp/raspberry-pi/raspi3-64/rtconfig.h
+23
-2
components/drivers/sdio/mmcsd_core.c
components/drivers/sdio/mmcsd_core.c
+4
-4
未找到文件。
bsp/raspberry-pi/raspi3-64/.config
浏览文件 @
02722864
...
...
@@ -65,7 +65,7 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_DEVICE_OPS
=
y
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE
=
y
CONFIG_RT_CONSOLEBUF_SIZE
=
128
CONFIG_RT_CONSOLEBUF_SIZE
=
512
CONFIG_RT_CONSOLE_DEVICE_NAME
=
"uart1"
CONFIG_RT_VER_NUM
=
0
x40003
CONFIG_ARCH_CPU_64BIT
=
y
...
...
@@ -77,7 +77,7 @@ CONFIG_ARCH_CPU_64BIT=y
#
CONFIG_RT_USING_COMPONENTS_INIT
=
y
CONFIG_RT_USING_USER_MAIN
=
y
CONFIG_RT_MAIN_THREAD_STACK_SIZE
=
2048
CONFIG_RT_MAIN_THREAD_STACK_SIZE
=
4096
CONFIG_RT_MAIN_THREAD_PRIORITY
=
10
#
...
...
@@ -113,7 +113,23 @@ CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX
=
2
CONFIG_DFS_FD_MAX
=
16
# CONFIG_RT_USING_DFS_MNTTABLE is not set
# CONFIG_RT_USING_DFS_ELMFAT is not set
CONFIG_RT_USING_DFS_ELMFAT
=
y
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
CONFIG_RT_DFS_ELM_CODE_PAGE
=
437
CONFIG_RT_DFS_ELM_WORD_ACCESS
=
y
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3
=
y
CONFIG_RT_DFS_ELM_USE_LFN
=
3
CONFIG_RT_DFS_ELM_MAX_LFN
=
255
CONFIG_RT_DFS_ELM_DRIVES
=
2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE
=
512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT
=
y
CONFIG_RT_USING_DFS_DEVFS
=
y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
...
...
@@ -140,7 +156,13 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
CONFIG_RT_USING_SDIO
=
y
CONFIG_RT_SDIO_STACK_SIZE
=
2048
CONFIG_RT_SDIO_THREAD_PRIORITY
=
15
CONFIG_RT_MMCSD_STACK_SIZE
=
4096
CONFIG_RT_MMCSD_THREAD_PREORITY
=
22
CONFIG_RT_MMCSD_MAX_PARTITION
=
16
CONFIG_RT_SDIO_DEBUG
=
y
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
...
...
@@ -448,7 +470,8 @@ CONFIG_BSP_USING_CORETIMER=y
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_RTC is not set
# CONFIG_BSP_USING_SDIO is not set
CONFIG_BSP_USING_SDIO
=
y
CONFIG_BSP_USING_SDIO0
=
y
#
# Board Peripheral Drivers
...
...
bsp/raspberry-pi/raspi3-64/applications/mnt.c
浏览文件 @
02722864
...
...
@@ -10,7 +10,19 @@
#include <rtthread.h>
#ifdef BSP_USING_SDIO0
#include <dfs_fs.h>
int
mnt_init
(
void
)
{
rt_thread_delay
(
RT_TICK_PER_SECOND
);
if
(
dfs_mount
(
"sd0"
,
"/"
,
"elm"
,
0
,
0
)
==
0
)
{
rt_kprintf
(
"file system initialization done!
\n
"
);
}
return
0
;
}
INIT_ENV_EXPORT
(
mnt_init
);
#endif
bsp/raspberry-pi/raspi3-64/driver/board.c
浏览文件 @
02722864
...
...
@@ -93,10 +93,11 @@ void idle_wfi(void)
void
rt_hw_board_init
(
void
)
{
mmu_init
();
armv8_map
(
0
,
0
,
0x
8
00000
,
MEM_ATTR_MEMORY
);
armv8_map
(
0x3f00
B000
,
0x3f00B000
,
0x1
000
,
MEM_ATTR_IO
);
//timer
armv8_map
(
0
,
0
,
0x
64
00000
,
MEM_ATTR_MEMORY
);
armv8_map
(
0x3f00
0000
,
0x3f000000
,
0x200
000
,
MEM_ATTR_IO
);
//timer
armv8_map
(
0x3f200000
,
0x3f200000
,
0x16000
,
MEM_ATTR_IO
);
//uart
armv8_map
(
0x40000000
,
0x40000000
,
0x1000
,
MEM_ATTR_IO
);
//core timer
armv8_map
(
0x3F300000
,
0x3F300000
,
0x1000
,
MEM_ATTR_IO
);
//sdio
mmu_enable
();
/* initialize hardware interrupt */
...
...
bsp/raspberry-pi/raspi3-64/driver/board.h
浏览文件 @
02722864
...
...
@@ -21,7 +21,7 @@ extern unsigned char __bss_start;
extern
unsigned
char
__bss_end
;
#define RT_HW_HEAP_BEGIN (void*)&__bss_end
#define RT_HW_HEAP_END (void*)(RT_HW_HEAP_BEGIN + 4 * 1024 * 1024)
#define RT_HW_HEAP_END (void*)(RT_HW_HEAP_BEGIN +
6
4 * 1024 * 1024)
void
rt_hw_board_init
(
void
);
...
...
bsp/raspberry-pi/raspi3-64/driver/drv_sdio.c
浏览文件 @
02722864
此差异已折叠。
点击以展开。
bsp/raspberry-pi/raspi3-64/driver/drv_sdio.h
浏览文件 @
02722864
...
...
@@ -13,50 +13,12 @@
#define __DRV_SDIO_H__
#include <rtthread.h>
#include <rtdevice.h>
#include <drivers/mmcsd_core.h>
#define MMC0_BASE_ADDR 0x20300000
struct
raspi_mmc
{
volatile
rt_uint32_t
arg2_reg
;
/* (0x000) */
volatile
rt_uint32_t
blksizecnt_reg
;
/* (0x004) */
volatile
rt_uint32_t
arg1_reg
;
/* (0x008) */
volatile
rt_uint32_t
cmdtm_reg
;
/* (0x00C) */
volatile
rt_uint32_t
resp0_reg
;
/* (0x010) */
volatile
rt_uint32_t
resp1_reg
;
/* (0x014) */
volatile
rt_uint32_t
resp2_reg
;
/* (0x018) */
volatile
rt_uint32_t
resp3_reg
;
/* (0x01C) */
volatile
rt_uint32_t
data_reg
;
/* (0x020) */
volatile
rt_uint32_t
status_reg
;
/* (0x024) */
volatile
rt_uint32_t
control0_reg
;
/* (0x028) */
volatile
rt_uint32_t
control1_reg
;
/* (0x02C) */
volatile
rt_uint32_t
interrupt_reg
;
/* (0x030) */
volatile
rt_uint32_t
irpt_mask_reg
;
/* (0x034) */
volatile
rt_uint32_t
irpt_en_reg
;
/* (0x038) */
volatile
rt_uint32_t
control2_reg
;
/* (0x03C) */
volatile
rt_uint32_t
reserved1
[
4
];
/* (0x040) */
volatile
rt_uint32_t
force_irpt_reg
;
/* (0x050) */
volatile
rt_uint32_t
reserved2
[
7
];
/* (0x054) */
volatile
rt_uint32_t
boot_timeout_reg
;
/* (0x070) */
volatile
rt_uint32_t
deg_sel_reg
;
/* (0x074) */
volatile
rt_uint32_t
reserved3
[
2
];
/* (0x078) */
volatile
rt_uint32_t
exrdfifo_cfg_reg
;
/* (0x080) */
volatile
rt_uint32_t
exrdfifo_cn_reg
;
/* (0x084) */
volatile
rt_uint32_t
tune_step_reg
;
/* (0x088) */
volatile
rt_uint32_t
tune_step_std_reg
;
/* (0x08C) */
volatile
rt_uint32_t
tune_step_ddr_reg
;
/* (0x090) */
volatile
rt_uint32_t
reserved4
[
23
];
/* (0x094) */
volatile
rt_uint32_t
spi_int_reg
;
/* (0x0f0) */
volatile
rt_uint32_t
reserved5
[
2
];
/* (0x0f4) */
volatile
rt_uint32_t
slotisr_ver_reg
;
/* (0x0fC) */
};
typedef
struct
raspi_mmc
*
raspi_mmc_t
;
#define MMC0 ((tina_mmc_t)MMC0_BASE_ADDR)
#include "board.h"
#define BIT(x) (1<<(x))
#define MMC0_BASE_ADDR 0x3F300000
/* Struct for Intrrrupt Information */
#define SDXC_CmdDone BIT(0)
...
...
@@ -78,25 +40,6 @@ typedef struct raspi_mmc *raspi_mmc_t;
#define SDXC_DENDErr BIT(22)
#define SDXC_ACMDErr BIT(24)
/*
SD CMD reg
REG[0-5] : Cmd ID
REG[6] : Has response
REG[7] : Long response
REG[8] : Check response CRC
REG[9] : Has data
REG[10] : Write
REG[11] : Steam mode
REG[12] : Auto stop
REG[13] : Wait previous over
REG[14] : About cmd
REG[15] : Send initialization
REG[21] : Update clock
REG[31] : Load cmd
*/
#define SDXC_BLKCNT_EN BIT(1)
#define SDXC_AUTO_CMD12_EN BIT(2)
#define SDXC_AUTO_CMD23_EN BIT(3)
...
...
@@ -112,82 +55,20 @@ REG[31] : Load cmd
#define SDXC_CMD_RESUME BIT(23)
#define SDXC_CMD_ABORT BIT(23)|BIT(22)
//#define SDXC_CHECK_CRC_CMD BIT(19)
//
//#define SDXC_RESPONSE_CMD BIT(6)
//#define SDXC_LONG_RESPONSE_CMD BIT(7)
//#define SDXC_CHECK_CRC_CMD BIT(8)
//#define SDXC_HAS_DATA_CMD BIT(9)
//#define SDXC_WRITE_CMD BIT(10)
//#define SDXC_STEAM_CMD BIT(11)
//#define SDXC_AUTO_STOP_CMD BIT(12)
//#define SDXC_WAIT_OVER_CMD BIT(13)
//#define SDXC_ABOUT_CMD BIT(14)
//#define SDXC_SEND_INIT_CMD BIT(15)
//#define SDXC_UPDATE_CLOCK_CMD BIT(21)
//#define SDXC_LOAD_CMD BIT(31)
/*
SD status reg
REG[0] : FIFO_RX_LEVEL
REG[1] : FIFO_TX_LEVEL
REG[2] : FIFO_EMPTY
REG[3] : FIFO_FULL
REG[4-7] : FSM_STA
REG[8] : CARD_PRESENT
REG[9] : CARD_BUSY
REG[10] : FSM_BUSY
REG[11-16]: RESP_IDX
REG[17-21]: FIFO_LEVEL
REG[31] : DMA_REQ
*/
#define SDXC_CMD_INHIBIT BIT(0)
#define SDXC_DAT_INHIBIT BIT(1)
#define SDXC_DAT_ACTIVE BIT(2)
#define SDXC_WRITE_TRANSFER BIT(8)
#define SDXC_READ_TRANSFER BIT(9)
//
//
//#define SDXC_FIFO_RX_LEVEL BIT(0)
//#define SDXC_FIFO_TX_LEVEL BIT(1)
//#define SDXC_FIFO_EMPTY BIT(2)
//#define SDXC_FIFO_FULL BIT(3)
//#define SDXC_CARD_PRESENT BIT(8)
//#define SDXC_CARD_BUSY BIT(9)
//#define SDXC_FSM_BUSY BIT(10)
//#define SDXC_DMA_REQ BIT(31)
struct
mmc_des_v4p1
{
rt_uint32_t
:
1
,
dic
:
1
,
/* disable interrupt on completion */
last_des
:
1
,
/* 1-this data buffer is the last buffer */
first_des
:
1
,
/* 1-data buffer is the first buffer,0-data buffer contained in the next descriptor is 1st buffer */
des_chain
:
1
,
/* 1-the 2nd address in the descriptor is the next descriptor address */
end_of_ring
:
1
,
/* 1-last descriptor flag when using dual data buffer in descriptor */
:
24
,
card_err_sum
:
1
,
/* transfer error flag */
own
:
1
;
/* des owner:1-idma owns it, 0-host owns it */
#define SDXC_DES_NUM_SHIFT 12
/* smhc2!! */
#define SDXC_DES_BUFFER_MAX_LEN (1 << SDXC_DES_NUM_SHIFT)
rt_uint32_t
data_buf1_sz
:
16
,
data_buf2_sz
:
16
;
rt_uint32_t
buf_addr_ptr1
;
rt_uint32_t
buf_addr_ptr2
;
};
struct
sdhci_cmd_t
{
rt_uint32_t
cmdidx
;
rt_uint32_t
cmdarg
;
//const char* name;
// rt_uint32_t code;
rt_uint32_t
resptype
;
// rt_uint8_t rca;
// rt_uint32_t delay;
rt_uint32_t
datarw
;
#define DATA_READ 1
#define DATA_WRITE 2
rt_uint32_t
response
[
4
];
};
...
...
@@ -240,17 +121,6 @@ struct sdhci_pdata_t
#define TM_BLKCNT_EN 0x00000002
#define TM_MULTI_DATA (CMD_IS_DATA|TM_MULTI_BLOCK|TM_BLKCNT_EN)
// Response types.
// Note that on the PI, the index and CRC are dropped, leaving 32 bits in RESP0.
#define RESP_NO 0 // No response
//#define RESP_R1 1 // 48 RESP0 contains card status
#define RESP_R1b 11 // 48 RESP0 contains card status, data line indicates busy
#define RESP_R2I 2 // 136 RESP0..3 contains 128 bit CID shifted down by 8 bits as no CRC
#define RESP_R2S 12 // 136 RESP0..3 contains 128 bit CSD shifted down by 8 bits as no CRC
//#define RESP_R3 3 // 48 RESP0 contains OCR register
//#define RESP_R6 6 // 48 RESP0 contains RCA and status bits 23,22,19,12:0
//#define RESP_R7 7 // 48 RESP0 contains voltage acceptance and check pattern
#define RCA_NO 1
#define RCA_YES 2
...
...
@@ -341,5 +211,43 @@ struct sdhci_pdata_t
#define SR_DAT_INHIBIT 0x00000002
#define SR_CMD_INHIBIT 0x00000001
#define CONFIG_MMC_USE_DMA
#define DMA_ALIGN (32U)
#define SD_CMD_INDEX(a) ((a) << 24)
#define SD_CMD_RESERVED(a) 0xffffffff
#define SD_CMD_INDEX(a) ((a) << 24)
#define SD_CMD_TYPE_NORMAL 0x0
#define SD_CMD_TYPE_SUSPEND (1 << 22)
#define SD_CMD_TYPE_RESUME (2 << 22)
#define SD_CMD_TYPE_ABORT (3 << 22)
#define SD_CMD_TYPE_MASK (3 << 22)
#define SD_CMD_ISDATA (1 << 21)
#define SD_CMD_IXCHK_EN (1 << 20)
#define SD_CMD_CRCCHK_EN (1 << 19)
#define SD_CMD_RSPNS_TYPE_NONE 0 // For no response
#define SD_CMD_RSPNS_TYPE_136 (1 << 16) // For response R2 (with CRC), R3,4 (no CRC)
#define SD_CMD_RSPNS_TYPE_48 (2 << 16) // For responses R1, R5, R6, R7 (with CRC)
#define SD_CMD_RSPNS_TYPE_48B (3 << 16) // For responses R1b, R5b (with CRC)
#define SD_CMD_RSPNS_TYPE_MASK (3 << 16)
#define SD_CMD_MULTI_BLOCK (1 << 5)
#define SD_CMD_DAT_DIR_HC 0
#define SD_CMD_DAT_DIR_CH (1 << 4)
#define SD_CMD_AUTO_CMD_EN_NONE 0
#define SD_CMD_AUTO_CMD_EN_CMD12 (1 << 2)
#define SD_CMD_AUTO_CMD_EN_CMD23 (2 << 2)
#define SD_CMD_BLKCNT_EN (1 << 1)
#define SD_CMD_DMA 1
#define SD_RESP_NONE SD_CMD_RSPNS_TYPE_NONE
#define SD_RESP_R1 (SD_CMD_RSPNS_TYPE_48) // | SD_CMD_CRCCHK_EN)
#define SD_RESP_R1b (SD_CMD_RSPNS_TYPE_48B) // | SD_CMD_CRCCHK_EN)
#define SD_RESP_R2 (SD_CMD_RSPNS_TYPE_136) //| SD_CMD_CRCCHK_EN)
#define SD_RESP_R3 SD_CMD_RSPNS_TYPE_48
#define SD_RESP_R4 SD_CMD_RSPNS_TYPE_136
#define SD_RESP_R5 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
#define SD_RESP_R5b (SD_CMD_RSPNS_TYPE_48B | SD_CMD_CRCCHK_EN)
#define SD_RESP_R6 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
#define SD_RESP_R7 (SD_CMD_RSPNS_TYPE_48 | SD_CMD_CRCCHK_EN)
#define SD_DATA_READ (SD_CMD_ISDATA | SD_CMD_DAT_DIR_CH)
#define SD_DATA_WRITE (SD_CMD_ISDATA | SD_CMD_DAT_DIR_HC)
#endif
bsp/raspberry-pi/raspi3-64/driver/raspi.h
浏览文件 @
02722864
...
...
@@ -67,4 +67,10 @@ enum rpi_pin_name
RPI_GPIO_PIN_NUM
,
};
#define DELAY_MICROS(micros) \
do{ \
rt_uint32_t compare = STIMER_CLO + micros * 25; \
while (STIMER_CLO < compare); \
} while (0) \
#endif
bsp/raspberry-pi/raspi3-64/qemu-64.bat
100644 → 100755
浏览文件 @
02722864
qemu
-system-aarch
64
-M
raspi3
-kernel
kernel8
.img
-serial
null
-serial
stdio
\ No newline at end of file
if
[
!
-f
"sd.bin"
];
then
dd
if
=
/dev/zero
of
=
sd
.bin
bs
=
1024
count
=
65536
fi
qemu
-system-aarch
64
-M
raspi3
-kernel
kernel8
.img
-serial
null
-serial
stdio
-sd
sd
.bin
-nographic -monitor
pty
\ No newline at end of file
bsp/raspberry-pi/raspi3-64/rtconfig.h
浏览文件 @
02722864
...
...
@@ -43,7 +43,7 @@
#define RT_USING_DEVICE
#define RT_USING_DEVICE_OPS
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE
128
#define RT_CONSOLEBUF_SIZE
512
#define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40003
#define ARCH_CPU_64BIT
...
...
@@ -52,7 +52,7 @@
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE
2048
#define RT_MAIN_THREAD_STACK_SIZE
4096
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
...
...
@@ -81,6 +81,18 @@
#define DFS_FILESYSTEMS_MAX 2
#define DFS_FILESYSTEM_TYPES_MAX 2
#define DFS_FD_MAX 16
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_USING_DFS_DEVFS
/* Device Drivers */
...
...
@@ -90,6 +102,13 @@
#define RT_USING_SERIAL
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
#define RT_USING_SDIO
#define RT_SDIO_STACK_SIZE 2048
#define RT_SDIO_THREAD_PRIORITY 15
#define RT_MMCSD_STACK_SIZE 4096
#define RT_MMCSD_THREAD_PREORITY 22
#define RT_MMCSD_MAX_PARTITION 16
#define RT_SDIO_DEBUG
/* Using USB */
...
...
@@ -174,6 +193,8 @@
#define RT_USING_UART1
#define BSP_USING_PIN
#define BSP_USING_CORETIMER
#define BSP_USING_SDIO
#define BSP_USING_SDIO0
/* Board Peripheral Drivers */
...
...
components/drivers/sdio/mmcsd_core.c
浏览文件 @
02722864
...
...
@@ -610,7 +610,7 @@ RTM_EXPORT(mmcsd_wait_cd_changed);
void
mmcsd_change
(
struct
rt_mmcsd_host
*
host
)
{
rt_mb_send
(
&
mmcsd_detect_mb
,
(
rt_u
int32
_t
)
host
);
rt_mb_send
(
&
mmcsd_detect_mb
,
(
rt_u
base
_t
)
host
);
}
void
mmcsd_detect
(
void
*
param
)
...
...
@@ -649,7 +649,7 @@ void mmcsd_detect(void *param)
if
(
init_sd
(
host
,
ocr
))
mmcsd_power_off
(
host
);
mmcsd_host_unlock
(
host
);
rt_mb_send
(
&
mmcsd_hotpluge_mb
,
(
rt_u
int32
_t
)
host
);
rt_mb_send
(
&
mmcsd_hotpluge_mb
,
(
rt_u
base
_t
)
host
);
continue
;
}
...
...
@@ -662,7 +662,7 @@ void mmcsd_detect(void *param)
if
(
init_mmc
(
host
,
ocr
))
mmcsd_power_off
(
host
);
mmcsd_host_unlock
(
host
);
rt_mb_send
(
&
mmcsd_hotpluge_mb
,
(
rt_u
int32
_t
)
host
);
rt_mb_send
(
&
mmcsd_hotpluge_mb
,
(
rt_u
base
_t
)
host
);
continue
;
}
mmcsd_host_unlock
(
host
);
...
...
@@ -683,7 +683,7 @@ void mmcsd_detect(void *param)
host
->
card
=
RT_NULL
;
}
mmcsd_host_unlock
(
host
);
rt_mb_send
(
&
mmcsd_hotpluge_mb
,
(
rt_u
int32
_t
)
host
);
rt_mb_send
(
&
mmcsd_hotpluge_mb
,
(
rt_u
base
_t
)
host
);
}
}
}
...
...
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