fix pendsv priority set by phoenix

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1126 bbd45198-f89e-11dd-88c7-29a3b14d5316

libcpu/arm/stm32/context_gcc.S

@@ -146,7 +146,9 @@ rt_hw_context_switch_to:
 	/* set the PendSV exception priority */
 	LDR		r0, =NVIC_SYSPRI2
 	LDR		r1, =NVIC_PENDSV_PRI
-	STR		r1, [r0]
+  LDR.W   r2, [r0,#0x00]       ; read
+  ORR     r1,r1,r2             ; modify
+  STR     r1, [r0]             ; write-back
 
 	LDR		r0, =NVIC_INT_CTRL      /* trigger the PendSV exception (causes context switch) */
 	LDR		r1, =NVIC_PENDSVSET

libcpu/arm/stm32/context_iar.S

@@ -143,7 +143,9 @@ rt_hw_context_switch_to:
 	; set the PendSV exception priority
     LDR     r0, =NVIC_SYSPRI2
     LDR     r1, =NVIC_PENDSV_PRI
-    STR     r1, [r0]
+    LDR.W   r2, [r0,#0x00]       ; read
+    ORR     r1,r1,r2             ; modify
+    STR     r1, [r0]             ; write-back
 
     LDR     r0, =NVIC_INT_CTRL      ; trigger the PendSV exception (causes context switch)
     LDR     r1, =NVIC_PENDSVSET

libcpu/arm/stm32/context_rvds.S

@@ -149,7 +149,9 @@ rt_hw_context_switch_to    PROC
 	; set the PendSV exception priority
     LDR     r0, =NVIC_SYSPRI2
     LDR     r1, =NVIC_PENDSV_PRI
-    STR     r1, [r0]
+    LDR.W   r2, [r0,#0x00]       ; read
+    ORR     r1,r1,r2             ; modify
+    STR     r1, [r0]             ; write-back
 
 	; trigger the PendSV exception (causes context switch)
     LDR     r0, =NVIC_INT_CTRL